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5 commits

Author SHA1 Message Date
Michal Simek
d095631d8d ARM: zynq: Describe nand device in DT 
Linux requires to describe nand structure under nand controller.
If it is not described nand device is not detected by Linux.

Error shown by Linux kernel:
pl35x-nand-controller e1000000.nand-controller: Incorrect number of NAND chips (0)
pl35x-nand-controller: probe of e1000000.nand-controller failed with error -22

When wired:
nand: device found, Manufacturer ID: 0x2c, Chip ID: 0xda
nand: Micron MT29F2G08ABAEAWP
nand: 256 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/3fcd68ccdfed5e6c079681e3b29e06583ec8a375.1695378830.git.michal.simek@amd.com
 2023-10-09 10:25:32 +02:00
Simon Glass
8c103c33fb dm: dts: Convert driver model tags to use new schema 
Now that Linux has accepted these tags, move the device tree files in
U-Boot over to use them.

Signed-off-by: Simon Glass <sjg@chromium.org>
 2023-02-14 09:43:26 -07:00
Michael Walle
03a8e826e0 ARM: dts: zynq: add NAND flash controller node 
Recently, a driver for the ARM Primecell PL35x static memory controller
(including NAND controller) was added in linux. Add the corresponding
device tree node.

Also update cfi-flash registers and location in DT.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210616155437.27378-3-michael@walle.cc
Link: https://lore.kernel.org/r/ee81d3846a1ce93f240d61537d404796e5599c1c.1645625433.git.michal.simek@xilinx.com
 2022-03-07 08:52:20 +01:00
Michal Simek
9dcf2e5c0d ARM: bitmain: Enable nand and smcc drivers 
Enable nand and smcc via DT.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
 2021-03-30 12:03:25 +02:00
Ezequiel Garcia
c66f5620e6 arm: zynq: Add support for Bitmain Antminer S9 control board 
This is control board on Bitmain Antminer S9.
There are 3 board variables with 256MB, 512MB and 1024MB DDR.
DDR memory is automatically detected with using get_with using
get_ram_size().

Bitmain is using 16MB space for FPGA which is handled via
reserved-memory. Also U-Boot is allocating 16B for storing bootcounts.
Watchdog is started but never service in U-Boot.

SPL MMC is working. SPL NAND is not working because it is not supported
as of now.

Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
 2018-05-31 13:50:39 +02:00