Commit graph

10 commits

Author SHA1 Message Date
Tom Rini
aaf5e82560 Merge branch 'master' of git://git.denx.de/u-boot-nds32 2013-07-25 08:51:51 -04:00
ken kuo
c54fd3efa4 nds32: Enable FPU if the version of CPU supported
Some version of Andes core support FPU coprocessor,
if this is the case, and toolchain support FPU instruction set,
we should enable it at low level initialization time.

Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com>
Cc: Macpaul Lin <macpaul@gmail.com>
2013-07-25 16:54:19 +08:00
ken kuo
951344b778 nds32: Convert Makefiles to use COBJS-y style
Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com>
Cc: Macpaul Lin <macpaul@gmail.com>
2013-07-25 16:54:18 +08:00
Wolfgang Denk
1a4596601f Add GPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-24 09:44:38 -04:00
Axel Lin
4fc9670513 nds32: ag101/ag102: Fix setting lastdec and now values
The timer3 counter unit for lastdesc and now values are inconsistent in current
code. The unit of "readl(&tmr->timer3_counter) / (CONFIG_SYS_CLK_FREQ / 2)" is
second. However, CONFIG_SYS_HZ is defined as 1000 in board config file.
This means the accuracy of "lastdec" and "now" should be in millisecond,
thus fix the equation to set lastdec and now variables accordingly.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
2013-07-24 11:50:28 +08:00
ken kuo
3c016704d9 nds32: Enable two banks of SDRAM on Andes board
The original adp-ag101/adp-ag101p initialize only one bank(64MB)
by default at boot time, but it is not enough for some application,
so increasing to two banks(128M).

Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com>
Cc: Macpaul Lin <macpaul@gmail.com>
2013-07-24 11:50:28 +08:00
Macpaul Lin
8d732840ba nds32: split common cache access from cpu into lib
This commit does the following updates.
1. Split the common cache access from cpu.c into lib folder.
2. Rename the following cache api to adapt common.h
 - dcache_flush_rang -> flush_dcache_rang
 - icache_inval_range -> invalidate_icache_range
3. Add invalidate_dcache_range

Signed-off-by: Macpaul Lin <macpaul@gmail.com>
2012-07-20 23:55:52 +08:00
Macpaul Lin
3998586bce nds32/ag101/watchdog.S: add linkage support
Add linkage support to watchdog.S.

Signed-off-by: Macpaul Lin <macpaul@andestech.com>
2012-02-28 13:09:23 +08:00
Macpaul Lin
39c87743bb nds32/ag101: clean up for SoC related code
Remove unneccessary codes.
1. Clean up for cpu related code.
2. Clean up for timer related code.

Signed-off-by: Macpaul Lin <macpaul@andestech.com>
2011-11-23 14:05:51 +08:00
Macpaul Lin
445a886d7a nds32/ag101: cpu and init funcs of SoC ag101
SoC ag101 is the first chip using NDS32 N1213 cpu core.
Add header file of device offset support for SoC ag101.
Add main function of SoC ag101 based on NDS32 n1213 core.
Add lowlevel_init.S and other periphal related code.

This version of lowlevel_init.S also replace hardcode value
by MARCO defines from the GPL version andesboot for better
code quality.

Signed-off-by: Macpaul Lin <macpaul@andestech.com>
2011-10-22 00:52:51 +02:00