Commit graph

24780 commits

Author SHA1 Message Date
Vasili Galka
fa28179d2c m68k: Fix incorrect memory access on M5235
The csarX and cscrX registers in the fbcs_t struct are 16-bit for
CONFIG_M5235 and 32-bit wide otherwise. The code in cpu_init.c
accessed them always as 32-bit, effectively creating a wrong memory
access on M5235. Fixed that by choosing out_be16/out_be32 depending
on whether CONFIG_M5235 is defined or not.

Cc: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Vasili Galka <vvv444@gmail.com>
2014-07-07 19:47:08 -04:00
Vasili Galka
6b02d06feb m68k: Fix bug, "address of" operator was forgotten
in_be16() shall be passed a pointer to register and not its value. This
is clearly a typo resulting in a wrong memory access, so fix it.

Cc: Alison Wang <b18965@freescale.com>, Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Vasili Galka <vvv444@gmail.com>
2014-07-07 19:47:07 -04:00
Masahiro Yamada
98ad54beb5 mpc8xx: remove spc1920 board support
This board is old enough and has no maintainer.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-07-07 19:43:02 -04:00
Masahiro Yamada
b8c1438a7a mpc8xx: remove v37 board support
This board is old enough and has no maintainer.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-07-07 19:43:02 -04:00
Masahiro Yamada
03f9d7d174 mpc8xx: remove fads board support
These boards are old enough and have no maintainers.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-07-07 19:43:02 -04:00
Masahiro Yamada
c51c1c9af9 mpc8xx: remove netta, netta2, netphone board support
These boards are old enough and have no maintainers.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-07-07 19:43:02 -04:00
Masahiro Yamada
c750b9c012 mpc8xx: remove rbc823 board support
This board is old enough and has no maintainer.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-07-07 19:43:02 -04:00
Masahiro Yamada
0657e46e28 mpc8xx: remove RPXlite_dw, quantum board support
These boards are old enough and have no maintainers.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-07-07 19:43:01 -04:00
Masahiro Yamada
dab0f7626e mpc8xx: remove qs850, qs860t board support
These boards are old enough and have no maintainers.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-07-07 19:43:01 -04:00
Jeroen Hofstee
49f9337956 tpm: don't use unneeded double brackets
clang is tempted to inteprete such a condition as a assignment
as well. Since it isn't don't use double brackets.

cc: Tom Wai-Hong Tam <waihong@chromium.org>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
2014-07-07 19:43:01 -04:00
Jeroen Hofstee
6275331d41 vcma9/lowlevel_init.S: trivial: terminate comment
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
2014-07-07 19:43:01 -04:00
Wu, Josh
bd83b59212 README: document CONFIG_ENV_IS_IN_SPI_FLASH
The option can be used to save the environment in spi flash.
Implementation code is already exist in command/env_sf.c. But
the documentation is missing.

This patch add the details for this option to the README file.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-07-07 19:43:01 -04:00
Wu, Josh
be354c1a21 env_fat: use get_device_and_partition() during env save and load
Use get_device_and_partition() is better since:
1. It will call the device initialize function internally. So we can
remove the mmc intialization code to save many lines.
2. It is used by fatls/fatload/fatwrite. So saveenv & load env should
use it too.
3. It can parse the "D:P", "D", "D:", "D:auto" string to get correct
device and partition information by run-time.

Also we remove the FAT_ENV_DEVICE and FAT_ENV_PART. We use a string:
FAT_ENV_DEVICE_AND_PART.
For at91sam9m10g45ek, it is "0". That means use device 0 and if:
a)device 0 has no partition table, use the whole device as a FAT file
system.
b)device 0 has partittion table, use the partition #1.

Refer to the commit: 10a37fd7a4 for details of device & partition string.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2014-07-07 19:43:01 -04:00
Cooper Jr., Franklin
8038b497e7 am43xx: Tune the system to avoid DSS underflows
* This is done by limiting the ARM's bandwidth and setting DSS priority in
  the EMIF controller to ensure underflows do not occur.
2014-07-07 19:42:34 -04:00
Franklin S. Cooper Jr
2c95211167 am43xx: Update EMIF DDR3 Configuration for AM43x GP
* Boot failures have been discovered due to a combination of routing issues and
  non optimal ddr3 timings in the EMIF
* Since ddr3 timings are different after significant board layout changes
  different timings are required for alpha, beta and production boards.

Signed-off-by: Franklin S. Cooper Jr <fcooper@ti.com>
2014-07-07 19:42:34 -04:00
Tom Rini
cfd6de9cf9 doc/README.falcon: Clarify steps slightly.
Make it clear that we need to load a legacy-formatted (aka uImage)
kernel into memory as well as the DT if used before using "spl export".

Cc: Yebio Mesfin <ymesfin@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
2014-07-07 19:42:34 -04:00
Felipe Balbi
49b633b3d3 board: ti: dra7xx: add mux data for UART3
J6 EVM can be built with UART3 as console, but currently
there's nothing muxing UART3 correctly. Likely this only
works because, based on commit log, author was only testing
with UART3 boot and - I assume - ROM code leave UART3 correctly
muxed in that case.

If we want to boot from MMC and still use UART3 as console,
then we need to mux those signals correctly.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-07-07 19:42:34 -04:00
Masahiro Yamada
a8b0f9b685 build: define CPU only when arch/${ARCH}/cpu/${CPU} exists
The directory arch/${ARCH}/cpu/${CPU} does not exist
in avr32, blackfin, microblaze, nios2, openrisc, sandbox, x86.

These architectures have only one CPU type.
Defining CPU should not be required for such architectures.

This commit allows cpu field (= the 3rd field of boards.cfg)
to be kept blank.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Sonic Zhang <sonic.zhang@analog.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Thomas Chou <thomas@wytron.com.tw>
Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
2014-07-07 19:42:34 -04:00
Wu, Josh
d1db76f149 README: document the CONFIG_ENV_IS_IN_FAT option
In README file, add document for the missing configuration option:
CONFIG_ENV_IS_IN_FAT.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2014-07-07 19:42:33 -04:00
Masahiro Yamada
e9c16a8012 Makefile: drop arch/*/include/asm/proc from make mrproper pattern
Commit 7d89982b stopped creating symbolic link
arch/${arch}/include/asm/proc.

We do not need to delete it by "make mrproper" any more.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Vasili Galka <vvv444@gmail.com>
2014-07-07 19:42:33 -04:00
Jeroen Hofstee
878cae6b02 ARM: emif4: wait for CM_DLL_READYST to be set
The code intends for the CM_DLL_READYST to be set, but
actually polls till any bit is set since the logical
AND is used instead of the bitwise one is used. Fix it.

cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
2014-07-07 19:42:33 -04:00
Simon Glass
0b308f14f0 Avoid using gawk-specific strtonum()
We need to subtract two hex numbers. Avoid using strtonum() by doing the
subtraction in bc with a suitable input base.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Vasili Galka <vvv444@gmail.com>
2014-07-07 19:42:33 -04:00
Tom Rini
6ee3d00d1d Merge branch 'master' of git://git.denx.de/u-boot-i2c 2014-07-07 10:10:52 -04:00
Chin Liang See
23f23f23d5 socfpga: Relocate arch common functions away from board
To move the arch common function away from board folder to
arch/arm/cpu/armv7/socfpga folder. Its to avoid code duplication
for other non Altera dev kit which is using socfpga device.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Cc: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Detlev Zundel <dzu@denx.de>
2014-07-05 10:14:46 +02:00
Linus Walleij
7285c09560 integrator: switch to generic board
Turn on generic board for the integrators, as per the request in
the startup message. Everything just works, tested on the
Integrator/AP and Integrator/CP.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Simon Glass <sjg@chromium.org>
2014-07-05 09:32:59 +02:00
Stephen Warren
2460e17593 ARM: rpi_b: enable GENERIC_BOARD
Serial port, SD card, and LCD all work.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Simon Glass <sjg@chromium.org>
2014-07-05 09:32:18 +02:00
Christian Riesch
30493aac62 arm, calimain: Add CONFIG_SYS_GENERIC_BOARD
Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
2014-07-05 09:30:49 +02:00
Shaibal.Dutta
fe0d925299 arm: Fix armv8 compilation error
Fix following compilation error when CONFIG_ARM64 is defined

Error: unknown or missing system register name at operand 2
-- `mrs x0,daifmsr daifset,#3'

Signed-off-by: Shaibal.Dutta <shaibal.dutta@broadcom.com>
Signed-off-by: Darwin Rambo <drambo@broadcom.com>
Reviewed-by: Darwin Rambo <drambo@broadcom.com>
2014-07-05 09:30:20 +02:00
Łukasz Dałek
445abdf9e0 arm:board:h2200: Add CONFIG_SYS_GENERIC_BOARD
Enable 'generic board init' for H2200 palmtop.

Signed-off-by: Lukasz Dalek <luk0104@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
2014-07-05 09:29:03 +02:00
Jeroen Hofstee
ed6c7f7f6e arm: spl: fix include guard
cc: Tom Rini <trini@ti.com>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
2014-07-05 09:28:21 +02:00
Albert ARIBAUD
4009bed469 Reformat boards.cfg
Run tools/reformat.py -i -d '-' -s 8
to reorder boards as header comments suggest
2014-07-05 00:36:57 +02:00
Chin Liang See
dc4d4aa14b socfpga: Adding Scan Manager driver
Scan Manager driver will be called to configure the IOCSR
scan chain. This configuration will setup the IO buffer settings

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Wolfgang Denk <wd@denx.de>
CC: Pavel Machek <pavel@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
2014-07-05 00:27:27 +02:00
Chin Liang See
05b884b5cd socfpga: Adding DesignWare watchdog support
To enable the DesignWare watchdog support at SOCFPGA
Cyclone V dev kit.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>
2014-07-05 00:24:18 +02:00
Chin Liang See
d8c67dc6e1 watchdog/denali: Adding DesignWare watchdog driver support
To add the DesignWare watchdog driver support. It required
information such as register base address and clock info from
configuration header file  within include/configs folder.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>
2014-07-05 00:24:16 +02:00
Sergey Kostanbaev
7237d22baa arm: ep9315: Return back Cirrus Logic EDB9315A board support
This patch returns back support for old ep93xx processors family

Signed-off-by: Sergey Kostanbaev <sergey.kostanbaev@gmail.com>
Cc: albert.u.boot@aribaud.net
2014-07-04 23:45:48 +02:00
Axel Lin
c0c374024d gpio: spear_gpio: Fix gpio_set_value() implementation
In current gpio_set_value() implementation, it always sets the gpio control bit
no matter the value argument is 0 or 1. Thus the GPIOs never set to low.
This patch fixes this bug.

The address bus is used as a mask on read/write operations, so that independent
software drivers can set their GPIO bits without affecting any other pins in a
single write operation. Thus we don't need a read-modify-write to update the
register.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Stefan Roese <sr@denx.de>
Reviewed-by: Vipin Kumar <vipin.kumar@st.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
2014-07-04 21:37:29 +02:00
Jeroen Hofstee
fcfddfd504 ARM: cache_v7: use __weak
This is not only more readable but also prevents a warning
about a missing prototype. The prototypes which are actually
missing are added.

cc: Albert Aribaud <albert.u.boot@aribaud.net>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Reviewed-by: Tom Rini <trini@ti.com>
2014-07-04 19:57:22 +02:00
York Sun
f749db3a75 ARMv8/ls2085a_emu: Add LS2085A emulator and simulator board support
LS2085A is an ARMv8 implementation. This adds board support for emulator
and simulator:
  Two DDR controllers
  UART2 is used as the console
  IFC timing is tightened for speedy booting
  Support DDR3 and DDR4 as separated targets
  Management Complex (MC) is enabled
  Support for GIC 500 (based on GICv3 arch)

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Arnab Basu <arnab.basu@freescale.com>
Signed-off-by: J. German Rivera <German.Rivera@freescale.com>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
2014-07-04 19:48:41 +02:00
J. German Rivera
b940ca64b2 armv8/fsl-lsch3: Add support to load and start MC Firmware
Adding support to load and start the Layerscape Management Complex (MC)
firmware. First, the MC GCR register is set to 0 to reset all cores. MC
firmware and DPL images are copied from their location in NOR flash to
DDR. MC registers are updated with the location of these images.
Deasserting the reset bit of MC GCR register releases core 0 to run.
Core 1 will be released by MC firmware. Stop bits are not touched for
this step. U-boot waits for MC until it boots up. In case of a failure,
device tree is updated accordingly. The MC firmware image uses FIT format.

Signed-off-by: J. German Rivera <German.Rivera@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Lijun Pan <Lijun.Pan@freescale.com>
Signed-off-by: Shruti Kanetkar <Shruti@Freescale.com>
2014-07-03 08:40:58 +02:00
York Sun
2f78eae506 ARMv8/FSL_LSCH3: Add FSL_LSCH3 SoC
Freescale LayerScape with Chassis Generation 3 is a set of SoCs with
ARMv8 cores and 3rd generation of Chassis. We use different MMU setup
to support memory map and cache attribute for these SoCs. MMU and cache
are enabled very early to bootst performance, especially for early
development on emulators. After u-boot relocates to DDR, a new MMU
table with QBMan cache access is created in DDR. SMMU pagesize is set
in SMMU_sACR register. Both DDR3 and DDR4 are supported.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com>
Signed-off-by: Arnab Basu <arnab.basu@freescale.com>
2014-07-03 08:40:51 +02:00
York Sun
22932ffc03 ARMv8: Adjust MMU setup
Make MMU function reusable. Platform code can setup its own MMU tables.

Signed-off-by: York Sun <yorksun@freescale.com>
CC: David Feng <fenghua@phytium.com.cn>
2014-07-03 08:40:48 +02:00
J. German Rivera
0d031e046c Added 64-bit MMIO accessors for ARMv8
This is needed for accessing peripherals with 64-bit MMIO registers,
from ARMv8 processors.

Signed-off-by: J. German Rivera <German.Rivera@freescale.com>
2014-07-03 08:40:31 +02:00
Darwin Rambo
261d27605c arm: Add support for semihosting for armv8 fastmodel targets.
The armv8 ARM Trusted Firmware (ATF) can be used to load various ATF
images and u-boot, and does this for virtual platforms by using
semihosting. This commit extends this idea by allowing u-boot to also
use semihosting to load the kernel/ramdisk/dtb. This eliminates the need
for a bootwrapper and produces a more realistic boot sequence with
virtual models.

Though the semihosting code is quite generic, support for armv7 in
fastmodel is less useful due to the wide range of available silicon
and the lack of a free armv7 fastmodel, so this change contains an
untested armv7 placeholder for the service trap opcode.

Please refer to doc/README.semihosting for a more detailed description
of semihosting and how it is used with the armv8 virtual platforms.

Signed-off-by: Darwin Rambo <drambo@broadcom.com>
Cc: trini@ti.com
Cc: fenghua@phytium.com.cn
Cc: bhupesh.sharma@freescale.com
2014-07-03 08:35:45 +02:00
Stephen Warren
ad3091ad03 i2c: tegra: dump alen in debug statements
Since tegra_i2c_{read,write}'s debug() call dumps the chip address, dump
the address length (alen) too, so the address value can be correctly
interpreted.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Yen Lin <yelin@nvidia.com>
2014-07-03 06:29:39 +02:00
Stephen Warren
981b14f01a i2c: tegra: write clean data to TX FIFO
The Tegra I2C controller's TX FIFO contains 32-bit words. If the final
FIFO entry of a transaction contains fewer than 4 bytes, the driver
currently fills the unused FIFO bytes with uninitialized data. This can
be confusing when reading back the FIFO content for debugging purposes.

Solve this by explicitly initializing the variable containing FIFO data
before filling it (partially) with data. With this change,
send_recv_packets()'s loop's if (is_write) code mirrors the else (i.e.
read) branch.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Yen Lin <yelin@nvidia.com>
2014-07-03 06:29:31 +02:00
Stephen Warren
68049a082b i2c: tegra: use repeated start for reads
I2C read transactions are typically implemented as follows:

START(write) address REPEATED_START(read) data... STOP

However, Tegra's I2C driver currently implements reads as follows:

START(write) address STOP START(read) data... STOP

This sequence confuses at least the AS3722 PMIC on the Jetson TK1 board,
leading to corrupted read data in some cases. Fix the driver to chain
the transactions together using repeated starts to solve this.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Yen Lin <yelin@nvidia.com>
2014-07-03 06:29:19 +02:00
Tom Rini
fe8b3212b7 Merge branch 'master' of git://git.denx.de/u-boot-arm 2014-07-02 16:38:02 -04:00
Tom Rini
a176ff0705 Prepare v2014.07-rc4
Signed-off-by: Tom Rini <trini@ti.com>
2014-07-02 13:36:19 -04:00
Stephen Warren
dcb89b5aa0 usb: ci_udc: use var name ep/ci_ep consistently
Almost all of ci_udc.c uses variable name "ep" for a struct usb_ep and
"ci_ep" for a struct ci_ep. This is nice and consistent, and helps people
know what type a variable is without searching for the declaration.
handle_ep_complete() doesn't do this, so fix it to be consistent.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-07-02 15:45:38 +02:00
Stephen Warren
369d3c439a USB: gadget: atmel: zero out allocated requests
A UDC's alloc_request method should zero out the newly allocated request.
Ensure the Atmel driver does so. This issue was found by code inspection,
following the investigation of an intermittent issue with ci_udc, which
was tracked down to failing to zero out allocated requests following some
of my changes. All other UDC drivers already zero out requests in one
way or another.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-07-02 15:45:38 +02:00