Commit graph

77734 commits

Author SHA1 Message Date
Heinrich Schuchardt
c672dd770e test: test UTF-16 truncation in snprintf()
Check that snprintf() returns the correct required buffer length and prints
the correct string for UTF-16 strings.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-02-05 20:20:01 +01:00
Heinrich Schuchardt
fe14f88050 lib: fix snprintf() for UTF-16 strings
snprintf() must return the required buffer length.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-02-05 20:20:01 +01:00
Heinrich Schuchardt
b9b4cecf9b efi_selftest: merge FDT and RISC-V tests
The test for the RISCV_EFI_BOOT_PROTOCOL retrieves the boot hart id via the
protocol and compares it to the value of the boot hart id in the device
tree. The boot hart id is already retrieved from the device tree in the FDT
test.

Merge the two tests to avoid code duplication.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-02-05 20:20:01 +01:00
Sunil V L
8efefcec00 efi_selftest: unit test for RISCV_EFI_BOOT_PROTOCOL
Add a test for the RISCV_EFI_BOOT_PROTOCOL.

Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
2022-02-05 20:20:01 +01:00
Heinrich Schuchardt
de44d80e99 configs: disable UEFI for Colibri VF610
The size of the board file is limited to 520192 bytes. This conflicts with
the size requirement for the UEFI code.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-02-05 20:20:01 +01:00
Marek Vasut
2b8e304b93 ARM: imx6: dh-imx6: Add update_sf script to install U-Boot into SF
Add script to read U-Boot from SD card and write it to matching
locations in the SPI NOR, thus making the SPI NOR bootable.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2022-02-05 15:49:02 +01:00
Heiko Thiery
16c7369ede board: kontron: pitx-imx8m: Add Kontron pitx-imx8m board support
The Kontron pitx-imx8m is an NXP i.MX8MQ based board in the pITX form factor.

Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
2022-02-05 15:49:02 +01:00
Angus Ainslie
be63dc7956 mach-imx: iomux-v3: add a define for the SION bit
SION (Software Input On Field) - force the select mode input path

Signed-off-by: Angus Ainslie <angus@akkea.ca>
2022-02-05 15:49:02 +01:00
Angus Ainslie
881c8a6154 arm: dts: imx8mq kernel dts updates
Update to the 5.16 imx8mq dts files and dt bindings

Changes since v1:

Dropped rfkill.h that is not in linux mainline yet.

Signed-off-by: Angus Ainslie <angus@akkea.ca>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2022-02-05 15:49:02 +01:00
Dario Binacchi
0c9c5d2ca5 mx6: crm_regs: drop BM_ANADIG_ANA_MISC0_REFTOP_VBGADJ
Commit 97c16dc8bf ("imx: mx6ull: update the REFTOP_VBGADJ setting")
made this macro unused. Then remove it.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2022-02-05 15:49:02 +01:00
Dario Binacchi
c1af358cf5 imx: mx6ull: fix REFTOP_VBGADJ setting
The previous code wrote the contents of the fuse as is in the
REFTOP_VBGADJ[2:0], but this was wrong if you consider the contents of
the table in the code comment. This table is also different from the
table in the commit description. But then, which of the two is correct?
If it is assumed that an unprogrammed fuse has a value of 0 then for
backward compatibility of the code REFTOP_VBGADJ[2:0] must be set to
6 (b'110). Therefore, the table in the code comment can be considered
correct as well as this patch.

Fixes: 97c16dc8bf ("imx: mx6ull: update the REFTOP_VBGADJ setting")
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2022-02-05 15:49:02 +01:00
Heiko Thiery
04638fabb3 configs/*imxrt10*: remove [SPL_]CLK_COMPOSITE_CCF
This option is selected implicitly when [SPL_]CLK_IMXRT10{20|50} is selected.

Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2022-02-05 15:49:01 +01:00
Heiko Thiery
bfbdf9eabf clk: imx: select [SPL_]CLK_COMPOSITE_CCF for imxrt10{20|50}
The clock composite is required when using the clock framework. So
select it automatically.

Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2022-02-05 15:49:01 +01:00
Richard Zhu
0e0ae730bb arm64: dts: imx8mm: Add the pcie support
Add the PCIe support on i.MX8MM platforms.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Tim Harvey <tharvey@gateworks.com>
Tested-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Marek Vasut <marex@denx.de> # Pick from Linux 854a4766ac12 ("arm64: dts: imx8mm: Add the pcie support")
2022-02-05 15:49:01 +01:00
Richard Zhu
f1cc436247 arm64: dts: imx8mm: Add the pcie phy support
Add the PCIe PHY support on iMX8MM platforms.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Tim Harvey <tharvey@gateworks.com>
Tested-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Marek Vasut <marex@denx.de> # Pick from Linux b9ec888f636f ("arm64: dts: imx8mm: Add the pcie phy support")
2022-02-05 15:49:01 +01:00
Richard Zhu
10a99f0c22 dt-bindings: phy: phy-imx8-pcie: Add binding for the pad modes of imx8 pcie phy
Add binding for reference clock PAD modes of the i.MX8 PCIe PHY.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Tim Harvey <tharvey@gateworks.com>
Tested-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1638432158-4119-2-git-send-email-hongxing.zhu@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Marek Vasut <marex@denx.de> # Pick from Linux f6f787874aa5 ("dt-bindings: phy: phy-imx8-pcie: Add binding for the pad modes of imx8 pcie phy")
2022-02-05 15:49:01 +01:00
Adam Ford
3d14bd2d20 imx: imx8mn_beacon: Remove redundant code
The function to return the default MMC device for the environment
already has a __weak instance doing exactly the same thing.  Remove
the superfluous one.

Signed-off-by: Adam Ford <aford173@gmail.com>
2022-02-05 15:49:01 +01:00
Adam Ford
586cb71e13 imx: imx8mm_beacon: Remove redundant code
The function to return the default MMC device for the environment
already has a __weak instance doing exactly the same thing.  Remove
the superfluous one.

Signed-off-by: Adam Ford <aford173@gmail.com>
2022-02-05 15:49:01 +01:00
Oliver Graute
8f55003c58 imx: imx8qm_rm7720: adjust fdt_addr
The Linux Kernel Image size for arm64 is still growing.
A Kernel with 54 MB at load address 0x80280000 overlaps
with fdt_addr at 0x83000000. So let's increase it to 0x84000000

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
2022-02-05 15:49:01 +01:00
Oliver Graute
a7e22ec90e imx: imx8qm_rom7720: Increase CONFIG_SYS_BOOTM_LEN to 64MB
Increase CONFIG_SYS_BOOTM_LEN to 64MB

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
2022-02-05 15:49:01 +01:00
Adam Ford
2c7ebf7778 imx: imx8mn_beacon: Fix USB booting
The i.MX8M Nano can boot over USB using the boot ROM instead of
adding extra code to SPL to support USB drivers, etc.  However,
when booting from USB, the environment doesnt' know where to load
and causes a hang.  Fix this hang by supporting CONFIG_ENV_IS_NOWHERE=y.
It only falls back to this condition when booting from USB, so it
does not impact MMC booting.

Suggested-by: Michael Nazzareno Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2022-02-05 15:49:01 +01:00
Ying-Chun Liu (PaulLiu)
6c3373b386 arm: dts: add imx8mp-rsb3720-a1 dts file
Add board dts for Advantech's imx8mp-rsb3720-a1

Signed-off-by: Darren Huang <darren.huang@advantech.com.tw>
Signed-off-by: Kevin12.Chen <Kevin12.Chen@advantech.com.tw>
Signed-off-by: Phill.Liu <Phill.Liu@advantech.com.tw>
Signed-off-by: Tim Liang <tim.liang@advantech.com.tw>
Signed-off-by: wei.zeng <wei.zeng@advantech.com.cn>
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: uboot-imx <uboot-imx@nxp.com>
2022-02-05 15:49:01 +01:00
Marek Vasut
dd4b3ca52c arm64: dts: imx8mm: Add missing MX8MM_IOMUXC_NAND_READY_B_SD3_RESET_B
The i.MX8M Mini Application Processor Reference Manual, Rev. 3, 11/2020
documents AF MX8MM_IOMUXC_NAND_READY_B_SD3_RESET_B , add it into the
pinmux tables.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2022-02-05 15:49:01 +01:00
Oliver Stäbler
9aac5c3c7e arm64: dts: imx8mm/q: Fix pad control of SD1_DATA0
Fix address of the pad control register
(IOMUXC_SW_PAD_CTL_PAD_SD1_DATA0) for SD1_DATA0_GPIO2_IO2.  This seems
to be a typo but it leads to an exception when pinctrl is applied due to
wrong memory address access.

Signed-off-by: Oliver Stäbler <oliver.staebler@bytesatwork.ch>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Fixes: c1c9d41319c3 ("dt-bindings: imx: Add pinctrl binding doc for imx8mm")
Fixes: 748f908cc882 ("arm64: add basic DTS for i.MX8MQ")
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Marek Vasut <marex@denx.de> # Picked from Linux 5cfad4f45806f ("arm64: dts: imx8mm/q: Fix pad control of SD1_DATA0")
2022-02-05 15:49:01 +01:00
Marek Vasut
2c9d2acefa ARM: imx: imx8m: Add PLL 1.4 GHz, 1.5 GHz, 1.6 GHz, 1.8 GHz options
Add PLL 1.4 GHz, 1.5 GHz, 1.6 GHz, 1.8 GHz options for iMX8M SoCs
in case they should be operated faster, e.g. to improve boot time.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2022-02-05 15:49:01 +01:00
Marek Vasut
66e90be99f ARM: imx: imx8m: Align PLL 1.2 GHz option with Linux
Linux uses slightly different divider settings for the 1.2 GHz PLL
configuration, adjust the coefficients to match Linux.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2022-02-05 15:49:01 +01:00
Marek Vasut
1b7f00eb1f regulator: bd718x7: Bypass bogus warnings
When regulator consumer attempts to set enabled DVS regulator voltage,
the driver aborts with "Only DVS bucks can be changed when enabled".
In case the regulator is already set to specified voltage, do nothing
instead of failing outright.

When regulator consumer attempts to set enables regulator which cannot
be controlled because it is already always enabled, the driver aborts
with -EINVAL. Again, do nothing in such case and return 0, because the
request is really fulfilled, the regulator is enabled.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
2022-02-05 15:49:01 +01:00
Andrey Zhizhikin
1289ff7bd7 imx8m: lock id_swap_bypass bit in tzc380 enable
According to TRM for i.MX8M Nano and Plus, GPR10 register contains lock
bit for TZASC_ID_SWAP_BYPASS bit. This bit is required to be set in
order to avoid AXI bus errors when GPU is enabled on the platform.
TZASC_ID_SWAP_BYPASS bit is alread set for all imx8m applicable
derivatives, but is missing a lock settings to be applied.

Set the TZASC_ID_SWAP_BYPASS_LOCK bit for those derivatives which have
it implemented.

Since we're here, provide also names to bits from TRM instead of using
BIT() macro in the code.

Fixes: deca6cfbf5 ("imx8mn: set BYPASS ID SWAP to avoid AXI bus errors")
Fixes: a07c718129 ("imx8mp: set BYPASS ID SWAP to avoid AXI bus errors")
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Cc: Peng Fan <peng.fan@nxp.com>
2022-02-05 15:49:01 +01:00
Adam Ford
3113861beb imx: imx8mn_beacon: Enable TrustZone
When the board was added, enabling tzc380 was left off by
mistake.

Signed-off-by: Adam Ford <aford173@gmail.com>
2022-02-05 15:49:01 +01:00
Adam Ford
2f95456a9a imx: imx8mm_beacon: Enable USB
With the updated device tree's having USB support, enable in
U-Boot.  This also requires the addition of the imx8m power
domain, since the USB is gated by the power domain controller.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2022-02-05 15:49:01 +01:00
Adam Ford
d81c6a9f63 arm: dts: imx8mm-beacon: Resync dtsi with Kernel 5.17-rc1
Resync the SOM and baseboar files with the device trees that will
be included in 5.17-RC1 when it's cut.  This will improve pinmuxing
for USDHC1 and add USB functionality.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2022-02-05 15:49:01 +01:00
Fabio Estevam
9376d799de smegw01: Update DDR initialization
Sync with the latest DDR initialization from Phytec, which
uses version 1.2 of NXP's i.MX7D DRAM Register Programming Aid
spreadsheet.

This updated DDR initialization fixes occasional system freeze.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2022-02-05 15:49:01 +01:00
Andrey Zhizhikin
94588ff395 imx8mn-ddr4-evk: generate single bootable image
As suggested in commit 028abfd9b1 ("imx8mm-evk: Generate a single
bootable flash.bin again") for imx8mm_evk, it is possible to produce
single bootable image via binman. This restores the original behavior in
distros, where only one boot container is used to create target image.

Perform similar adaptions in order to provide single bootable image for
imx8mn-ddr4-evk derivate.

Update documentation to drop additional step of copying u-boot.itb

Fixes: 353dfe4b43 ("imx8mn-ddr4-evk: switch to use binman")
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2022-02-05 15:49:01 +01:00
Andrey Zhizhikin
8c34cdc735 imx: ventana: correct splashimage load address
Commit 72d81360aa ("global: Convert CONFIG_LOADADDR to
CONFIG_SYS_LOADADDR") dropped the usage of LOADADDR and replaced it with
SYS_LOADADDR.

Use the correct macro in environment by replacing CONFIG_LOADADDR with
CONFIG_SYS_LOADADDR.

Fixes: d75ebf3482 ("imx: ventana: fix splash logo drawing")
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Cc: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Acked-By: Tim Harvey <tharvey@gateworks.com>
2022-02-05 15:49:01 +01:00
Andrey Zhizhikin
efaf9a2b32 imx8mq_evk: configs: add/cleanup variables for distro boot
Add fdt_addr_r fdtfile which used by distro boot, and cleanup legacy
environment variables.

Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
2022-02-05 15:49:01 +01:00
Patrick Wildt
ea4e9387e3 arm64: dts: imx8mq-u-boot.dtsi: improve odd blob-ext naming
Rather than using odd implicit blob-ext naming, explicitly specify the
type to be of blob-ext and therefore also simplify the node naming.

Signed-off-by: Patrick Wildt <patrick@blueri.se>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-02-05 15:49:01 +01:00
Patrick Wildt
49f55653fd arm64: dts: imx8mm-u-boot.dtsi: use dash for node names
Some of the nodes were named using a underscore, so rectify this and
consistenly use dashes.

Signed-off-by: Patrick Wildt <patrick@blueri.se>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-02-05 15:49:01 +01:00
Patrick Wildt
553216f6f9 arm64: dts: imx8mq-u-boot.dtsi: explicitly add spl filename
Explicitly add SPL aka u-boot-spl.bin filename.

Signed-off-by: Patrick Wildt <patrick@blueri.se>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-02-05 15:49:01 +01:00
Patrick Wildt
440c7d1188 arm64: dts: imx8mq-u-boot.dtsi: alphabetically re-order properties
Alphabetically re-order properties.

Signed-off-by: Patrick Wildt <patrick@blueri.se>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-02-05 15:49:01 +01:00
Fabio Estevam
23b1d8e24a doc: verdin-imx8mm: Remove ATF_LOAD_ADDR export
imx8mm-u-boot.dtsi passes the ATF load address via the
'entry' and 'load' properties.

Remove the step that performs the ATF_LOAD_ADDR export, which is
now unneeded.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Patrick Wildt <patrick@blueri.se>
2022-02-05 15:49:01 +01:00
Fabio Estevam
59c3b712ad doc: sl-mx8mm: Remove ATF_LOAD_ADDR export
imx8mm-u-boot.dtsi passes the ATF load address via the
'entry' and 'load' properties.

Remove the step that performs the ATF_LOAD_ADDR export, which is
now unneeded.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Patrick Wildt <patrick@blueri.se>
2022-02-05 15:49:01 +01:00
Fabio Estevam
9482a60de9 doc: imx8mm_evk: Remove ATF_LOAD_ADDR export
imx8mm-u-boot.dtsi passes the ATF load address via the
'entry' and 'load' properties.

Remove the step that performs the ATF_LOAD_ADDR export, which is
now unneeded.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Patrick Wildt <patrick@blueri.se>
2022-02-05 15:49:01 +01:00
Heiko Thiery
1bcda4efed imx: imx8mm: imx8mm-kontron-n801x-s: add common board u-boot.dtsi
When using a board variant that selects the lvds specific dtb the
*.u-boot.dtsi file will not be included. To have a lvds dtb specific
u-boot.dtsi file move this part to a common board u-boot.dtsi file and
include this in the board base u-boot.dtsi and create an additional one
for the lvds variant.

Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
2022-02-05 15:49:01 +01:00
Heiko Thiery
b72b1716c0 imx: imx8mm: imx8mm-kontron-n801x-s: convert options to Kconfig
CONFIG_SPL_MMC and CONFIG_SPL_SERIAL

Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
2022-02-05 15:49:00 +01:00
Gary Bisson
18956cd419 cmd: bcb: fix bcb struct alignment issue
Without this patch the bcb struct could be located at an odd address
which resulted in data not being copied to the buffer.

Here was the repro steps (from Mattijs):
=> mmc dev 1
=> bcb load 1 misc
=> bcb dump command
00000000: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00000010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
=> part start mmc 1 misc misc_start
=> mmc read ${loadaddr} ${misc_start} 4
=> bcb load 1 misc
=> bcb dump command
00000000: 62 6f 6f 74 6f 6e 63 65 2d 62 6f 6f 74 6c 6f 61
00000010: 64 65 72 00 00 00 00 00 00 00 00 00 00 00 00 00

This behavior was observed on an Amlogic A311D (ARM64) platform with a
recent GCC toolchain (11.2.0) but is most likely affecting other
platforms.

To avoid issues the structure is aligned on DMA minimum alignment value
as it is passed directly to the read function.

Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> # on khadas vim3
2022-02-05 15:49:00 +01:00
Ying-Chun Liu (PaulLiu)
f8a5cda5ec configs: imx8mm-cl-iot-gate: update dfu_alt_info for single flash.bin
We changed to single flash.bin now. So dfu_alt_info should be modified
to reflect this change.

Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2022-02-05 15:49:00 +01:00
Michael Trimarchi
02737ac86d cmd_nandbcb: Support secondary boot address of imx8mn
Add support of secondary boot address for imx8mn. The secondary
boot address is hardcoded in the fuse. The value is calculated
from there according to the following description:

The fuse IMG_CNTN_SET1_OFFSET (0x490[22:19]) is defined as follows:
- Secondary boot is disabled if fuse value is bigger than 10, n = fuse
  value bigger than 10.
- n == 0: Offset = 4MB
- n == 2: Offset = 1MB
- Others & n <= 10 : Offset = 1MB*2^n
- For FlexSPI boot, the valid values are: 0, 1, 2, 3, 4, 5, 6, and 7.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
2022-02-05 13:38:39 +01:00
Sven Schwermer
0be742d06d imx: Enable ACTLR.SMP in SPL for i.MX6/7
Similar to what has been done before with c5437e5b for u-boot proper, we
enable the SMP bit for SPL as well. This is necessary when SDP booting
straight into Linux, i.e. falcon boot. When SDP boot mode is active, the
ROM code does not set this bit which makes the caches not work once
activated in Linux.

On an i.MX6ULL (528MHz), this reduces a minimal kernel's boot time into
an initramfs shell from ~6.1s down to ~1.2s.

Signed-off-by: Sven Schwermer <sven@svenschwermer.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2022-02-05 13:38:39 +01:00
Marek Vasut
0c5cc164a9 Makefile: imx: Do not call arch/arm/mach-imx flash.bin generation if BINMAN enabled
Skip running arch/arm/mach-imx flash.bin generation in case BINMAN is
enabled, otherwise the target in arch/arm/mach-imx/Makefile regenerates
the flash.bin again and produces corrupted result.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Peng Fan <peng.fan@oss.nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-02-05 13:38:39 +01:00
Marek Vasut
8ed378ff78 ARM: dts: imx: Synchronize iMX6QDL DHCOM PDK2 DTs with Linux 5.15.12
Synchronize DH DHCOM DTs with Linux commit 25960cafa06e ("Linux 5.15.12").
There is no functional change to the resulting DTs. The imx6qdl-dhcom-pdk2.dtsi
had to be adjusted with additional headers, gpio.h, pwm.h, input.h, else
the DT cannot be compiled, the same change is likely necessary in Linux.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2022-02-05 13:38:39 +01:00