Commit graph

66 commits

Author SHA1 Message Date
Grzegorz Jaszczyk
f635c3b3a2 phy: marvell: cp110: let the firmware configure comphy for USB
Replace the comphy initialization for USB with appropriate SMC call,
so the firmware will execute required serdes configuration.

Change-Id: I7f773c0dfac70db9dd2653de2cdcfac577e78c4e
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
2021-04-29 07:45:24 +02:00
Grzegorz Jaszczyk
26d9763f3b phy: marvell: cp110: let the firmware configure comphy for RXAUI
Replace the comphy initialization for RXAUI with appropriate SMC call,
so the firmware will execute required serdes configuration.

Change-Id: Iedae0285fb283e05bb263a8b4ce46e8e7451a309
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
2021-04-29 07:45:24 +02:00
Marcin Wojtas
5ed3dc27bb phy: marvell: cp110: remove unused definitions
Even if comphy types of SATA2/SATA3/SGMII3 and comphy speeds of
1.5G/3G/6.25G were referenced in the driver non configuration (dts)
was using it.

This patch removes unused definitions.

Change-Id: I53ed6f9d3a82b9d18cb4e488bc14d3cf687f9488
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
2021-04-29 07:45:24 +02:00
Igal Liberman
b21e1f36d4 phy: marvell: enable comphy info prints for all devices
Change-Id: I3b97253e7102a0868440a9e0200acc1c7919c743
Signed-off-by: Igal Liberman <igall@marvell.com>
2021-04-29 07:45:24 +02:00
Igal Liberman
e49cdbe10b phy: marvell: add RX training command
This patch adds support for running RX training using new command called
"rx_training"
Usage:
rx_training - rx_training <cp id> <comphy id>

RX training allows to improve link quality (for SFI mode)
by running training sequence between us and the link partner,
this allows to reach better link quality then using static configuration.

Change-Id: I818fe67ccaf19a87af50d4c34a9db7d6802049a5
Signed-off-by: Igal Liberman <igall@marvell.com>
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
2021-04-29 07:45:24 +02:00
Igal Liberman
7b27e608f8 phy: marvell: save comphy_map_data priv structure
This allows the lower level driver access to comphy map data
(required for RX training support, which is introduced
in the following patches).

Change-Id: Ib7ffdc4b32076c01c3a5d33f59552c9dfc6b12fa
Signed-off-by: Igal Liberman <igall@marvell.com>
2021-04-29 07:45:24 +02:00
Igal Liberman
c2bf42f5fd phy: marvell: fix several minor bugs in comphy_probe
If fdtdec_get_int can't find speed, set COMPHY_SPEED_INVALID
If fdtdec_get_int can't find type, set COMPHY_TYPE_INVALID
Move the error print if phy-type is invalid
Add continue to the probe loop (in a case of invalid phy)
Cosmetic changes

Change-Id: I0c61b40bfe685437426fe907942ed338b7845378
Signed-off-by: Igal Liberman <igall@marvell.com>
2021-04-29 07:45:24 +02:00
Igal Liberman
3e69b4abff phy: marvell: cp110: utmi: update analog parameters according to latest ETP
Add UTMI analog parameters initialization values according to
latest ETP.

Change-Id: I5bcca205a3995202a18ff126f371a81f69e205c8
Signed-off-by: Igal Liberman <igall@marvell.com>
2021-04-29 07:45:24 +02:00
Omri Itach
22bc868e49 phy: marvell: cp110: initialize only enabled UTMI units
UTMI should be initialized only for enabled device tree nodes.

This fix overrides current internal configuration array
entry with the next DT entry data if error is detected
during the current DT entry parsing or the current port
is disabled.

This way the internal configuration structure will only
contain valid ports information obtained from the DT.

Change-Id: I9c43c6a5d234e15ae9005d1c9bc983fc1f3544b8
Signed-off-by: Omri Itach <omrii@marvell.com>
Signed-off-by: Ken Ma <make@marvell.com>
2021-04-29 07:45:24 +02:00
Igal Liberman
89351ba4c8 phy: marvell: add missing speed during info prints
In get_speed_string() we have an array (speed_strings[])
which includes all possible speed strings.
This array size and content must be aligned to the speed
defines in comphy_data.h.

This patch adds missing 5.125G speed, aligns speed_strings[]
and fixes incorrect printing when speed > 5.0G.

Change-Id: I9900d23595094be321be0c62fcaa88036324568e
Signed-off-by: Igal Liberman <igall@marvell.com>
2021-04-29 07:45:24 +02:00
Igal Liberman
2dbba24088 phy: marvell: rename comphy related definitions to COMPHY_XX
Currently, all comphy definitions are PHY_TYPE_XX and PHY_SPEEED_XX.
Those definition might be confused with MDIO PHY definitions.

This patch does the following changes:
 - PHY_TYPE_XX --> COMPHY_TYPE_XX
 - PHY_SPEED_XX --> COMPHY_SPEED_XX

This improves readability, no functional change.

Change-Id: I2bd1d9289ebbc5c16fa80f9870f797ea1bcaf5fa
Signed-off-by: Igal Liberman <igall@marvell.com>
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
2021-04-29 07:45:24 +02:00
jinghua
4568e2041c phy: marvell: add comphy type PHY_TYPE_USB3
- For some Marvell SoCs, like armada-3700, there are both
  USB host and device controller, but on PHY level the
  configuration is the same.
- The new type supports both USB device and USB host
- This patch is cherry-picked from u-boot-2015 as-is.

Change-Id: I01262027edd8ec23391cff6fb409b3009aedfbb9
Signed-off-by: jinghua <jinghua@marvell.com>
Signed-off-by: Ken Ma <make@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
2021-04-29 07:45:23 +02:00
Simon Glass
401d1c4f5d common: Drop asm/global_data.h from common header
Move this out of the common header and include it only where needed.  In
a number of cases this requires adding "struct udevice;" to avoid adding
another large header or in other cases replacing / adding missing header
files that had been pulled in, very indirectly.   Finally, we have a few
cases where we did not need to include <asm/global_data.h> at all, so
remove that include.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-02-02 15:33:42 -05:00
Simon Glass
41575d8e4c dm: treewide: Rename auto_alloc_size members to be shorter
This construct is quite long-winded. In earlier days it made some sense
since auto-allocation was a strange concept. But with driver model now
used pretty universally, we can shorten this to 'auto'. This reduces
verbosity and makes it easier to read.

Coincidentally it also ensures that every declaration is on one line,
thus making dtoc's job easier.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 08:00:25 -07:00
Igal Liberman
3261f6d390 phy: marvell: cp110: update mode parameter for pcie power on calls
It helps ATF to determine who called power on function (U-boot/Linux).

The corresponding ATF code was added in this commit:

  mvebu: cp110: avoid pcie power on/off sequence when called from Linux
  55df84f974

Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2020-10-29 08:00:12 +01:00
Grzegorz Jaszczyk
0a1a1642aa phy: marvell: cp110: let the firmware configure comphy for PCIe
Replace the comphy initialization for PCIe with appropriate SMC call, so
the firmware will perform appropriate comphy initialization.

Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Signed-off-by: Ken Ma <make@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2020-10-29 08:00:12 +01:00
Grzegorz Jaszczyk
b24bb99df1 phy: marvell: cp110: let the firmware configure the comphy
Replace all comphy initialization with appropriate smc calls. It will
result with triggering synchronous exception that is handled by Secure
Monitor code in EL3. Then the Secure Monitor code will dispatch each smc
call (by parsing the smc function identifier) and triggers appropriate
comphy initialization.

This patch reworks serdes handling for: SATA, SGMII, HS-SGMII and SFI
interfaces.

Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2020-10-29 08:00:12 +01:00
Sean Anderson
b9442a01f5 phy: marvell: Fix not calling dev_err with a device
No need for indirection here.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-30 08:53:28 -04:00
zachary
7757c85199 phy: marvell: a3700: add sata comphy on lane 2 with invert option
- This patch moves sata phy powerup from dedicate phy to compphy
  and adds invert option for sata powerup routine.

Change-Id: I1b4e8753e2b2c14c6efa97bca2ffc7d2553d8a90
Signed-off-by: zachary <zhangzg@marvell.com>
Signed-off-by: Ken Ma <make@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/53601
Reviewed-by: Igal Liberman <igall@marvell.com>
Tested-by: Igal Liberman <igall@marvell.com>
[a.heider: adapt to mainline]
Signed-off-by: Andre Heider <a.heider@gmail.com>
Tested-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-09-04 14:02:00 +02:00
Simon Glass
c05ed00afb common: Drop linux/delay.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
f7ae49fc4f common: Drop log.h from common header
Move this header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:18 -04:00
Simon Glass
4d72caa5b9 common: Drop image.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 17:33:33 -04:00
Simon Glass
336d4615f8 dm: core: Create a new header file for 'compat' features
At present dm/device.h includes the linux-compatible features. This
requires including linux/compat.h which in turn includes a lot of headers.
One of these is malloc.h which we thus end up including in every file in
U-Boot. Apart from the inefficiency of this, it is problematic for sandbox
which needs to use the system malloc() in some files.

Move the compatibility features into a separate header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05 19:33:46 -07:00
Simon Glass
61b29b8268 dm: core: Require users of devres to include the header
At present devres.h is included in all files that include dm.h but few
make use of it. Also this pulls in linux/compat which adds several more
headers. Drop the automatic inclusion and require files to include devres
themselves. This provides a good indication of which files use devres.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-02-05 19:33:46 -07:00
Rabeeh Khoury
d13b740ca6 phy: marvell: add SATA comphy RX/TX polarity invert support
This patch adds support to Armada 7k/8k comphy RX/TX lane swap. The
'phy-invert' DT property defines the inverted signals.

Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19 13:54:27 +02:00
Marek Behún
4b8cb84327 phy: marvell: Support changing SERDES map in board file
This adds a weak definition of comphy_update_map to comphy_core,
which does nothing. If this function is defined elsewhere, for example
in board file, the board file can change some parameters of SERDES
configuration.

This is needed on Turris Mox, where the SERDES speed on lane 1 has to
be set differently when SFP module is connected and when Topaz Switch
module is connected.

This is a temporary solution. When the comphy driver for armada-3720
will be added to the kernel, the comphy driver in u-boot shall also be
updated and this should be done differently then.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-09-19 08:59:26 +02:00
Marek Behún
ca734a875d phy: marvell: a3700: Fix compatible string for ehci
The DTS file for armada-37xx uses the string "marvell,armada3700-ehci",
but the code searched for "marvell,armada-3700-ehci".

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:01:56 +02:00
Marek Behún
2d7a0f4399 phy: marvell: core: Cosmetic fixes
Move the reg_set* functions into comphy.h as static inline functions.
Change return type of get_*_string to const char *.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:00:15 +02:00
Marek Behún
7288182aa6 phy: marvell: a3700: Save/restore selector reg in SGMII init
In SGMII initialization PIN_PIPE_SEL has to be zero when resetting
the PHY. Since comphy_mux already set the selector register to
correct values, we have to store it's value before setting it to 0
and restore it after SGMII init.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:00:15 +02:00
Marek Behún
22f418935b phy: marvell: a3700: Use comphy_mux on Armada 37xx.
Lane 0 supports SGMII1 and USB3.
Lane 1 supports SGMII0 and PEX0.
Lane 2 supports SATA0 and USB3.

This is needed for Armada 37xx.

This introduces new device tree bindings. AFAIK there is currently no
driver for Armada 37xx comphy in Linux. When such a driver will be
pushed into Linux, this will need to be rewritten accordingly.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:00:15 +02:00
Marek Behún
3282a3e75f phy: marvell: a3700: Fix SGMII cfg and stat register addresses
The register addresses on lanes 0 and 1 are switched, first comes 1 and
then 0.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:00:15 +02:00
Marek Behún
7586ac2b49 phy: marvell: mux: Support nontrivial node order in selector register
Currently comphy_mux supports only trivial order of nodes in pin
selector register, that is lane N on position N*bitcount.

Add support for nontrivial order, with map stored in device tree
property mux-lane-order.

This is needed for Armada 37xx.

As far as I know, there is no driver for Armada 37xx comphy in the
kernel. When such a driver comes, this will need to be rewritten to
support the device tree bindings from the kernel.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:00:15 +02:00
zachary
7d7f22fbd3 phy: marvell: a3700: revise the USB3 comphy setting during power on
This commit is based on commit d9899826 by
  zachary <zhangzg@marvell.com>
from u-boot-marvell, see
github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/d9899826

- According to design specification, the transmitter should be set to high
  impedence mode during electrical idle. Thus transmitter should detect RX
  at high impedence mode also, and delay is needed to accommodate high
  impedence off latency. Otherwise the USB3 will have detection issue that
  most of the time the USB3 device can not be detected at all, or be
  detected as USB2 device sometimes.
  Modified registers: RD005C302h (R181h) (0051h) Lane Configuration 1
  Bit 6: set to 1 to let Tx detect Rx at HiZ mode
  Bit [3:4]: set to 2 to be delayed by 2 clock cycles
  Bit 0: set to 1 to set transmitter to high impedance mode during idle.
- USB3 De-emphasize level of -3.5dB is mandatory, but USB3 MAC selects 0x2
  (emphasize disabled) in the MAC_PHY_TXDEEMPH [1:0], while it is supposed
  to select 0x1(3.5dB emphasize). Thus need to override what comes from
  the MAC(by setting register 0x1c2 bit2 to 0x1) and to configure the
  overridded values of MAC_PHY_TXDEEMPH [1:0] to 0x1(bit15 of register
  0x181 and bit0 of register 0x180).
- According to USB3 application note, need to update below comphy
  registers:
  Set max speed generation to USB3.0 5Gbps(set RD005C04Ah bit[11:10] to 1)
  Set capacitor value to 0xF(set RF005C224 bit[3:0] to 0xF)

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:00:15 +02:00
Marek Behún
de49bd0e73 phy: marvell: a3700: Set USB3 RX wait depending on ref clock
According to specification, CFG_PM_RXDLOZ_WAIT should be set to 0x7
when reference clock is at 25 MHz. The specification (at least the
version I have) does not mentoin the setting for 40 MHz reference
clock, but Marvell's U-Boot sets 0xC in that case.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:00:15 +02:00
Marek Behún
8609358261 phy: marvell: a3700: Access USB3 register indirectly on lane 2
When USB3 is on comphy lane 2 on the Armada 37xx, the registers
have to be accessed indirectly via SATA indirect access.

This is the case of the Turris Mox board from CZ.NIC.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:00:15 +02:00
Marek Behún
a2745c8803 phy: marvell: a3700: Use reg_set_indirect istead of 2 reg_sets
Create a special function for indirect register setting,
reg_set_indirect, and use it instead of the two calls to reg_set.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:00:15 +02:00
Marek Behún
1a9283ace5 phy: marvell: a3700: Use (!ret) instead of (ret == 0)
In U-Boot it is usually written this way.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:00:15 +02:00
Marek Behún
52f026e224 phy: marvell: a3700: Use same timeout for all register polling
The timeout is set to PLL_LOCK_TIMEOUT in every call to
comphy_poll_reg. Remove this parameter from the function.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:00:15 +02:00
Marek Behún
210f4aae81 phy: marvell: a3700: Don't create functional macro for each register
Currently there is for each register special functional macro, ie:
  LANE_CFG1_ADDR(u)
  GLOB_CLK_SRC_LO_ADDR(u)
  ...
where can be either PCIE or USB3.

Change this to one function PHY_ADDR(unit, addr). The code becomes:
  phy_addr(PCIE, LANE_CFG1)
  phy_addr(PCIE, GLOB_CLK_SRC_LO)
  ...

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:00:15 +02:00
Marek Behún
63cfff9fde phy: marvell: a3700: Use reg_set16 instead of phy_write16
The macro phy_write16 is not used by the rest of the code,
phy_read16 is not used at all.
We also change the macro SGMIIPHY_ADDR to a static inline function.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:00:15 +02:00
Marek Behún
fae82c8f83 phy: marvell: a3700: Change return type of macro MVEBU_REG
All the calls to reg_set and friends have to cast the first argument
to void __iomem *. Lets change the return type of the MVEBU_REG macro
instead.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-14 10:00:15 +02:00
Tom Rini
83d290c56f SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 09:34:12 -04:00
Masahiro Yamada
9b643e312d treewide: replace with error() with pr_err()
U-Boot widely uses error() as a bit noisier variant of printf().

This macro causes name conflict with the following line in
include/linux/compiler-gcc.h:

  # define __compiletime_error(message) __attribute__((error(message)))

This prevents us from using __compiletime_error(), and makes it
difficult to fully sync BUILD_BUG macros with Linux.  (Notice
Linux's BUILD_BUG_ON_MSG is implemented by using compiletime_assert().)

Let's convert error() into now treewide-available pr_err().

Done with the help of Coccinelle, excluing tools/ directory.

The semantic patch I used is as follows:

// <smpl>
@@@@
-error
+pr_err
 (...)
// </smpl>

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Re-run Coccinelle]
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-10-04 11:59:44 -04:00
Simon Glass
911f3aef35 dm: core: Rename of_device_is_compatible()
The of_ prefix conflicts with the livetree version of this function.
Rename it to avoid problems when we add livetree support.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 07:03:06 -06:00
Simon Glass
a821c4af79 dm: Rename dev_addr..() functions
These support the flat device tree. We want to use the dev_read_..()
prefix for functions that support both flat tree and live tree. So rename
the existing functions to avoid confusion.

In the end we will have:

   1. dev_read_addr...()    - works on devices, supports flat/live tree
   2. devfdt_get_addr...()  - current functions, flat tree only
   3. of_get_address() etc. - new functions, live tree only

All drivers will be written to use 1. That function will in turn call
either 2 or 3 depending on whether the flat or live tree is in use.

Note this involves changing some dead code - the imx_lpi2c.c file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 07:03:01 -06:00
Igal Liberman
ae07a70ac2 fix: phy: marvell: cp110: pcie: update analog parameters according to latest ETP
Add PCIE analog parameters initialization values according to
latest ETP.

Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-05-09 13:38:18 +02:00
Igal Liberman
528213d3fd fix: phy: marvell: cp110: rename comphy_index to cp_index
No functional change.
The variable name "comphy_index" is misleading, it represents
cp index and not comphy index.

Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-05-09 13:38:18 +02:00
Igal Liberman
781ea0aba5 fix: phy: marvell: cp110: sfi: update analog parameters according to latest ETP
Add SFI analog parameters initialization values according to
latest ETP.

Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-05-09 13:38:18 +02:00
Stefan Roese
52dc7b03dd phy: marvell: print comphy status even when it's disconnected
since now the COMPHY can also be ignored, we must know the
state of the COMPHY. we cannot assume anymore that a missing
COMPHY is unconnected.

Signed-off-by: Yehuda Yitschak <yehuday@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-05-09 13:38:18 +02:00
Stefan Roese
e7ed9574dd fix: phy: marvell: cp110: fix comphy lane 4 selection options
The comphy configuration is incorrect.
Set the correct values for SGMII.

In addition, remove xaui from the comment as it is not supported.

Signed-off-by: Yoav Gvili <ygvili@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-05-09 13:38:18 +02:00