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phy: marvell: cp110: remove unused definitions
Even if comphy types of SATA2/SATA3/SGMII3 and comphy speeds of 1.5G/3G/6.25G were referenced in the driver non configuration (dts) was using it. This patch removes unused definitions. Change-Id: I53ed6f9d3a82b9d18cb4e488bc14d3cf687f9488 Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
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4 changed files with 27 additions and 42 deletions
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@ -302,7 +302,7 @@
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phy-type = <COMPHY_TYPE_SFI>;
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};
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phy5 {
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phy-type = <COMPHY_TYPE_SGMII3>;
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phy-type = <COMPHY_TYPE_SGMII2>;
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phy-speed = <COMPHY_SPEED_3_125G>;
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};
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};
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@ -24,9 +24,8 @@ DECLARE_GLOBAL_DATA_PTR;
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static const char *get_speed_string(u32 speed)
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{
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static const char * const speed_strings[] = {
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"1.25 Gbps", "1.5 Gbps", "2.5 Gbps",
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"3.0 Gbps", "3.125 Gbps", "5 Gbps",
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"5.125 Gpbs", "6 Gbps", "6.25 Gbps",
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"1.25 Gbps", "2.5 Gbps", "3.125 Gbps",
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"5 Gbps", "5.125 Gpbs", "6 Gbps",
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"10.3125 Gbps"
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};
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@ -40,11 +39,10 @@ static const char *get_type_string(u32 type)
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{
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static const char * const type_strings[] = {
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"UNCONNECTED", "PEX0", "PEX1", "PEX2", "PEX3",
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"SATA0", "SATA1", "SATA2", "SATA3", "SGMII0",
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"SGMII1", "SGMII2", "SGMII3", "QSGMII", "USB3"
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"USB3_HOST0", "USB3_HOST1", "USB3_DEVICE",
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"XAUI0", "XAUI1", "XAUI2", "XAUI3",
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"RXAUI0", "RXAUI1", "SFI", "IGNORE"
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"SATA0", "SATA1", "SGMII0", "SGMII1", "SGMII2",
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"USB3", "USB3_HOST0", "USB3_HOST1",
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"USB3_DEVICE", "RXAUI0", "RXAUI1", "SFI", "AP",
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"IGNORE"
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};
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if (type < 0 || type > COMPHY_TYPE_MAX)
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@ -1130,8 +1130,6 @@ int comphy_cp110_init(struct chip_serdes_phy_config *ptr_chip_cfg,
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break;
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case COMPHY_TYPE_SATA0:
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case COMPHY_TYPE_SATA1:
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case COMPHY_TYPE_SATA2:
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case COMPHY_TYPE_SATA3:
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mode = COMPHY_FW_MODE_FORMAT(COMPHY_SATA_MODE);
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ret = comphy_sata_power_up(lane, hpipe_base_addr,
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comphy_base_addr,
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@ -1166,7 +1164,6 @@ int comphy_cp110_init(struct chip_serdes_phy_config *ptr_chip_cfg,
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mode);
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break;
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case COMPHY_TYPE_SGMII2:
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case COMPHY_TYPE_SGMII3:
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if (ptr_comphy_map->speed == COMPHY_SPEED_INVALID) {
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debug("Warning: SGMII PHY speed in lane %d is invalid, set PHY speed to 1.25G\n",
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lane);
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@ -7,16 +7,13 @@
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#define _COMPHY_DATA_H_
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#define COMPHY_SPEED_1_25G 0
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#define COMPHY_SPEED_1_5G 1
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#define COMPHY_SPEED_2_5G 2
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#define COMPHY_SPEED_3G 3
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#define COMPHY_SPEED_3_125G 4
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#define COMPHY_SPEED_5G 5
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#define COMPHY_SPEED_5_15625G 6
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#define COMPHY_SPEED_6G 7
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#define COMPHY_SPEED_6_25G 8
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#define COMPHY_SPEED_10_3125G 9
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#define COMPHY_SPEED_MAX 10
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#define COMPHY_SPEED_2_5G 1
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#define COMPHY_SPEED_3_125G 2
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#define COMPHY_SPEED_5G 3
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#define COMPHY_SPEED_5_15625G 4
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#define COMPHY_SPEED_6G 5
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#define COMPHY_SPEED_10_3125G 6
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#define COMPHY_SPEED_MAX 7
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#define COMPHY_SPEED_INVALID 0xff
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#define COMPHY_TYPE_UNCONNECTED 0
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@ -26,26 +23,19 @@
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#define COMPHY_TYPE_PEX3 4
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#define COMPHY_TYPE_SATA0 5
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#define COMPHY_TYPE_SATA1 6
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#define COMPHY_TYPE_SATA2 7
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#define COMPHY_TYPE_SATA3 8
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#define COMPHY_TYPE_SGMII0 9
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#define COMPHY_TYPE_SGMII1 10
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#define COMPHY_TYPE_SGMII2 11
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#define COMPHY_TYPE_SGMII3 12
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#define COMPHY_TYPE_QSGMII 13
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#define COMPHY_TYPE_USB3 14
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#define COMPHY_TYPE_USB3_HOST0 15
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#define COMPHY_TYPE_USB3_HOST1 16
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#define COMPHY_TYPE_USB3_DEVICE 17
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#define COMPHY_TYPE_XAUI0 18
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#define COMPHY_TYPE_XAUI1 19
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#define COMPHY_TYPE_XAUI2 20
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#define COMPHY_TYPE_XAUI3 21
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#define COMPHY_TYPE_RXAUI0 22
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#define COMPHY_TYPE_RXAUI1 23
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#define COMPHY_TYPE_SFI 24
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#define COMPHY_TYPE_IGNORE 25
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#define COMPHY_TYPE_MAX 26
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#define COMPHY_TYPE_SGMII0 7
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#define COMPHY_TYPE_SGMII1 8
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#define COMPHY_TYPE_SGMII2 9
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#define COMPHY_TYPE_USB3 10
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#define COMPHY_TYPE_USB3_HOST0 11
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#define COMPHY_TYPE_USB3_HOST1 12
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#define COMPHY_TYPE_USB3_DEVICE 13
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#define COMPHY_TYPE_RXAUI0 14
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#define COMPHY_TYPE_RXAUI1 15
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#define COMPHY_TYPE_SFI 16
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#define COMPHY_TYPE_AP 17
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#define COMPHY_TYPE_IGNORE 18
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#define COMPHY_TYPE_MAX 19
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#define COMPHY_TYPE_INVALID 0xff
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#define COMPHY_POLARITY_NO_INVERT 0
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