Commit graph

51417 commits

Author SHA1 Message Date
Kever Yang
633fdab0cb rk3399: Reserve space for ARM Trust Firmware
RK3399 needs reserve 0x200000 at the beginning of DRAM, for ATF bl31.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-07-31 07:24:20 -06:00
Xu Ziyuan
b357a7f752 rockchip: rk3036: update MAINTAINER file
Update MAINTAINER files for kylin_rk3036, evb_rk3036.

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-07-31 07:24:20 -06:00
Kever Yang
22948e1015 configs: rockchip: remove no use MACRO
The CONFIG_ROCKCHIP_COMMON and CONFIG_SPL_ROCKCHIP_COMMON are no use now,
remove them.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-07-31 07:24:20 -06:00
Kever Yang
46683f3da1 mmc-uclass: correct the device number
Not like the mmc-legacy which the devnum starts from 1, it starts from 0
in mmc-uclass, so the device number should be (devnum + 1) in get_mmc_num().

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2016-07-31 07:24:20 -06:00
Angelo Dureghello
5c928d0204 m68k: code reformatting for all start.S files
This patch is style-related only, to reformat all the start.S code,
actually not following a coherent style inside single files and
between different cpu start.S files.

Linux format has been respected, as
  - max line width at 80 columns
  - one 8 cols tab between asm instructions and operands
  - inline comments, where any, fixed at col 41

Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-07-30 22:59:18 +02:00
Vignesh R
08887ed450 ARM: am57xx_evm: Enable QSPI support
AM571x IDK and AM572x IDK EVMs have spansion s25fl256s QSPI flash on the
board connected to TI QSPI IP over CS0. Therefore enable QSPI support.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-07-30 00:15:07 +05:30
Vignesh R
9af6ce4248 ARM: dts: am57xx-idk-common: Enable support for QSPI
AM571x and AM572x IDK have a spansion s25fl256s QSPI flash on the board
connected to TI QSPI over CS0. Hence, add QSPI and flash slave
DT nodes.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-07-30 00:15:00 +05:30
Vignesh R
2ae9422145 configs: am43xx_evm_defconfig: Enable CONFIG_SPI_FLASH_BAR
AM437x SK and AM437x IDK EVMs have 64MB flash, therefore enable
CONFIG_SPI_FLASH_BAR to access flash regions above 16MB.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-07-30 00:15:00 +05:30
Vignesh R
70ebdd775b ARM: dts: dra7xx: Update spi-max-frequency for QSPI
According to AM572x DM SPRS953A, QSPI max bus speed is 76.8MHz.
Therefore update the spi-max-frequency value of QSPI node for DRA74 and
DRA72 evm. This increase flash read speed by ~2MB/s.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
2016-07-30 00:15:00 +05:30
Vignesh R
b9612bb2de configs: dra7xx: Update QSPI speed to 76.8MHz
Now that QSPI driver can support 76.8MHz, update the
CONFIG_SF_DEFAULT_SPEED to the same value.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
2016-07-30 00:15:00 +05:30
Vignesh R
a6f56ad1ee spi: ti_qspi: dra7xx: Add support to use 76.8MHz clock
According to AM572x DM SPRS953A, QSPI bus speed can be 76.8MHz, update
the driver to use the same.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
2016-07-30 00:15:00 +05:30
Lokesh Vutla
4d790788ce ARM: dra7xx: Change DPLL_PER_HS13 divider value
According to AM572x DM SPRS953A, QSPI bus speed can be 76.8MHz, hence
update QSPI input clock divider value (DPLL_PER_HS13) to provide 76.8MHz
clock, so that driver can use the same.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-07-30 00:15:00 +05:30
Wenyou Yang
b302669f46 sf: sf_params: Add AT25DF321 flash support
Add AT25DF321 flash support.
Fix AT25DF321A device name.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-07-30 00:15:00 +05:30
Vignesh R
fee3b6af90 spi: ti_qspi: Remove delay in read path for dra7xx
As per commit b545a98f5d ("spi: ti_qspi: Add delay
for successful bulk erase) says its added to meet bulk erase timing
constraints. But bulk erase is a cmd to flash and delay in read path
does not make sense. Morever, testing on DRA74/DRA72 evm has shown that
this delay is no longer required.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
2016-07-30 00:15:00 +05:30
Vignesh R
c595a28530 spi: ti_qspi: Fix compiler warning when DEBUG macro is set
clk_div is uninitialized at the beginning of ti_spi_set_speed(), move
debug() print after clk_div calculation to avoid compiler warning and to
have proper value of clk_div printed during debugging.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
2016-07-30 00:15:00 +05:30
Vignesh R
69eeefaa06 spi: ti_qspi: Fix failure on multiple READ_ID cmd
Populating QSPI_RD_SNGL bit(0x1) in priv->cmd means that value
QSPI_INVAL (0x4) is not written to CMD field of QSPI_SPI_CMD_REG in
ti_qspi_cs_deactivate(). Therefore CS is never deactivated between
successive READ ID which results in sf probe to fail.
Fix this by not populating priv->cmd with QSPI_RD_SNGL and OR it wih
priv->cmd as required (similar to the convention followed in the
driver).

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
2016-07-30 00:15:00 +05:30
Moritz Fischer
6bde34f1ae spi: Add support for N25Q016A
This commit adds support in the spi-nor driver for the
N25Q016A, a 16Mbit SPI NOR flash from Micron.

Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-07-30 00:15:00 +05:30
Tom Rini
4711e7f7af Merge branch 'master' of git://www.denx.de/git/u-boot-imx 2016-07-28 08:45:00 -04:00
Fabio Estevam
77cbd3a141 MAINTAINERS: i.MX: Add board/freescale/*mx* path
Pass the board/freescale/*mx*/ path as files maintained by Stefano
Babic.

While this is not ideal and does not cover all the i.MX board cases,
it gives at least a better hint for the /scripts/get_maintainer.pl
tool.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2016-07-28 13:27:22 +02:00
Fabio Estevam
4c97077ce7 mx7dsabresd: MAINTAINERS: Add mx7dsabresd_secure_defconfig
Add an entry for the mx7dsabresd_secure_defconfig target.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2016-07-28 13:27:21 +02:00
Stefan Agner
7626ba488e mx7_common: initialize generic timer on all CPU's
Use CONFIG_TIMER_CLK_FREQ to let the non-secure init code initialize
the generic timer on all CPU's. This allows to make use of the timer
freuquency register also on other CPU than the start CPU which is
important for KVM.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2016-07-28 13:27:21 +02:00
Diego Dorta
ec1935a243 mx6ul_14x14_evk: Remove unused define
Remove unused define constant.

Signed-off-by: Diego Dorta <diego.dorta@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2016-07-28 13:27:21 +02:00
Fabio Estevam
63326e6f0b cgtqmx6eval: Remove uneeded PHYS_SDRAM_SIZE
cgtqmx6eval uses the imx_ddr_size() function to calculate the DDR size in
runtime, so there is no need to define PHYS_SDRAM_SIZE.

Remove the unneeded definition.

Cc: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
2016-07-28 13:27:21 +02:00
Fabio Estevam
10ced52242 novena: Remove uneeded PHYS_SDRAM_SIZE
novena uses the imx_ddr_size() function to calculate the DDR size in
runtime, so there is no need to define PHYS_SDRAM_SIZE.

Remove the unneeded definition.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Marek Vasut <marex@denx.de>
2016-07-28 13:27:21 +02:00
Fabio Estevam
c6a51bab17 bx50v3: Use imx_ddr_size() for calculating the DDR size
imx_ddr_size() can be used to calculate the DDR size in runtime.

By using this function we no longer need to define PHYS_SDRAM_SIZE.

Cc: Martin Donnelly <martin.donnelly@ge.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2016-07-28 13:27:20 +02:00
Fabio Estevam
84c51687a7 aristainetos: Use imx_ddr_size() for calculating the DDR size
imx_ddr_size() can be used to calculate the DDR size in runtime.

By using this function we no longer need to define PHYS_SDRAM_SIZE.

Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Heiko Schocher <hs@denx.de>
2016-07-28 13:27:20 +02:00
Fabio Estevam
a13d3757f7 warp: Use imx_ddr_size() for calculating the DDR size
imx_ddr_size() can be used to calculate the DDR size in runtime.

By using this function we no longer need to define PHYS_SDRAM_SIZE.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2016-07-28 13:27:20 +02:00
Breno Lima
71813dcb56 warp7: Move some USB configuration options to defconfig
Currently it's recommended to move some configuration options to the
defconfig file.

Move some USB related options to the defconfig file.

Signed-off-by: Breno Lima <breno.lima@nxp.com>
2016-07-28 13:27:20 +02:00
Stefan Agner
ae440ab02d colibri_imx7: add Colibri iMX7S/iMX7D module support
This commit adds support for the Toradex Computer on Modules
Colibri iMX7S/iMX7D. The two modules/SoC's are very similar hence
can be easily supported by one board. The board code detects RAM
size at runtime which is one of the differences between the two
boards. The board also uses the UART's in DTE mode, hence making
use of the new DTE support via serial DM.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2016-07-28 13:27:19 +02:00
Breno Lima
68c276019a cgtqmx6eval: Replace is_mx6q() for macro
It's not necessary to implement the is_mx6q function, there is a macro in
sys_proto.h already implemented.

Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2016-07-28 13:27:19 +02:00
Breno Lima
4a2f9014e8 mx6cuboxi: Replace is_mx6q() for macro
It's not necessary to implement the is_mx6q function, there is a macro in
sys_proto.h already implemented.

Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2016-07-28 13:27:19 +02:00
Breno Lima
98b040c988 wandboard: Replace is_cpu_type() for macro
It's not necessary to use the is_cpu_type function, there is a macro in
sys_proto.h already implemented.

Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2016-07-28 13:27:19 +02:00
Tim Harvey
a5bfb4ff9e imx: ventana: add dt fixup for watchdog external reset
Added removal of the fsl,ext-reset-output property in the wdog node for board
revisions that pre-date the addition of the external watchdog reset signal.

This property is a recent addition to mainline linux kernel in order to
specify that the IMX watchdog external reset should be used instead of the
internal chip-level reset.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2016-07-28 13:27:18 +02:00
Tim Harvey
966fe02ee6 imx: ventana: refactor board-specific dt fixups (no functional change)
Re-factor the board-specific dt fixups so that they are easier to follow
and extend in the future:
 - use defines for DT paths
 - use switch/case per board
 - order models numerically

There is no functional change in the code

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2016-07-28 13:27:18 +02:00
Tim Harvey
5911c0924f imx: ventana: make hwconfig initialize based on board configuration
The hwconfig env var allows user to control hardware specific configuration
of board specific features but not all Ventana boards have the same features.

We will use the magic default value of "_UNKNOWN_" to signify that the
bootloader should create this based on detected board model.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2016-07-28 13:27:18 +02:00
Tim Harvey
e86b7adfa3 imx: ventana: add extra DIO's for GW5520
The GW5520 has 10 DIO's instead of the typical 4 found on the Ventana
product family.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2016-07-28 13:27:18 +02:00
Tim Harvey
1800ffa83e imx: ventana: make number of digital I/O's dynamic
Replace the static list of board-specific digital I/O's with a dynamic list.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2016-07-28 13:27:18 +02:00
Tim Harvey
e49621b357 imx: ventana: make RS232 enable board specific
Not all Ventana boards have an RS232 transceiver, make it board specific.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2016-07-28 13:27:17 +02:00
Tim Harvey
6eab98a02e imx: ventana: re-enable late board info display
3b1f681131 caused a regression that removes
board info dispaly for Gateworks Ventana boards because it made the invalid
assumption that CONFIG_DISPLAY_BOARDINFO_LATE was the same thing as
CONFIG_DISPLAY_BOARDINFO.

Ventana needs to call show_board_info in late init because we need to have
the i2c eeprom based model info. Re-define CONFIG_DISPLAY_BOARDINFO_LATE
to allow that to happen.

Cc: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2016-07-28 13:27:17 +02:00
Tim Harvey
f4416579d3 imx: ventana: default pci to disabled
The IMX6 PCIe host controller does not have a proper reset and as such there
are several issues that can arise if PCI is enabled in the bootloader follwed
by Linux trying to re-configure LTSSM and/or toggling PERST# to the devices.

For now, the best approach seems to default to disabling PCI by defaulting
pciedisable=1. This can be overridden by the user if they need PCI in the
bootloader, for example:
 - GW552x needing ethernet access in bootloader
 - GW16082 expansion board needing a device-tree fixup for irq mapping

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2016-07-28 13:27:17 +02:00
Tim Harvey
ec21aee653 pci: allow disabling of pci init/enum via env
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2016-07-28 13:27:17 +02:00
Tim Harvey
5c34c2abb8 imx: ventana: add dt fixup for eth1 mac-address
Ventana boards with a PCI Marvell Sky2 GigE MAC require the MAC address to
be placed in a DT node in order for the mainline linux driver to obtain it.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2016-07-28 13:27:16 +02:00
Tim Harvey
5a08ad6fdc imx: ventana: add dt fixup for GW16082 irq mapping
The GW16082 mini-PCI expansion mezzanine uses a TI XIO2001 PCIe-to-PCI
bridge with legacy INTA/B/C/D interrupts. These interrupts are assigned
in the reverse order according to the PCI spec.

If the TI bridge is found on the Ventana PCI bus, add device-tree nodes
according to bus enumeration explicitly defining the interrupt mapping
to override the default PCI mapping in the Linux kernel. This allows
the GW16082 to work with upstream kernels that support device-tree
irq parsing.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2016-07-28 13:27:16 +02:00
Fabio Estevam
5c392017f5 mx7dsabresd_secure_defconfig: Use CONFIG_ARMV7_BOOT_SEC_DEFAULT
There is no need for introducing MX7_SEC, as there is the
CONFIG_ARMV7_BOOT_SEC_DEFAULT option for this purpose.

Switch to CONFIG_ARMV7_BOOT_SEC_DEFAULT and get rid of
MX7_SEC.

Tested by booting a 4.1.15 NXP kernel with mx7dsabresd_secure_defconfig
target.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
2016-07-28 12:08:22 +02:00
Stefano Babic
d2c4c6bcfa pico-imx6ul: drop warning due to redefined
USB gadget configuration is set in defconfig and
must be removed from pico-imx6ul.h.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2016-07-28 12:05:28 +02:00
Stefano Babic
a5ad8ec920 mx6: wandboard: fix warning due to missing prototype
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2016-07-28 12:05:15 +02:00
Stefano Babic
64992b782b Fix build for mx7dsabresd (secure config)
After moving CONFIG_USB_EHCI_MX7 to Kconfig,
the flag must be set in defconfig for mx7dsabresd.
It is already for the not secure config, it is
missing in the secure configuration.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
2016-07-28 12:05:08 +02:00
Tom Rini
fe34b6a484 Merge git://git.denx.de/u-boot-dm 2016-07-27 22:30:20 -04:00
Xu Ziyuan
02ebd42cf1 mmc: dw_mmc: reduce timeout detection cycle
It's no need to speed 10 seconds to wait the mmc device out from busy
status. 500 milliseconds enough.

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
2016-07-27 20:15:48 -06:00
Stephen Warren
61f5ddcb7a Add a power domain framework/uclass
Many SoCs allow power to be applied to or removed from portions of the SoC
(power domains). This may be used to save power. This API provides the
means to control such power management hardware.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-07-27 16:29:56 -06:00