Commit graph

19 commits

Author SHA1 Message Date
Sonic Zhang
ecf9ce2149 blackfin: remove build warning
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
2013-12-16 11:38:33 +08:00
Sonic Zhang
85f2f8f9ad blackfin: Add comments for watchdog event initialization.
- Add comments for watchdog event initialization.
- Make sure the writting operation to MMRs are finished.

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
2013-05-13 16:30:26 +08:00
Sonic Zhang
9d803fc812 blackfin: Move blackfin serial driver out of blackfin arch folder.
- Move blackfin serial driver to the generic driver folder.
- Move blackfin serial headers to blackfin arch head folder.
- Update the include path to blackfin serial header in start up code.

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
2013-05-13 16:30:26 +08:00
Sonic Zhang
e9a389a184 blackfin: Move blackfin watchdog driver out of the blackfin arch folder.
- Enable hw_watchdog_init() in watchdog.h if CONFIG_HW_WATCHDOG is defined.
- Move blackfin hw watchdog driver to the generic driver folder.
- Call hw_watchdog_init() from blackfin board init code.
- Reuse macro CONFIG_WATCHDOG_TIMEOUT_MSECS
- Update README.watchdog accordingly

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
2013-05-13 16:30:26 +08:00
Sonic Zhang
04eeb758e7 blackfin: Uart divisor should be set after their values are generated.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
2013-05-13 16:30:17 +08:00
Sonic Zhang
ab80b65957 blackfin: Correct early serial mess output in BYPASS boot mode.
The early serial should not be configured again in initcode() for BYPASS
boot mode and in start() for the other LDR boot modes.

In BYPASS boot mode, the start up code is located in Nor flash address other
than the DRAM address defined in link script. The code embedded string can't
be addressed by its compile time symbol. Calculate it according to the flash
offset.

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
2013-05-13 15:47:24 +08:00
Sonic Zhang
79f2b3992f blackfin: Set correct early debug serial baudrate.
Calculate the early uart clock from the system clock registers set by
the bootrom other than the predefine uboot clock macros.

Split the early baudrate setting function and the normal baudrate
setting one.

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
2013-05-13 15:47:24 +08:00
Mike Frysinger
2e2ed3f4ff Blackfin: adjust asm constraints with NMI workaround
Newer gcc versions will sometimes use a Preg when "r" constraints, but
that'll fail if we use an Ireg in the assignment.  So force the code
to always use a Dreg.

This also fixes early boot crashes for older Blackfin parts when compiled
with gcc-4.5.  This version ends up selecting the same register for the
input and output variables which corrupts the output assignment triggering
an exception.
	P2 = 0xffe02008;	/* EVT2 */
	R0 = RETS;
	CALL 1f;
	RTN;
1:	P2 = RETS;	<-- BAD
	RETS = R0;
	[P2] = P2;	<-- BAD

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
2013-05-13 15:47:24 +08:00
Steven Miao
9faf4f08e7 blackfin: bf60x: add resume from hibernate
Add Bf60x resume from hibernate support

Signed-off-by: Steven Miao <realmz6@gmail.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Bob Liu <lliubbo@gmail.com>
Signed-off-by: Sonic Zhang <sonic.adi@gmail.com>
2013-03-04 13:42:08 +08:00
Bob Liu
49c2da53b7 blackfin: bf60x: add hw watchdog support
Signed-off-by: Bob Liu <lliubbo@gmail.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Sonic Zhang <sonic.adi@gmail.com>
2013-03-04 13:42:07 +08:00
Sonic Zhang
a2979dcdbe blackfin: bf60x: Port blackfin core architecture code to boot on bf60x.
Set up clocks, DDR controller, Nor flash controller, reboot,
serial port. Add new SPI boot modes.

Signed-off-by: Bob Liu <lliubbo@gmail.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Sonic Zhang <sonic.adi@gmail.com>
2013-03-04 13:42:06 +08:00
Mike Frysinger
b1e574d95b Blackfin: serial: convert to bfin_{read,write} helpers
Since the serial struct declares the sizes for us, no need to hardcode
them in the accessor functions.  Let the bfin_{read,write} helpers do
it for us.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-12 02:17:46 -04:00
Mike Frysinger
4150cec335 Blackfin: split out async setup
We really only need to tweak the async banks in the initcode if the
processor is booting out of it, otherwise we can wait until later
on in the CPU booting setup.

This also makes testing in the sim and early bring up over JTAG work
much smoother when the initcode gets bypassed.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-12 02:17:46 -04:00
Mike Frysinger
635f330fc7 Blackfin: uart: add multiple serial support
This brings CONFIG_SERIAL_MULTI support to the Blackfin on-chip UARTs.
Ends up adding only ~512bytes per additional UART.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-12 02:17:45 -04:00
Mike Frysinger
cca07417d5 Blackfin: BF50x: new processor port
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-08 00:44:26 -04:00
Mike Frysinger
5641f34f8b Blackfin: workaround anomaly 05000440
We cannot rely on the syscontrol rom func to program PLL_DIV with anomaly
05000440 is in effect, so manually program the MMR when necessary.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-14 20:23:26 -04:00
Mike Frysinger
ce53fc6601 Blackfin: set up simple NMI handlers for anomaly 05000219
Older on-chip Blackfin bootroms do not create a dummy NMI handler, so set
up one ourselves when anomaly 05000219 applies.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-07-05 04:18:18 -04:00
Mike Frysinger
b30453ace4 Blackfin: expand EVT1 usage documentation a bit more
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-07-05 04:18:18 -04:00
Peter Tyser
c6fb83d217 blackfin: Move cpu/blackfin/* to arch/blackfin/cpu/*
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2010-04-13 09:13:25 +02:00
Renamed from cpu/blackfin/initcode.c (Browse further)