Commit graph

719 commits

Author SHA1 Message Date
Peng Fan
d02be21d30 i2c: imx_lpi2c: add ipg clk
The controller needs two clk, per clk and ipg clk,
so let's add ipg clk.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-14 09:31:41 +02:00
Peng Fan
6dba0864ec i2c: mxc: add CONFIG_CLK support
When CONFIG_CLK enabled, use CLK UCLASS for clk related settings.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>

hs: removed hunk in mxc_i2c_probe() as not longer in code
2019-09-02 06:35:08 +02:00
Ye Li
d7d864017d i2c: mxc_i2c: Remove i2c_idle_bus from probe
i2c_idle_bus is already used in i2c_init_transfer. So before each transfer
if the bus is not ready, the i2c_idle_bus will be used to force idle.
It is unnecessary to call it again in probe.

We found a issue when enabling i2c mux with the mxc_i2c. The mxc_i2c is probed
after mux probing. However, at this moment the mux is still in idle state not
select any port. So if we call i2c_idle_bus in probe, it will fail and cause
mxc_i2c probe failed.

Signed-off-by: Ye Li <ye.li@nxp.com>
2019-08-27 06:20:23 +02:00
Ye Li
42cc3125c4 i2c-mux-gpio: Fix GPIO request flag issue
When requesting GPIO, the GPIOD_IS_OUT is missed in flag, so the GPIO
is set the input mode not output and cause mux not work.

Signed-off-by: Ye Li <ye.li@nxp.com>
2019-08-27 06:19:50 +02:00
Chuanhua Han
068cabe8f6 drivers: i2c: mxc: Fix compiler error when using i2c dm mode
I2C dm mode enablemenet causes below compilation errors:

In file included from include/config.h:8:0,
                 from include/common.h:20:
include/config_fallbacks.h:51:4: error: #error "Cannot define
CONFIG_SYS_I2C when CONFIG_DM_I2C is used"
 #  error "Cannot define CONFIG_SYS_I2C when CONFIG_DM_I2C is used"
    ^~~~~
In file included from include/config.h:8:0,
                 from include/common.h:20:
include/config_fallbacks.h:51:4: error: #error "Cannot define
CONFIG_SYS_I2C when CONFIG_DM_I2C is used"
 #  error "Cannot define CONFIG_SYS_I2C when CONFIG_DM_I2C is used"
    ^~~~~

board/freescale/lx2160a/lx2160a.c: In function 'board_early_init_f':
board/freescale/lx2160a/lx2160a.c:108:2: warning: implicit declaration
of function 'i2c_early_init_f'; did you mean 'arch_early_init_r'?
[-Wimplicit-function-declaration]
  i2c_early_init_f();
  ^~~~~~~~~~~~~~~~
  arch_early_init_r

 drivers/i2c/mxc_i2c.c: In function 'mxc_i2c_probe':
  drivers/i2c/mxc_i2c.c:824:8: warning: implicit declaration of function
'enable_i2c_clk';
  did you mean 'enable_irq_wake'? [-Wimplicit-function-declaration]
  ret = enable_i2c_clk(1, bus->seq);
        ^~~~~~~~~~~~~~
        enable_irq_wake

So fix these compilation errors.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:35 +05:30
Bartosz Golaszewski
e31148247a i2c: remove i2c driver-model compatibility layer
There are no more users of the compatibility layer for i2c. Remove the
driver and all references to it.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Acked-by: Heiko Schocher <hs@denx.de>
2019-07-29 17:58:52 -04:00
Vignesh R
14106bcadb i2c: omap24xx_i2c: Adapt driver to support K3 devices
K3 devices have I2C IP that is same as OMAP2+ family. Allow driver to be
compiled for ARCH_K3.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-07-17 11:12:54 -04:00
Patrick Delaunay
499504ba06 i2c: stm32f7_i2c: Fix warnings when compiling with W=1
This patch solves the following warnings:

drivers/i2c/stm32f7_i2c.c: In function 'stm32_i2c_compute_solutions':
warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
    if (scldel < scldel_min)
               ^
warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
     if (((sdadel >= sdadel_min) &&
                  ^~
warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
          (sdadel <= sdadel_max)) &&
                  ^~
drivers/i2c/stm32f7_i2c.c: In function 'stm32_i2c_choose_solution':
warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
      if (clk_error < clk_error_prev) {
                    ^
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12 11:50:55 +02:00
Melin Tomas
d3826fb052 xilinx_xiic: Fix transfer initialisation
Prior to starting a new transfer, conditionally wait for bus to not
be busy.

Reinitialise controller as otherwise operation is not stable.
For reference, see linux kernel
commit 9656eeebf3f1 ("i2c: Revert i2c: xiic: Do not reset controller before every transfer")

hs: Fixed DOS line endings
    added missing '\n'
    Fixed git commit description style

Signed-off-by: Tomas Melin <tomas.melin@vaisala.com>
2019-07-09 07:02:11 +02:00
Melin Tomas
5324e8ef6c xilinx_xiic: Fix fill tx fifo loop
Comparison should be against the actual message length, not loop index.

len is used for stopping while loop, pos is position in message.
stop should be sent when entire message is sent, not when
len and pos meet.

hs: fixed DOS line endings

Signed-off-by: Tomas Melin <tomas.melin@vaisala.com>
2019-07-09 07:02:11 +02:00
Ley Foon Tan
2d1e879c79 i2c: designware: Get clock rate from clock DM
Get clock rate from clock DM if CONFIG_CLK is enabled.
Otherwise, uses IC_CLK define.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Acked-by: Marek Vasut <marex@denx.de>
2019-07-09 07:02:11 +02:00
Jun Chen
e3b93dcee8 i2c: designware_i2c: Restore enable state after set speed
Before calling __dw_i2c_set_bus_speed(),
the I2C could already be set as ether enable or disable,
we should restore the original setting instead of enable i2c anyway.

This patch fix a bug happened in init function:
    __dw_i2c_init(){
            /* Disable i2c */
            ...
            __dw_i2c_set_bus_speed(i2c_base, NULL, speed);
            writel(slaveaddr, &i2c_base->ic_sar);
            /* Enable i2c */
    }
In this case, enable i2c inside __dw_i2c_set_bus_speed() function
will cause ic_sar write fail.

Signed-off-by: Jun Chen <ptchentw@gmail.com>
2019-07-09 07:02:10 +02:00
Nicolas Le Bayon
5237f37e5c i2c: stm32f7: improve loopback in timing algorithm
This avoids useless loops inside the I2C timing algorithm.
Actually, we support only one possible solution per prescaler value.
So after finding a solution with a prescaler, the algorithm can
switch directly to the next prescaler value.

Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-05-23 11:36:47 +02:00
Nicolas Le Bayon
e87da7521f i2c: stm32f7: Fix SDADEL minimum formula
It conforms with Reference Manual I2C timing section.

Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-05-23 11:36:47 +02:00
Tom Rini
e1a2ed7180 Merge git://git.denx.de/u-boot-mpc83xx
- Update MPC83xx platform support to current best practices, etc.
2019-05-21 07:13:35 -04:00
Mario Six
482c76e7c3 i2c: ihs: Improve error handling
Improve the error handling and reporting of the IHS I2C driver.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-05-21 07:52:34 +02:00
Mario Six
98e4249f97 i2c: ihs: Get rid of fpgamap
Since the IHS I2C driver want upstream, the surrounding infrastructure
has changed quite a bit (notably, the fpgamap driver was replaced with a
regmap driver).

Update the driver to work with these changes.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-05-21 07:52:34 +02:00
Trent Piepho
ca0a8f3e8c i2c: mxc: Hide kconfig based control in DM_I2C mode
These options only apply when not using DM_I2C.  When using device
trees, the dt will enable and control the speeds of the I2C
controller(s) and these configuration options have no effect.

So disable them in DM_I2C mode.  Otherwise they show up as decoys, and
make it look like one is enabling I2C controllers and setting the speed
when really it's doing nothing.

However, a system using a SPL build will not use DM_I2C in the SPL, even
if DM_I2C is enabled for the main u-boot.  And so the SPL might use the
kconfig based I2C speed controls while the main u-boot does not.

Cc: Sriram Dash <sriram.dash@nxp.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Trent Piepho <tpiepho@impinj.com>
2019-05-17 05:35:24 +02:00
Trent Piepho
c854933f50 i2c: mxc_i2c: Fix read and read->write xfers in DM mode
This is an old driver that supports both device mapped and non-mapped
mode, and covers a wide range of hardware.  It's hard to change without
risking breaking something.  I have to tried to be exceedingly detailed
in this patch, so please excuse the length of the commit essay that
follows.

In device mapped mode the I2C xfer function does not handle plain read,
and some other, transfers correctly.

What it can't handle are transactions that:
    Start with a read, or,
    Have a write followed by a read, or,
    Have more than one read in a row.

The common I2C/SMBUS read register and write register transactions
always start with a write, followed by a write or a read, and then end.
These work, so the bug is not apparent for most I2C slaves that only use
these common xfer forms.

The existing xfer loop initializes by sending the chip address in write
mode after it deals with bus arbitration and master setup.  When
processing each message, if the next message will be a read, it sends a
repeated start followed by the chip address in read mode after the
current message.

Obviously, this does not work if the first message is a read, as the
chip is always addressed in write mode initially by i2c_init_transfer().

A write following a read does not work because the repeated start is
only sent when the next message is a read.  There is no logic to send it
when the current message is a read and next is write.  It should be sent
every time the bus changes direction.

The ability to use a plain read was added to this driver in
commit 2feec4eafd ("imx: mxc_i2c: tweak the i2c transfer method"),
but this applied only the non-DM code path.

This patch fixes the DM code path.  The xfer function will call
i2c_init_transfer() with an alen of -1 to avoid sending the chip
address.  The same way the non-DM code achieves this.  The xfer
function's message loop will send the address and mode before each
message if the bus changes direction, and on the first message.

When reading data, the master hardware is one byte ahead of what we
receive.  I.e., reading a byte from the data register returns a byte
*already received* by the master, and causes the master to start the RX
of the *next* byte.  Therefor, before we read the final byte of a
message, we must tell the master what to do next.  I add a "last" flag
to i2c_read_data() to tell it if the message is to be followed by a stop
or a repeated start.  When last == true it acts exactly as before.

The non-DM code can only create an xfer where the read, if any, is the
final message of the xfer.  And so the only callsite of i2c_read_data()
in the non-DM code has the "last" parameter as true.  Therefore, this
change has no effect on the non-DM code.  As all other changes are in
the DM xfer function, which is not even compiled in non-DM code, I am
confident that this patch has no effect on boards not using I2C_DM.
This greatly reduces the range of hardware that could be affected.

For DM boards, I have verified every transaction the "i2c" command can
create on a scope and they are all exactly as they are supposed to be.
I also tested write->read->write, which isn't possible with the i2c
command, and it works as well.  I didn't fix multiple reads in a row, as
it's a lot more invasive and obviously no one has every wanted them
since they've never worked.  It didn't seem like the extra complexity
was justified to support something no one uses.

Cc: Nandor Han <nandor.han@ge.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Signed-off-by: Trent Piepho <tpiepho@impinj.com>
2019-05-17 05:35:23 +02:00
Trent Piepho
6314b3c7c3 i2c: mxc_i2c: Document how non-DM functions work
It is not very clear how these work in relation to the exact I2C xfers
they produce.  In paticular, the address length is somewhat overloaded
in the read method.  Clearly document the existing behavior.  Maybe this
will help the next person who needs to work on this driver and not break
non-DM boards.

Cc: Nandor Han <nandor.han@ge.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Signed-off-by: Trent Piepho <tpiepho@impinj.com>
2019-05-17 05:35:23 +02:00
Tom Rini
90c2ebd215 Merge git://git.denx.de/u-boot-marvell
- Fix in kwbimage (return code checking) (Young Xiao)
- Misc updates to Turris Omnia (Marek)
2019-05-03 14:22:23 -04:00
Marek Behún
d50e29662f i2c: mvtwsi: fix reading status register after interrupt
The twsi_wait function reads the control register for interrupt flag,
and if interrupt flag is present, it immediately reads status register.

On our device this sometimes causes bad value being read from status
register, as if the value was not yet updated.

My theory is that the controller does approximately this:
  1. sets interrupt flag in control register,
  2. sets the value of status register,
  3. causes an interrupt

In U-Boot we do not use interrupts, so I think that it is possible that
sometimes the status register in the twsi_wait function is read between
points 1 and 2.

The bug does not appear if I add a small delay before reading status
register.

Wait 100ns (which in U-Boot currently means 1 us, because ndelay(i)
function calls udelay(DIV_ROUND_UP(i, 1000))) before reading the status
register.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Cc: Mario Six <mario.six@gdsys.cc>
Cc: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-05-03 08:14:39 +02:00
Kever Yang
15f09a1a83 rockchip: use 'arch-rockchip' as header file path
Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common
header file path, so that we can get the correct path directly.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 00:00:05 +02:00
Tom Rini
1c64692df2 Merge branch 'master' of git://git.denx.de/u-boot-socfpga 2019-04-26 13:49:58 -04:00
Simon Goldschmidt
36821b3f55 i2c: designware: fix reset handling on socfpga gen5
Using this driver on socfpga gen5 with DM_I2C enabled leads to a data abort
as the 'i2c' reset property cannot be found (the gen5 dtsi does not provide
reset-names).

The actual bug was to check 'if (&priv->reset_ctl)', which is never false.

While at it, convert the driver to use 'reset_get_bulk' instead of looking
at a specific named reset and also make it release the reset on driver
remove before starting the OS.

Fixes: 622597dee4 ("i2c: designware: add reset ctrl to driver")
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-04-25 00:00:49 +02:00
Tom Rini
ceb6ddbc73 - Add support for Amlogic p200 & p201 Reference Designs
- Add Amlogic SoC information display
 - Add support for the Libretech-AC AML-S805X-AC board
 - Add Amlogic AXG reset compatible
 - Add I2C support for Amlogic AXG
 - Fix AXG PIN and BANK pinctrl definitions
 - Fix regmap_read_poll_timeout warning about sandbox_timer_add_offset
 - Add initial support for Amlogic G12A SoC and U200 board
 - Enable PHY_REALTEK for selected boards
 - Fix Khadas VIM2 README
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Merge tag 'u-boot-amlogic-20190423' of git://git.denx.de/u-boot-amlogic

- Add support for Amlogic p200 & p201 Reference Designs
- Add Amlogic SoC information display
- Add support for the Libretech-AC AML-S805X-AC board
- Add Amlogic AXG reset compatible
- Add I2C support for Amlogic AXG
- Fix AXG PIN and BANK pinctrl definitions
- Fix regmap_read_poll_timeout warning about sandbox_timer_add_offset
- Add initial support for Amlogic G12A SoC and U200 board
- Enable PHY_REALTEK for selected boards
- Fix Khadas VIM2 README
2019-04-24 12:26:25 -04:00
Luca Ceresoli
9985b74bf6 i2c: muxes: pca954x: support PCA9543 I2C switch
The PCA9543 is a 2-channel I2C switch.

Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Reviewed-by: Heiko Schocher <hs@denx.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher<hs@denx.de>
2019-04-11 15:21:33 +02:00
Luca Ceresoli
5995cdb167 i2c: muxes: pca954x: clarify enable field
The chip_desc.enable field is used only for muxes, not for switches.
Document it and remove the unused values.

Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Reviewed-by: Heiko Schocher <hs@denx.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher<hs@denx.de>
2019-04-11 15:21:33 +02:00
Luca Ceresoli
4cdf4e0655 i2c: muxes: pca954x: update list of supported devices
The Kconfig help has not been updated while adding PCA9547 and PCA9646.

Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher<hs@denx.de>
2019-04-11 15:21:33 +02:00
Lukasz Majewski
a40fe217d1 DM: I2C: Introduce 'u-boot, i2c-transaction-bytes' property
The 'u-boot,i2c-transaction-bytes' device tree property provides
information regarding number of bytes transferred by a device in a
single transaction.

This change is necessary to avoid hanging devices after soft reset.
One notable example is communication with MC34708 device:

1. Reset when communicating with MC34708 via I2C.

2. The u-boot (after reboot -f) tries to setup the I2C and then calls
force_idle_bus. In the same time MC34708 still has some data to be sent
(as it transfers data in 24 bits chunks).

3. The force_idle_bus() is not able to make the bus idle as 8 SCL
clocks may be not enough to have the full transmission.

4. We end up with I2C inconsistency with MC34708.

This PMIC device requires 24+ SCL cycles to make finish any pending I2C
transmission.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-04-11 15:21:33 +02:00
Guillaume La Roque
d82dcc4527 i2c: meson: add configurable divider factors
This patch add support for I2C controller in Meson-AXG SoC,
Due to the IP changes between I2C controller, we need to introduce
a compatible data to make the divider factor configurable.

backport from linux:
931b18e92cd0 ("2c: meson: add configurable divider factors")

Signed-off-by: Guillaume La Roque <glaroque@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2019-04-10 16:50:02 +02:00
Siva Durga Prasad Paladugu
9d59d6fff6 i2c: i2c_cdns: Fix below warnings with checker tool
This patch fixes below warnings found with checker tool.
The variable len in i2c_msg struct is of unsigned type
and it is received as recv_count which is unsigned type
but it is checked with < 0 which is always false, hence
removed it.
The local variable curr_recv_count is declared as signed
type and compared aginst unsigned recv_count which is
incorrect. This is fixed by declaring it as unsigned type.

drivers/i2c/i2c-cdns.c: In function ‘cdns_i2c_read_data’:
drivers/i2c/i2c-cdns.c:317:18: warning: comparison of
unsigned expression < 0 is always false [-Wtype-limits]
  if ((recv_count < 0))
                  ^
drivers/i2c/i2c-cdns.c:340:24: warning: comparison of
integer expressions of different signedness:
‘u32’ {aka ‘unsigned int’} and ‘int’ [-Wsign-compare]
  updatetx = recv_count > curr_recv_count;
                        ^
drivers/i2c/i2c-cdns.c:361:39: warning: comparison of
integer expressions of different signedness:
‘u32’ {aka ‘unsigned int’} and ‘int’ [-Wsign-compare]
    while (readl(&regs->transfer_size) !=

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-03-21 08:21:43 +01:00
Ismael Luceno Cortes
c64eb297e7 i2c: rcar_i2c: Move FSDA check to rcar_i2c_recover
Cosmetic change.  Any call to the recover function would need to do the
same check afterwards, so it's sensible to make it part of the function.

Signed-off-by: Ismael Luceno <ismael.luceno@silicon-gears.com>
2019-03-08 05:53:40 +01:00
Ismael Luceno Cortes
7c8f821e5d i2c: rcar_i2c: Set the slave address from rcar_i2c_xfer
It needs to be done for both reads and writes, so do it at rcar_i2c_xfer
to avoid duplication.

Signed-off-by: Ismael Luceno <ismael.luceno@silicon-gears.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-03-08 05:53:33 +01:00
Ismael Luceno Cortes
ff4035be9b i2c: rcar_i2c: Don't mask errors with EREMOTEIO at rcar_i2c_xfer
Fix rcar_i2c_xfer return value, previously it was always returning
-EREMOTEIO when dealing with errors from calls to the read/write
functions.

Signed-off-by: Ismael Luceno <ismael.luceno@silicon-gears.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-03-08 05:53:23 +01:00
Ismael Luceno Cortes
3ad31eb1cc i2c: rcar_i2c: Fix sending of slave addresses
Do the reset before clearing the MSR, otherwise it may result in a read
or write operation instead if the start condition is repeated.

Signed-off-by: Ismael Luceno <ismael.luceno@silicon-gears.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-03-08 05:53:17 +01:00
Ismael Luceno Cortes
3b59eaef4f i2c: rcar_i2c: Add comments about registers & values
Document the meaning of macros related to registers and values to be
written to them.

Signed-off-by: Ismael Luceno <ismael.luceno@silicon-gears.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-03-08 05:53:11 +01:00
Ismael Luceno Cortes
4fcff08c4b i2c: rcar_i2c: Setup SCL/SDA delay at rcar_i2c_set_speed
Setting up the delay only needs to be done once; move it to
rcar_i2c_set_speed so it's done at initialization time.

Signed-off-by: Ismael Luceno <ismael.luceno@silicon-gears.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-03-08 05:53:03 +01:00
Siva Durga Prasad Paladugu
bc00512438 i2c: i2c_cdns: Add support for handling arbitration lost
This patch adds support for handling arbitration lost
in case of multi master mode. When an arbitration lost
is detected, it retries for 10 times before failing.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-03-08 05:52:38 +01:00
Siva Durga Prasad Paladugu
006265d063 i2c: i2c_cdns: Fix clearing of all interrupts
The arbitration lost interrupt was not getting cleared
while clearing interrupts. This patch fixes this by adding
arbitration lost interrupt as well during clear. This patch
also removes hardcoded value and defined a macro for it.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-03-08 05:52:30 +01:00
Marek Vasut
da53b0543d i2c: rcar_i2c: Add Gen3 SoC support
Add support for R-Car Gen3 SoCs into the driver, which encompases
the Gen3 SoC extra timing register handling and 64bit build fixes.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-03-07 09:41:43 +01:00
Marek Vasut
eb54682e91 i2c: rcar_iic: Read ICSR only once
Read ICSR only once to avoid missing interrupts. This happens on R8A7791
Porter during reset, when reading the PMIC register 0x13, which may fail
sometimes because of the missed DTE interrupt.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-03-07 06:20:09 +01:00
Tom Rini
888f9aa5ca Merge branch 'master' of git://git.denx.de/u-boot-tegra 2019-02-20 12:28:57 -05:00
Peter Robinson
02253d4d12 Kconfig: tegra: Migrate SYS_I2C_TEGRA
Migrate SYS_I2C_TEGRA from headers to Kconfig

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: Tom Warren <twarren@nvidia.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Peter.Chubb@data61.csiro.au
Cc: Lucas Stach <dev@lynxeye.de>
Cc: Stefan Agner <stefan.agner@toradex.com>
Cc: Alban Bedel <alban.bedel@avionic-design.de>
Cc: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2019-02-20 09:01:44 -07:00
Simon Glass
2b5d029db8 i2c: designware: Add error checking on init
At present this driver does not check whether it is able to actually
communicate with the I2C controller. It prints a timeout message but still
considers the probe to be successful.

To fix this, add some checking that the init succeeds.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-02-20 15:21:44 +08:00
Michal Simek
f88185bcc3 i2c: Remove ancient zynq_i2c driver
This driver is replaced by drivers/i2c/i2c-cdns.c DM based driver.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Heiko Schocher <hs@denx.de>
2019-02-14 14:31:10 +01:00
Michal Simek
c4bd12a7da i2c: mux: Generate longer i2c mux name
For !DM case busses are listed as
ZynqMP> i2c bus
Bus 0:	zynq_0
Bus 1:	zynq_0->PCA9544A@0x75:0
Bus 2:	zynq_0->PCA9544A@0x75:1
Bus 3:	zynq_0->PCA9544A@0x75:2
Bus 4:	zynq_1
Bus 5:	zynq_1->PCA9548@0x74:0
Bus 6:	zynq_1->PCA9548@0x74:1
Bus 7:	zynq_1->PCA9548@0x74:2
Bus 8:	zynq_1->PCA9548@0x74:3
Bus 9:	zynq_1->PCA9548@0x74:4
Bus 10:	zynq_1->PCA9548@0x75:0
Bus 11:	zynq_1->PCA9548@0x75:1
Bus 12:	zynq_1->PCA9548@0x75:2
Bus 13:	zynq_1->PCA9548@0x75:3
Bus 14:	zynq_1->PCA9548@0x75:4
Bus 15:	zynq_1->PCA9548@0x75:5
Bus 16:	zynq_1->PCA9548@0x75:6
Bus 17:	zynq_1->PCA9548@0x75:7

where is exactly describing i2c bus topology.
By moving to DM case i2c mux buses are using names from DT and because
i2c-muxes describing sub busses with the same names like i2c@0, etc it
is hard to identify which bus is where.
Linux is adding topology information to i2c-mux busses to identify them
better.
This patch is doing the same and composing bus name with topology
information.

When patch is applied with topology information on zcu102-revA.
ZynqMP> i2c bus
Bus 0:	i2c@ff020000
   20: gpio@20, offset len 1, flags 0
   21: gpio@21, offset len 1, flags 0
   75: i2c-mux@75, offset len 1, flags 0
Bus 2:	i2c@ff020000->i2c-mux@75->i2c@0
Bus 3:	i2c@ff020000->i2c-mux@75->i2c@1
Bus 4:	i2c@ff020000->i2c-mux@75->i2c@2
Bus 1:	i2c@ff030000  (active 1)
   74: i2c-mux@74, offset len 1, flags 0
   75: i2c-mux@75, offset len 1, flags 0
Bus 5:	i2c@ff030000->i2c-mux@74->i2c@0  (active 5)
   54: eeprom@54, offset len 1, flags 0
Bus 6:	i2c@ff030000->i2c-mux@74->i2c@1
Bus 7:	i2c@ff030000->i2c-mux@74->i2c@2
Bus 8:	i2c@ff030000->i2c-mux@74->i2c@3
Bus 9:	i2c@ff030000->i2c-mux@74->i2c@4
Bus 10:	i2c@ff030000->i2c-mux@75->i2c@0
Bus 11:	i2c@ff030000->i2c-mux@75->i2c@1
Bus 12:	i2c@ff030000->i2c-mux@75->i2c@2
Bus 13:	i2c@ff030000->i2c-mux@75->i2c@3
Bus 14:	i2c@ff030000->i2c-mux@75->i2c@4
Bus 15:	i2c@ff030000->i2c-mux@75->i2c@5
Bus 16:	i2c@ff030000->i2c-mux@75->i2c@6
Bus 17:	i2c@ff030000->i2c-mux@75->i2c@7

Behavior before the patch is applied.
ZynqMP> i2c bus
Bus 0:	i2c@ff020000
   20: gpio@20, offset len 1, flags 0
   21: gpio@21, offset len 1, flags 0
   75: i2c-mux@75, offset len 1, flags 0
Bus 2:	i2c@0
Bus 3:	i2c@1
Bus 4:	i2c@2
Bus 1:	i2c@ff030000  (active 1)
   74: i2c-mux@74, offset len 1, flags 0
   75: i2c-mux@75, offset len 1, flags 0
Bus 5:	i2c@0  (active 5)
   54: eeprom@54, offset len 1, flags 0
Bus 6:	i2c@1
Bus 7:	i2c@2
Bus 8:	i2c@3
Bus 9:	i2c@4
Bus 10:	i2c@0
Bus 11:	i2c@1
Bus 12:	i2c@2
Bus 13:	i2c@3
Bus 14:	i2c@4
Bus 15:	i2c@5
Bus 16:	i2c@6
Bus 17:	i2c@7

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-02-11 09:38:23 +01:00
Michal Simek
61607225d1 i2c: Fill req_seq in i2c_post_bind()
For i2c controllers which are missing alias in DT there is no req_seq
setup. This function is setting up proper ID based on highest found
alias ID.

On zcu102 this is the behavior when patch is applied.
ZynqMP> i2c bus
Bus 0:	i2c@ff020000
   20: gpio@20, offset len 1, flags 0
   21: gpio@21, offset len 1, flags 0
   75: i2c-mux@75, offset len 1, flags 0
Bus 2:	i2c@0
Bus 3:	i2c@1
Bus 4:	i2c@2
Bus 1:	i2c@ff030000  (active 1)
   74: i2c-mux@74, offset len 1, flags 0
   75: i2c-mux@75, offset len 1, flags 0
Bus 5:	i2c@0  (active 5)
   54: eeprom@54, offset len 1, flags 0
Bus 6:	i2c@1
Bus 7:	i2c@2
Bus 8:	i2c@3
Bus 9:	i2c@4
Bus 10:	i2c@0
Bus 11:	i2c@1
Bus 12:	i2c@2
Bus 13:	i2c@3
Bus 14:	i2c@4
Bus 15:	i2c@5
Bus 16:	i2c@6
Bus 17:	i2c@7

Before this patch applied (controllers have -1 ID)
ZynqMP> i2c bus
Bus 0:	i2c@ff020000
   20: gpio@20, offset len 1, flags 0
   21: gpio@21, offset len 1, flags 0
   75: i2c-mux@75, offset len 1, flags 0
Bus -1:	i2c@0
Bus -1:	i2c@1
Bus -1:	i2c@2
Bus 1:	i2c@ff030000  (active 1)
   74: i2c-mux@74, offset len 1, flags 0
   75: i2c-mux@75, offset len 1, flags 0
Bus -1:	i2c@0  (active 0)
   54: eeprom@54, offset len 1, flags 0
Bus -1:	i2c@1
Bus -1:	i2c@2
Bus -1:	i2c@3
Bus -1:	i2c@4
Bus -1:	i2c@0
Bus -1:	i2c@1
Bus -1:	i2c@2
Bus -1:	i2c@3
Bus -1:	i2c@4
Bus -1:	i2c@5
Bus -1:	i2c@6
Bus -1:	i2c@7

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-02-11 09:38:23 +01:00
Michal Simek
6bfacc8aad i2c: dm: Record maximum id of devices before probing devices
There is a need to find out the first free i2c ID which can be used for
i2s buses (including i2c buses connected to i2c mux). Do it early in
init and share this variable with other i2c classes for uniq bus
identification.

add from hs:
fix build problem in i2c-uclass.c for omap devices

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-02-11 09:37:27 +01:00
Michal Simek
84de0f9188 i2c: cdns: Convert to livetree function
Update cadence i2c driver to support livetree
Similar changes were done by:
"net: zynq_gem: convert to use livetree"
(sha1: 26026e695a)

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-24 10:03:45 +01:00