Commit graph

45174 commits

Author SHA1 Message Date
Thomas Petazzoni
7653942b10 common/env_embedded.c: drop support for CONFIG_SYS_USE_PPCENV
CONFIG_SYS_USE_PPCENV is no longer used anywhere. It was used to put
the environment in the special .ppcenv section, but the last
architecture using this section (SuperH) has been changed to not use
it.

Therefore, this commit drops support for CONFIG_SYS_USE_PPCENV
entirely. We only handle two cases:

 - We're building the host tool tools/envcrc, in which case the
   environment is place with no special section attribute (so it
   depends up in .data)

 - We're building U-Boot itself, in which case the environnement is
   placed in the .text section.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2017-08-04 20:38:39 -04:00
Adam Ford
7e0ed13f47 Convert ARCH_OMAP2PLUS boards' CONFIG_SYS_TEXT_BASE to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_TEXT_BASE

The includes, whitelist, etc. were left for now but I don't get any
build errors or warnings on the omap3_logic_defconfig or
am3517_evm_defconfig builds I tried.

Signed-off-by: Adam Ford <aford173@gmail.com>
2017-08-04 20:38:39 -04:00
Patrice Chotard
679590ebc0 stmf32f4: soc: fix buildman compilation error
fix the following compilation error reported by buidlman:

       arm:  +   stm32f429-discovery
+arch/arm/mach-stm32/stm32f4/soc.c: In function 'arch_cpu_init':
+arch/arm/mach-stm32/stm32f4/soc.c:30:2: error: 'for' loop initial declarations are only allowed in C99 or C11 mode
+  for (int i = 0; i < ARRAY_SIZE(stm32_region_config); i++)
+  ^
+arch/arm/mach-stm32/stm32f4/soc.c:30:2: note: use option -std=c99, -std=gnu99, -std=c11 or -std=gnu11 to compile your code
+make[3]: *** [arch/arm/mach-stm32/stm32f4/soc.o] Error 1
+make[2]: *** [arch/arm/mach-stm32/stm32f4] Error 2
+make[1]: *** [arch/arm/mach-stm32] Error 2
+make: *** [sub-make] Error 2

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Vikas Manocha <vikas.manocha@st.com>
2017-08-04 20:38:38 -04:00
Wenyou.Yang@microchip.com
c0667d6c49 configs: sama5d4_xplained: Fix input clock for debug UART
Fix the UART input clock for the early debug UART, it should be
100MHz, instead of 88MHz.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
2017-08-04 20:38:38 -04:00
Wenyou.Yang@microchip.com
fdc7718999 board: usb_a9263: Update to support DT and DM
Add the dts files to support deivce tree, update the configuration
files to support the device tree and driver model. The peripheral
clock and pins configuration are handled by the clock and the pinctrl
drivers respectively.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-04 20:38:38 -04:00
Wenyou.Yang@microchip.com
a818704b2e board: meesc: Update to support DT and DM
Add the dts files to support deivce tree, update the configuration
files to support the device tree and driver model. The peripheral
clock and pins configuration are handled by the clock and the pinctrl
drivers respectively.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-04 20:38:37 -04:00
Wenyou.Yang@microchip.com
c53a825e15 board: pm9261: Update to support DT and DM
Add the dts files to support deivce tree, update the configuration
files to support the device tree and driver model. The peripheral
clock and pins configuration are handled by the clock and the pinctrl
drivers respectively.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-04 20:38:37 -04:00
Wenyou.Yang@microchip.com
94db5120d8 board: ethernut5: Update to support DT and DM
Add the dts files to support deivce tree, update the configuration
files to support the device tree and driver model. The peripheral
clock and pins configuration are handled by the clock and the pinctrl
drivers respectively.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-04 20:38:37 -04:00
Wenyou.Yang@microchip.com
0dfe3ffe0b board: pm9263: Update to support DT and DM
Update the configuration files to support the device tree and driver
model. The peripheral clock and pins configuration are handled by
the clock and the pinctrl drivers respectively.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-04 20:38:36 -04:00
Wenyou.Yang@microchip.com
f166af88a8 board: at91sam9260ek: Use SPI-flash-based AT45xxx DataFlash
To support driver model and device tree, use the SPI-flash-based
AT45xxx DataFlash driver, DataFlash is a kind of SPI flash.
Instead of ATMEL_DATAFLASH_SPI DataFlash older driver that will
be removed in the future.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-04 20:38:36 -04:00
Wenyou.Yang@microchip.com
56a61e5e27 board: at91sam9rlek: Use SPI-flash-based AT45xxx DataFlash
To support driver model and device tree, use the SPI-flash-based
AT45xxx DataFlash driver, DataFlash is a kind of SPI flash.
Instead of ATMEL_DATAFLASH_SPI DataFlash older driver that will
be removed in the future.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-04 20:38:35 -04:00
Wenyou.Yang@microchip.com
eab36f6d7b board: at91sam9263ek: Use SPI-flash-based AT45xxx DataFlash
To support driver model and device tree, use the SPI-flash-based
AT45xxx DataFlash driver, DataFlash is a kind of SPI flash.
Instead of ATMEL_DATAFLASH_SPI DataFlash older driver that will
be removed in the future.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-04 20:38:35 -04:00
Wenyou.Yang@microchip.com
324873e7c2 board: at91sam9261ek: Update to support DT and DM
Add the dts files to support deivce tree, update the configuration
files to support the device tree and driver model. The peripheral
clock and pins configuration are handled by the clock and the pinctrl
drivers respectively.

Enable the early debug UART to debug problems when an ICE or other
debug mechanism is not available.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-04 20:38:35 -04:00
Alison Chaiken
2fcaa413b3 gpt: harden set_gpt_info() against non NULL-terminated strings
Strings read from devices may sometimes fail to be
NULL-terminated.   The functions in lib/string.c are subject to
failure in this case.   Protect against observed failures in
set_gpt_info() by switching to length-checking variants with a length
limit of the maximum possible partition table length.  At the same
time, add a few checks for NULL string pointers.

Here is an example as observed in sandbox under GDB:

    => gpt verify host 0 $partitions
    Program received signal SIGSEGV, Segmentation fault.
    0x0000000000477747 in strlen (s=0x0) at lib/string.c:267
    267             for (sc = s; *sc != '\0'; ++sc)
    (gdb) bt
    #0  0x0000000000477747 in strlen (s=0x0) at lib/string.c:267
    #1  0x00000000004140b2 in set_gpt_info (str_part=<optimized out>,
    str_disk_guid=str_disk_guid@entry=0x7fffffffdbe8, partitions=partitions@entry=0x7fffffffdbd8,
    parts_count=parts_count@entry=0x7fffffffdbcf "", dev_desc=<optimized out>) at cmd/gpt.c:415
    #2  0x00000000004145b9 in gpt_verify (str_part=<optimized out>, blk_dev_desc=0x7fffef09a9d0) at cmd/gpt.c:580
    #3  do_gpt (cmdtp=<optimized out>, flag=<optimized out>, argc=<optimized out>, argv=0x7fffef09a8f0)
    at cmd/gpt.c:783
    #4  0x00000000004295b0 in cmd_call (argv=0x7fffef09a8f0, argc=0x5, flag=<optimized out>,
    cmdtp=0x714e20 <_u_boot_list_2_cmd_2_gpt>) at common/command.c:500
    #5  cmd_process (flag=<optimized out>, argc=0x5, argv=0x7fffef09a8f0,
    repeatable=repeatable@entry=0x726c04 <flag_repeat>, ticks=ticks@entry=0x0) at common/command.c:539

Suggested-by: Lothar Waßmann <LW@karo-electronics.de>
Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
2017-08-04 20:38:32 -04:00
Alison Chaiken
203f9b48ad GPT: provide commands to selectively rename partitions
This patch provides support in u-boot for renaming GPT
partitions.  The renaming is accomplished via new 'gpt swap'
and 'gpt rename' commands.

The 'swap' mode returns an error if no matching partition names
are found, or if the number of partitions with one name does not equal
the number with the second name.   The 'rename' variant always
succeeds as long as a partition with the provided number exists.

Rewriting the partition table has the side-effect that all partitions
end up with "msftdata" flag set.  The reason is that partition type
PARTITION_BASIC_DATA_GUID is hard-coded in the gpt_fill_pte()
function.  This does not appear to cause any harm.

Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
2017-08-04 20:35:27 -04:00
Alison Chaiken
09a49930e4 GPT: read partition table from device into a data structure
Make the partition table available for modification by reading it from
the user-specified device into a linked list.   Provide an accessor
function for command-line testing.

Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
[trini: Make this depend on CMD_GPT_RENAME, as it is the user of this
code]
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-08-04 20:34:04 -04:00
Alison Chaiken
73d6d18b71 GPT: add accessor function for disk GUID
In order to read the GPT, modify the partition name strings, and then
write out a new GPT, the disk GUID is needed.  While there is an
existing accessor for the partition UUIDs, there is none yet for the
disk GUID.

Changes since v6: none.

Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
2017-08-04 09:56:04 -04:00
Alison Chaiken
e6faf21f25 partitions: increase MAX_SEARCH_PARTITIONS and move to part.h
Move MAX_SEARCH_PARTITIONS to part.h so that functions in cmd
directory can find it.  At the same time, increase the value to
64 since some operating systems use many, and the resources
consumed by a larger value are minimal.

Changes since v6: none.

Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
2017-08-04 09:56:03 -04:00
Alison Chaiken
52791db74f cmd gpt: test in sandbox
Make minor changes to README.gpt and sandbox_defconfig to support
testing of the gpt command's functionality in the sandbox.

Changes since v6: none.

Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
2017-08-04 09:56:02 -04:00
Alison Chaiken
0a24238625 GPT: fix error in partitions string doc
The existing partitions-list parsing in cmd/gpt.c passes a value
from gpt_default() to set_gpt_info() that README.gpt suggests
should begin with 'partitions='.  Partition-list strings should
in fact begin with 'uuid_disk', as otherwise the call from
set_gpt_info() to extract_val() to find 'uuid_disk' will fail.
Change README.gpt accordingly.

Changes since v6: none.

Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
2017-08-04 09:55:30 -04:00
Alison Chaiken
92856b489b disk_partition: introduce macros for description string lengths
Changes since v6: none.

Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
2017-08-04 09:55:29 -04:00
Alison Chaiken
db9b6200a4 EFI: replace number with UUID_STR_LEN macro
Changes since v6: none.

Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
2017-08-04 09:55:29 -04:00
Tom Rini
fe84c48eeb Xilinx changes for v2017.09
Zynq:
 - Add Z-Turn board support
 
 fpga:
 - Remove intermediate buffer from code
 
 Zynqmp:
 - dts cleanup
 - change psu_init handling
 - Add options to get silicon version
 - Fix time handling
 - Map OCM/TCM via MMU
 - Add new clock driver
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iEYEABECAAYFAlmBs2kACgkQykllyylKDCFUGgCgmfop8Ki5+6QI7XQRP7u8nhjw
 KakAn1sYIRDFQ34AoxmiYa6RTmjepLMv
 =1Gh3
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-for-v2017.09' of git://www.denx.de/git/u-boot-microblaze

Xilinx changes for v2017.09

Zynq:
- Add Z-Turn board support

fpga:
- Remove intermediate buffer from code

Zynqmp:
- dts cleanup
- change psu_init handling
- Add options to get silicon version
- Fix time handling
- Map OCM/TCM via MMU
- Add new clock driver
2017-08-04 07:23:32 -04:00
Tom Rini
217324b23c PowerPC: mpc85xx: Update ft_verify_fdt
With the changes to fdt_get_base_address() we need to modify the logic
in ft_verify_fdt() for how we check the validity of the CCSR address.

Tested-on: qemu-ppce500 -M mpc8544ds
Fixes: 336a44877a ("fdt: Correct fdt_get_base_address()")
Cc: York Sun <york.sun@nxp.com>
Cc: Wolfgang Denk <wd@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-08-03 14:48:53 -04:00
Tom Rini
9f841559a5 qemu-ppce500: Update get_phys_ccsrbar_addr_early()
The logic of what fdt_get_base_address() will search for and return has
changed.  Rework get_phys_ccsrbar_addr_early() to perform the logic that
fdt_get_base_address used to perform.

Fixes: 336a44877a ("fdt: Correct fdt_get_base_address()")
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Alexander Graf <agraf@suse.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-08-03 14:48:52 -04:00
Bin Meng
7b9c88bfca ahci-pci: Update call to ahci_probe_scsi_pci()
ahci_probe_scsi() now takes a 'base' argument, and there is an API
that prepares base address for us: ahci_probe_scsi_pci().

Reported-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2017-08-03 14:48:48 -04:00
Tom Rini
a89302cc79 Merge branch 'rmobile' of git://git.denx.de/u-boot-sh 2017-08-02 19:30:27 -04:00
Nobuhiro Iwamatsu
9c552db619 ARM: rmobile: Update defconfig of R-Car Gen3
This updates defconfig of R-Car Gen3 to keep with the latest Kconfig.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-03 04:29:23 +09:00
Marek Vasut
1fea9e25fa net: ravb: Add clock handling support
Add support for enabling and disabling the clock using the clock
framework based on the content of OF instead of doing it manually
in the board file.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-03 04:26:25 +09:00
Marek Vasut
e821a7bdb1 net: ravb: Detect PHY correctly
The order of parameters passed to the phy_connect() was wrong.
Moreover, only PHY address 0 was used. Replace this with code
capable of detecting the PHY address.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-03 04:26:25 +09:00
Marek Vasut
5ee8b4d7f5 net: ravb: Add OF probing support
Add support for probing the RAVB Ethernet block from device tree.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-03 04:26:25 +09:00
Marek Vasut
8171499df9 serial: sh: Use the clock framework to obtain clock config
Since we now have clock driver on the RCar Gen3 , obtain the clock
configuration using the clock framework functions. In case this
fails, fall back to the original code for pulling the clock config
directly out of OF.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-03 04:26:25 +09:00
Marek Vasut
03a38a3972 serial: sh: Convert to Kconfig
Convert the SH Serial to Kconfig using tools/moveconfig.py tool
and a bit of manual adjustment to cater for failed conversions.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-03 04:26:24 +09:00
Marek Vasut
7ee0283d05 ARM: rmobile: Enable clock framework on ULCB
Since there is now a clock driver for RCar Gen3, enable it on this board.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-03 04:26:24 +09:00
Marek Vasut
9a86226e27 ARM: rmobile: Enable clock framework on Salvator-X
Since there is now a clock driver for RCar Gen3, enable it on this board.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-03 04:26:24 +09:00
Marek Vasut
36c2ee4ce5 clk: rmobile: Add RCar Gen3 clock driver
Add clock driver for the RCar Gen3 R8A7795 and R8A7796 SoCs .
This driver allows reading out the clock configuration set by
previous boot stages and enabling and disabling clock using
the MSTP registers. Setting clock is not supported thus far.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-03 04:26:24 +09:00
Marek Vasut
86fa69072d ARM: rmobile: Enable OF_CONTROL on RCar Gen3
Since the DTs are now in place, enable OF control so that they get
bundled into the U-Boot.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-03 04:26:18 +09:00
Marek Vasut
4157c472c3 ARM: dts: rmobile: Import DTS from Linux 4.12
Import the RCar Gen3 DTS and headers from upstream Linux kernel v4.12-rc6,
commit 6f7da290413ba713f0cdd9ff1a2a9bb129ef4f6c . This includes both M3
and H3 ULCB and Salvator-X boards.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-03 03:50:03 +09:00
Marek Vasut
48aa812676 ARM: rmobile: Increase console buffer sizes
Allow pasting extra long lines into the U-Boot console on RCar Gen3.
This is OK since we have plenty of resources and it's convenient.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-03 03:50:03 +09:00
Marek Vasut
bd39050cb2 ARM: rmobile: ulcb: Add ULCB board support
Add initial support for the R8A7795 and R8A7796 based ULCB board.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-03 03:50:03 +09:00
Marek Vasut
c65e46dab0 ARM: rmobile: Add PFC PUEN bank 5 address
Add the PFC5 PUEN address and SSI SDATA4 bit offset into the
rcar-gen3-base.h .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-03 03:50:03 +09:00
Tom Rini
ec7483e34e Merge git://git.denx.de/u-boot-fsl-qoriq
Signed-off-by: Tom Rini <trini@konsulko.com>

Conflicts:
	include/configs/ls1046aqds.h
	include/configs/ls1046ardb.h
2017-08-02 10:52:26 -04:00
Heinrich Schuchardt
df1cd46fb8 arm64: zynqmp: avoid out of buffer access
strncat(a, b, c) appends a maximum of c characters plus the 0 byte
to a.

In board_init we first write 4 characters plus 0 byte to version.
So only ZYNQMP_VERSION_SIZE - 5 additional characters fit into
version.

The problem was indicated by cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-02 09:11:52 +02:00
Siva Durga Prasad Paladugu
74ba69db35 arm64: zynqmp: Make chip_id routine to handle based on el.
Modify chip_id() routine such that to handle based on
the current el. Also make it available even if FPGA is
not enabled in system such it can be used always.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-02 09:11:52 +02:00
Siva Durga Prasad Paladugu
f52bf5a3dd arm64: zynqmp: Make chip_id a global routine()
This patch makes chip_id() as a global routine so that
it can be used in other places as required.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-02 09:11:52 +02:00
Siva Durga Prasad Paladugu
db3123b40d arm64: zynqmp: Modify chip_id routine to get either idcode or version
This patch modifies the chip_id routine to get either idcode or
silicon version based on the argument received.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-02 09:11:52 +02:00
Michal Simek
be4634511a arm64: zynqmp: Move dts zcu102 to zcu102-revA
Not using board revision is causing confusion about which board is
supported and tested. Mark dts files exactly with board revision which
was tested. When new board revision arives it can be symlink if SW view
is the same. Also add -revX suffix to compatible string because user space
tools are parsing this string and can change behavior depends of board
revision.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-02 09:11:52 +02:00
Siva Durga Prasad Paladugu
4b5b0fcd21 arm64: zynqmp: Dont write to system timestamp generator
Remove incorrect code of writing to system timestamp
counter registers. This register writes does nothing
and can be removed.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-02 09:11:52 +02:00
Michal Simek
90a35db410 arm64: zynqmp: Do not setup time if already setup
Newer psu_init_gpl.c/h contain clock setup. Detect if
reference clock is active. If yes, skip timer setup.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-02 09:11:52 +02:00
Michal Simek
926870478d arm64: zynqmp: Fix SVD mask for getting chip ID
Mask should start from the first bit - using 0xe is just wrong.
3bits are used that's why 0x7 mask is correct.
This patch is fixing silicon ID code detection. Previous behavior was
that bit0 was completely ignored.
Issue was found on 2eg chip detection.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-08-02 09:11:52 +02:00