Commit graph

2255 commits

Author SHA1 Message Date
Simon Glass
3db7110857 crc32: Use the crc.h header for crc functions
Drop inclusion of crc.h in common.h and use the correct header directly
instead.

With this we can drop the conflicting definition in fw_env.h and rely on
the crc.h header, which is already included.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:08 -05:00
Heiko Stuebner
b079118400 net: gmac_rockchip: add support for px30
Add the glue code to allow the px30 variant of the Rockchip gmac
to provide network functionality.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-17 17:23:10 +08:00
Tom Rini
5f7ff6d63e u-boot-imx-20191105
-------------------
 i.MX8MN SoC support
 ROM API image download support
 i.MX8MM enet enabling
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Merge tag 'u-boot-imx-20191105' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20191105
-------------------
i.MX8MN SoC support
ROM API image download support
i.MX8MM enet enabling
2019-11-12 07:18:23 -05:00
Michael Walle
29a6617ada drivers: net: fsl_enetc: fix RGMII configuration
Add the missing RGMII PHY modes in which case the MAC has configure its
RGMII settings. The only difference between these modes is the RX and
TX delay configuration. A user might choose any RGMII mode in the device
tree.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-08 11:23:01 +05:30
Michael Walle
2efb147a0a drivers: net: fsl_enetc: set phydev->node
The saved ofnode is used by some PHY drivers to access the device tree
node of the PHY.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-08 11:23:01 +05:30
Peng Fan
673f659732 net: fec_mxc: support i.MX8M with CLK_CCF
Add more clks for fec_mxc according to Linux Kernel 5.4.0-rc1
drivers/net/ethernet/freescale/fec_main.c.

Since i.MX8MQ not support CLK_CCF, so add a check to restrict
the code only effect when CONFIG_IMX8M and CONFIG_CLK_CCF both defined.

Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05 10:27:18 +01:00
Peng Fan
81dc2ac557 net: Kconfig: FEC: Add dependency on i.MX8M
Make FEC driver could be used by i.MX8M when CONFIG_FEC_MXC defined
in defconfig.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
2019-11-05 10:27:18 +01:00
Grygorii Strashko
62f8e846a7 net: ti: cpsw: convert to use dev/ofnode api
Conver TI CPSW driver to use dev/ofnode api.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
[trini: Add <dm/ofnode.h> to provide the prototype to ofnode]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-11-04 12:56:37 -05:00
Grygorii Strashko
da6a728ea4 net: ti: am65x-cpsw: fix mac tx internal delay for rgmii-rxid mode
Now AM65x CPSW2G driver will disable MAC TX internal delay for PHY
interface mode "rgmii-rxid" which is incorrect. Hence, fix it by keeping
default value (enabled) for MAC TX internal delay when "rgmii-rxid"
interface mode is selected.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
2019-11-03 09:36:06 -05:00
Grygorii Strashko
a3c867a217 net: ti: cpsw: fix mac tx internal delay for rgmii-rxid mode
Now TI CPSW driver will disable MAC TX internal delay for PHY interface
mode "rgmii-rxid" which is incorrect.

Hence, fix it by keeping default value (enabled) for MAC TX internal delay
when "rgmii-rxid" interface mode is selected.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
2019-11-03 09:36:06 -05:00
Grygorii Strashko
3c57b620db net: ti: cpsw: add support for standard eth "max-speed" dt property
This patch adds support for standard Ethernet "max-speed" DT property to
allow PHY link speed limitation.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
2019-11-03 09:36:06 -05:00
Grygorii Strashko
4040148b9e net: ti: cpsw: move parsing of dt port's parameters in separate func
Move parsing of dt port's parameters in separate func for better code
readability.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
2019-11-03 09:36:06 -05:00
Grygorii Strashko
60e81d0d28 net: ti: cpsw: enable 10Mbps link speed support in rgmii mode
According to TRMs the 10Mbps link speed is supported in RGMII only when
CPSW2G MAC SL is configured for External Control ("in band") mode
CPSW_SL_MACCTRL.EXT_EN(18) = 1.

Hence update cpsw_slave_update_link() to follow documentation.

[1] https://patchwork.kernel.org/patch/10285239/
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
2019-11-03 09:36:06 -05:00
Weijie Gao
877d03903c net: mt7628-eth: add support to isolate LAN/WAN ports
This patch add support for mt7628-eth to isolate LAN/WAN ports mainly to
prevent LAN devices from getting IP address from WAN.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
c88ee3ea0a net: mt7628-eth: free rx descriptor on receiving failure
When received a packet with an invalid length recorded in rx descriptor,
we should free this rx descriptor to allow us to continue to receive
following packets.
Without doing so, u-boot will stuck in a dead loop trying to process this
invalid rx descriptor.

This patch adds a call to mt7628_eth_free_pkt() after received an invalid
packet length.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
f079321009 net: mt7628-eth: make phy link up detection optional via DT
The mt7628 has an embedded ethernet switch (5 phy ports + 1 cpu port).
Although in IOT mode only port0 is usable, the phy0 is still connected
to the switch, not the ethernet gmac directly.

This patch rewrites it and makes it optional. It can be turned on by adding
mediatek,poll-link-phy = <?> explicitly into the eth node. By default the
driver is switch mode with all 5 phy ports working without link detection.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
2734fdef5c net: mt7628-eth: remove hardcoded gpio settings and regmap-based phy reset
This patch removes hardcoded gpio settings as they have been replaced by
pinctrl in dts, and also replaces regmap-based phy reset with a more
generic reset controller.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Tom Rini
44fb0d6c9f Xilinx/FPGA changes for v2020.01
FPGA:
 - Enable fpga loading on Versal
 - Minor fix
 
 Microblaze:
 - Fix LMB configurations to support initrds
 - Some other cleanups
 
 Zynq:
 - Minor config/dt changes
 - Add distro boot support for usb1 and mmc1
 - Remove Xilinx private boot commands and use only distro boot
 
 ZynqMP:
 - Kconfig cleanups, defconfig updates
 - Update some dt files
 - Add firmware driver for talking to PMUFW
 - Extend distro boot support for jtag
 - Add new IDs
 - Add system controller configurations
 - Convert code to talk firmware via mailbox or SMCs
 
 Versal:
 - Add board_late_init()
 - Add run time DT memory setup
 - Add DFU support
 - Extend distro boot support for jtag and dfu
 - Add clock driver
 - Tune mini configurations
 
 Xilinx:
 - Improve documentation (boot scripts, dt binding)
 - Enable run time initrd_high calculation
 - Define default SYS_PROMPT
 - Add zynq/zynqmp virtual defconfig
 
 Drivers:
 - Add Xilinx mailbox driver for talking to firmware
 - Clean zynq_gem for Versal
 - Move ZYNQ_HISPD_BROKEN to Kconfig
 - Wire genphy_init() in phy.c
 - Add Xilinx gii2rgmii bridge
 - Cleanup zynq_sdhci
 - dwc3 fix
 - zynq_gpio fix
 - axi_emac fix
 
 Others:
 - apalis-tk1 - clean config file
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Merge tag 'xilinx-for-v2020.01' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx/FPGA changes for v2020.01

FPGA:
- Enable fpga loading on Versal
- Minor fix

Microblaze:
- Fix LMB configurations to support initrds
- Some other cleanups

Zynq:
- Minor config/dt changes
- Add distro boot support for usb1 and mmc1
- Remove Xilinx private boot commands and use only distro boot

ZynqMP:
- Kconfig cleanups, defconfig updates
- Update some dt files
- Add firmware driver for talking to PMUFW
- Extend distro boot support for jtag
- Add new IDs
- Add system controller configurations
- Convert code to talk firmware via mailbox or SMCs

Versal:
- Add board_late_init()
- Add run time DT memory setup
- Add DFU support
- Extend distro boot support for jtag and dfu
- Add clock driver
- Tune mini configurations

Xilinx:
- Improve documentation (boot scripts, dt binding)
- Enable run time initrd_high calculation
- Define default SYS_PROMPT
- Add zynq/zynqmp virtual defconfig

Drivers:
- Add Xilinx mailbox driver for talking to firmware
- Clean zynq_gem for Versal
- Move ZYNQ_HISPD_BROKEN to Kconfig
- Wire genphy_init() in phy.c
- Add Xilinx gii2rgmii bridge
- Cleanup zynq_sdhci
- dwc3 fix
- zynq_gpio fix
- axi_emac fix

Others:
- apalis-tk1 - clean config file
2019-10-09 16:22:03 -04:00
Siva Durga Prasad Paladugu
fccfb71004 net: xilinx_axiemac: Fill the phy node pointer in phydev
This patch assings the phynode pointer to the phydev node as it is needed
later in the corresponding phy driver to read phy properties from DT.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:53:13 +02:00
Siva Durga Prasad Paladugu
f41e588c03 net: phy: Add gmiitorgmii converter support
This patch adds support for gmiitorgmii converter.
This converter sits between the MAC and the external phy
MAC <==> GMII2RGMII <==> RGMII_PHY.
The ethernet driver probes this bridge and this bridge driver
probes real phy driver and invokes the real phy functionalities
as requested. This bridge just needs to be configured based on
real phy negotiated speed and duplex.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:41:27 +02:00
Siva Durga Prasad Paladugu
be49508a0f net: phy: Define init routine and register generic phy driver
This patch define init routine for generic phy driver and registers it
using phy_register as this generic phy driver also needs to be relocated
incase of manual reloc.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:41:27 +02:00
Siva Durga Prasad Paladugu
bc493d911e net: zynq_gem: Remove check for Versal
This patch removes check for Versal platform
in gem driver as it now supports clock setting
through clock framework.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:41:27 +02:00
Siva Durga Prasad Paladugu
1ff8bdb8d3 net: zynq_gem: Add new versal compatible string
This patch adds new versal compatible string to GEM driver for Versal
platform.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:35:43 +02:00
Michal Simek
74969a074c net: gem: Remove DECLARE_GLOBAL_DATA_PTR from gem driver
GD is not used anywhere that's why there is no reason to have this macro
in the driver.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 09:35:43 +02:00
Nicolas Ferre
39fa41608b net: macb: Add sam9x60-macb compatibility string
Add this new compatibility string for matching sam9x60 product
macb.

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2019-10-08 09:16:11 +03:00
Eugeniy Paltsev
2a7232371a NET: DW: fix regression for ARC boards
The commit
642b80d256 ("net: designware: drop compatible altr, socfpga-stmmac")
breaks designware ethernet for all ARC boards. It removes
"altr, socfpga-stmmac" compatible from "drivers/net/designware.c"
without changing compatible in the boards which use it.

Fix that by adding "snps,arc-dwmac-3.70a" compatible string to
"drivers/net/designware.c" and using it in ARC boards device tree.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2019-10-07 13:23:49 -04:00
Stefan Roese
5ccd657b6d net: macb: Fix rx buffer cache handling
With commit c6d07bf440 ("net/macb: increase RX buffer size for GEM")
ethernet support does not work any more with d-cache enabled on the
AT91SAM. The reason is, that MACB_RX_BUFFER_SIZE was changed from 4096
to 128 but this change was not refected in the rx_buffer flush and
invalidate functions, as these also use this macro.

This patch now fixes this by calculating the rx buffer size correctly
again in those functions. With this change, ethernet works again
reliably on my AT91SAM board.

Signed-off-by: Stefan Roese <sr@denx.de>
Fixes: c6d07bf440 ("net/macb: increase RX buffer size for GEM")
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Anup Patel <anup.patel@wdc.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04 11:37:19 -05:00
Ralph Siemsen
642b80d256 net: designware: drop compatible altr, socfpga-stmmac
The same compatible = "altr,socfpga-stmmac" appears in both
drivers/net/designware.c and drivers/net/dwmac_socfgpa.c,
creating ambiguity in which driver will be bound.

For Intel/Altera SoC devices, dwmac_socfpga.c is the correct driver.
So drop the compatible string from designware.c.

Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04 11:37:19 -05:00
Bin Meng
19f3b78dfb Revert "net: macb: Fixed reading MII_LPA register"
This reverts commit 1b0c9914cc.

Commit 1b0c9914cc ("net: macb: Fixed reading MII_LPA register")
causes 100Mbps does not work any more with SiFive FU540 GEM on the
HiFive Unleashed board. Revert it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04 11:37:19 -05:00
Alex Marginean
e3562b3a8e drivers: net: fsl_enet_mdio: fix missing terminator in PCI ID array
It was missing in the original submission and not having it in place causes
issues with probing of PCI devices.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04 11:37:19 -05:00
Patrick Delaunay
53e3d52c6c net: dwc_et_qos: update weak function board_interface_eth_init
Align the board and driver prototype for board_interface_eth_init
to avoid execution issue (the interface_type parameter is defined
as int or phy_interface_t).

To have a generic weak function (it should be reused by other driver)
I change the prototype to use directly udevice.

This prototype is added in netdev.h to allow compilation check
and avoid warning when compiling with W=1 on file
board/st/stm32mp1/stm32mp1.c

warning: no previous prototype for 'board_interface_eth_init'\
[-Wmissing-prototypes]
     int board_interface_eth_init(int interface_type, ....
         ^~~~~~~~~~~~~~~~~~~~~~~~

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04 11:37:19 -05:00
Patrick Delaunay
50d86e55a4 net: dwc_eth_qos: Change eqos_ops function to static
This patch solves many warnings when compiling with W=1:
warning: no previous prototype for '....' [-Wmissing-prototypes]

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04 11:37:19 -05:00
Heinrich Schuchardt
9bbff5478e drivers: net: pfe_eth: undefined return value
Do not use random value from stack as return value of pfe_phy_write().

Indicated by cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04 11:37:19 -05:00
Heinrich Schuchardt
fd6d88f55b test: dm_mdio: avoid out of bounds access
SANDBOX_PHY_REG_CNT is not an allowable index for the array
u16 reg[SANDBOX_PHY_REG_CNT].

Identified by cppcheck.

Fixes: b47edf8069 ("test: dm_mdio: add a 2nd register to the emulated PHY")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04 11:37:19 -05:00
Matt Pelland
a37c082248 net: mvpp2: support setting hardware addresses from ethernet core
mvpp2 already has support for setting MAC addresses but this
functionality was not exposed to the ethernet core. This commit exposes
this functionality so that MAC address assignments stored in U-Boot's
environment are correctly applied before Linux boots.

Signed-off-by: Matt Pelland <mpelland@starry.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04 11:37:19 -05:00
Alex Marginean
8bd37ce3cd drivers: net: add marvell MDIO driver
This patch adds a separate driver for the MDIO interface of the
Marvell Ethernet controllers based on driver model. There are two
reasons to have a separate driver rather than including it inside
the MAC driver itself:
  *) The MDIO interface is shared by all Ethernet ports, so a driver
     must guarantee non-concurrent accesses to this MDIO interface. The
     most logical way is to have a separate driver that handles this
     single MDIO interface, used by all Ethernet ports.
  *) The MDIO interface is the same between the existing mv643xx_eth
     driver and the new mvneta/mvpp2 driver. Even though it is for now
     only used by the mvneta/mvpp2 driver, it will in the future be
     used by the mv643xx_eth driver as well.

This driver supports SMI IEEE for 802.3 Clause 22 and XSMI for IEEE
802.3 Clause 45.

This patch also adds device tree binding for marvell MDIO driver.

Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04 11:37:19 -05:00
Florinel Iordache
1bad991205 drivers/fsl-mc: Create Kconfig file to manage driver specific configs better
Create drivers/net/fsl-mc/Kconfig and move fsl-mc specific configs
from arch/arm/cpu/armv8/fsl-layerscape/Kconfig to this new Kconfig

Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-09-04 11:37:19 -05:00
Alex Marginean
74dd383867 drivers: net: driver for MDIO muxes controlled over I2C
This driver is used for MDIO muxes driven over I2C.  This is currently
used on Freescale LS1028A QDS board, on which the physical MDIO MUX is
controlled by an on-board FPGA which in turn is configured through I2C.

Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-09-04 11:37:19 -05:00
Joe Hershberger
bb53ae38de Revert "drivers: net: driver for MDIO muxes controlled over I2C"
This reverts commit d9a9174fa5.
2019-09-04 11:37:19 -05:00
Meenakshi Aggarwal
cf0bbbd1ee drivers: net: mc: Report extra memory to Linux
MC firmware need to be aligned to 512M, so minimum 512MB DDR is reserved.
But MC support to work with 128MB or 256MB DDR memory also, in this
case, rest of the memory is not usable.
So reporting this extra memory to Linux through dtb memory fixup.

Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-08-22 09:07:35 +05:30
Simon Glass
9e5616dea9 Drop PCMCIA
This is no-longer used in U-Boot and has not been converted to driver
model. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-08-11 19:27:41 -04:00
Simon Glass
e7dcf5645f env: Drop environment.h header file where not needed
This header file is now only used by files that access internal
environment features. Drop it from various places where it is not needed.

Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2019-08-11 16:43:41 -04:00
Simon Glass
7b51b576d6 env: Move env_get() to env.h
Move env_get() over to the new header file.

Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2019-08-11 16:43:41 -04:00
Simon Glass
9fb625ce05 env: Move env_set() to env.h
Move env_set() over to the new header file.

Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2019-08-11 16:43:41 -04:00
Simon Glass
c7694dd483 env: Move env_set_hex() to env.h
Move env_set_hex() over to the new header file along with env_set_addr()
which uses it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-08-11 16:43:41 -04:00
Simon Glass
3a7d55716d env: Move env_get_f() to env.h
Move this function over to the new header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-08-11 16:43:41 -04:00
Simon Glass
f1f0ae6a9c env: Move get_env_id() to env.h
Move this function over to the new header file. Also rename it to have an
env_ prefix like the other functions.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-08-11 16:43:41 -04:00
Marek Vasut
7234a28664 net: sh_eth: Fix 64bit build warnings
Fix various type warnings when building this driver for 64bit machine.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-08-09 23:15:01 +02:00
Marek Vasut
46c33166d1 net: sh_eth: Add R8A77980 V3H gether support
The R8A77980 V3H gether needs a few minor adjustments to the sh_eth
driver, add them to support ethernet on R8A77980.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-08-09 23:15:01 +02:00
Keerthy
5917d0b877 doc: arch: sandbox: Replace all the instances of README.sandbox
commit 49116e6d23 ("doc: arch: Convert README.sandbox to reST")
Moves README.sandbox to doc/arch.
Replace all the existing instances to point to the right documentation
file.

Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-07-29 09:32:09 -04:00