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net: gmac_rockchip: add support for px30

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Add the glue code to allow the px30 variant of the Rockchip gmac
to provide network functionality.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
Heiko Stuebner 2019-07-24 01:20:29 +02:00 committed by Kever Yang
parent d49a526750
commit b079118400
1 changed files with 69 additions and 0 deletions
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69
drivers/net/gmac_rockchip.c
View file

@ -14,6 +14,7 @@
#include <asm/arch-rockchip/periph.h>
#include <asm/arch-rockchip/clock.h>
#include <asm/arch-rockchip/hardware.h>
#include <asm/arch-rockchip/grf_px30.h>
#include <asm/arch-rockchip/grf_rk322x.h>
#include <asm/arch-rockchip/grf_rk3288.h>
#include <asm/arch-rockchip/grf_rk3328.h>
@ -72,6 +73,47 @@ static int gmac_rockchip_ofdata_to_platdata(struct udevice *dev)
return designware_eth_ofdata_to_platdata(dev);
}
static int px30_gmac_fix_mac_speed(struct dw_eth_dev *priv)
{
struct px30_grf *grf;
struct clk clk_speed;
int speed, ret;
enum {
PX30_GMAC_SPEED_SHIFT = 0x2,
PX30_GMAC_SPEED_MASK = BIT(2),
PX30_GMAC_SPEED_10M = 0,
PX30_GMAC_SPEED_100M = BIT(2),
};
ret = clk_get_by_name(priv->phydev->dev, "clk_mac_speed",
&clk_speed);
if (ret)
return ret;
switch (priv->phydev->speed) {
case 10:
speed = PX30_GMAC_SPEED_10M;
ret = clk_set_rate(&clk_speed, 2500000);
if (ret)
return ret;
break;
case 100:
speed = PX30_GMAC_SPEED_100M;
ret = clk_set_rate(&clk_speed, 25000000);
if (ret)
return ret;
break;
default:
debug("Unknown phy speed: %d\n", priv->phydev->speed);
return -EINVAL;
}
grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
rk_clrsetreg(&grf->mac_con1, PX30_GMAC_SPEED_MASK, speed);
return 0;
}
static int rk3228_gmac_fix_mac_speed(struct dw_eth_dev *priv)
{
struct rk322x_grf *grf;
@ -257,6 +299,22 @@ static int rv1108_set_rmii_speed(struct dw_eth_dev *priv)
return 0;
}
static void px30_gmac_set_to_rmii(struct gmac_rockchip_platdata *pdata)
{
struct px30_grf *grf;
enum {
PX30_GMAC_PHY_INTF_SEL_SHIFT = 4,
PX30_GMAC_PHY_INTF_SEL_MASK = GENMASK(4, 6),
PX30_GMAC_PHY_INTF_SEL_RMII = BIT(6),
};
grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
rk_clrsetreg(&grf->mac_con1,
PX30_GMAC_PHY_INTF_SEL_MASK,
PX30_GMAC_PHY_INTF_SEL_RMII);
}
static void rk3228_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
{
struct rk322x_grf *grf;
@ -445,6 +503,10 @@ static int gmac_rockchip_probe(struct udevice *dev)
ulong rate;
int ret;
ret = clk_set_defaults(dev, 0);
if (ret)
debug("%s clk_set_defaults failed %d\n", __func__, ret);
ret = clk_get_by_index(dev, 0, &clk);
if (ret)
return ret;
@ -569,6 +631,11 @@ const struct eth_ops gmac_rockchip_eth_ops = {
.write_hwaddr = designware_eth_write_hwaddr,
};
const struct rk_gmac_ops px30_gmac_ops = {
.fix_mac_speed = px30_gmac_fix_mac_speed,
.set_to_rmii = px30_gmac_set_to_rmii,
};
const struct rk_gmac_ops rk3228_gmac_ops = {
.fix_mac_speed = rk3228_gmac_fix_mac_speed,
.set_to_rgmii = rk3228_gmac_set_to_rgmii,
@ -600,6 +667,8 @@ const struct rk_gmac_ops rv1108_gmac_ops = {
};
static const struct udevice_id rockchip_gmac_ids[] = {
{ .compatible = "rockchip,px30-gmac",
.data = (ulong)&px30_gmac_ops },
{ .compatible = "rockchip,rk3228-gmac",
.data = (ulong)&rk3228_gmac_ops },
{ .compatible = "rockchip,rk3288-gmac",