Commit graph

31072 commits

Author SHA1 Message Date
Tom Rini
5873d0fbad Merge branch 'master' of git://git.denx.de/u-boot-arm 2013-04-16 10:56:55 -04:00
Simon Glass
617c246f3c x86: config: Init PCI before SPI
Since the ICH SPI controller uses PCI, we must ensure that PCI is available
before it is inited.

This fixes the current "ICH SPI: Cannot find device" message on boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-04-15 16:26:43 -07:00
Simon Glass
7525c2dac7 x86: Allow setup code to manage its own global data
Currently x86 has its own means of managing the global data and board data
(bd_t), and this code resides in start.S. With generic board, we need to
ensure that we leave this alone - i.e. don't clear it as we do on other
archs.

This fixes a problem where the memory init data is cleared which causes
the video driver to operate very slowly.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-04-15 16:26:41 -07:00
Simon Glass
8b42dfc3b6 x86: Fix DRAM bank size init with generic board
The intention of the memory init code is that it should work the same with
CONFIG_SYS_GENERIC_BOARD and without. This is tricky because dram_init()
is called prior to relocation with generic board (matching other archs)
and after relocation without generic board.

Adjust the init sequence so that dram_init() is not called in the generic
board case, which seems like the easiest fix for now. Also ensure that
relocation addresses are still calculated.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-04-15 16:26:09 -07:00
Tom Warren
601795462a Tegra: T30: Beaver board support.
Beaver is a Tegra30 board that is nearly 100% compatible w/Cardhu.
Add a Beaver build so it can begin to be differentiated, if need be.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-04-15 16:13:51 -07:00
Tom Warren
49493cb714 Tegra: Split tegra_get_chip_type() into soc & sku funcs
As suggested by Stephen Warren, use tegra_get_chip() to return
the pure CHIPID for a Tegra SoC (i.e. 0x20 for Tegra20, 0x30 for
Tegra30, etc.) and rename tegra_get_chip_type() to reflect its true
function, i.e. tegra_get_chip_sku(), which returns an ID like
TEGRA_SOC_T25, TEGRA_SOC_T33, etc.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-04-15 11:01:38 -07:00
Tom Warren
d94c2dbd0a Tegra: Fix MSELECT clock divisors for T30/T114.
A comparison of registers between our internal NV U-Boot and
u-boot-tegra/next showed some discrepancies in the MSELECT
clock divisor programming. T20 doesn't have a MSELECT clk src reg.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-04-15 11:01:38 -07:00
Tom Warren
b40f734af9 Tegra114: Initialize System Counter (TSC) with osc frequency
T114 needs the SYSCTR0 counter initialized so the TSC can be
read by the kernel. Do it in the bootloader since it's a write-once
deal (secure/non-secure mode dependent).

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-04-15 11:01:38 -07:00
Tom Warren
d0edce4fa3 Tegra: Configure L2 cache control reg properly.
Without this change, kernel fails at calling function cache_clean_flush
during kernel early boot.

Aprocryphally, intended for T114 only, so I check for a T114 SoC.
Works (i.e. dalmore 3.8 kernel now starts printing to console).

Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-04-15 11:01:38 -07:00
Thierry Reding
85434f9d71 Tegra: TEC: Enable boot script support
Boot script support brings TEC in line with other Tegra boards. To
enable booting a Linux kernel with initial ramdisk, also include support
for the new FIT image type.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-04-15 11:01:37 -07:00
Thierry Reding
51016ffdaf Tegra: Plutux: Enable NAND and boot script support
Boot script support brings Plutux in line with other Tegra boards. In
order to enable booting a Linux kernel with initial ramdisk, also add
support for the new FIT image type.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-04-15 11:01:37 -07:00
Thierry Reding
9dc9caf45d Tegra: Medcom-Wide: Enable NAND and boot script support
Boot script support brings Medcom-Wide in line with other Tegra boards.
In order to enable booting a Linux kernel with initial ramdisk, also add
support for the new FIT image type.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-04-15 11:01:37 -07:00
Thierry Reding
3408a34823 Tegra: All Tamonten-derived boards use onboard NAND
Move the nand-controller node to the tegra20-tamonten.dtsi so that it
can be shared between all derived boards.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-04-15 11:01:37 -07:00
Tom Warren
3ebbbfe4c7 Tegra: Restore cp15 VBAR _start vector write for ARMv7
A start vector fix was added by AneeshV for OMAP4 (commit 0d479b53),
and caused the old monilithic Tegra builds to hang due to an undefined
instruction trap. Previously, the code needed to run on both the
AVP (ARM7TDI) and A9, and the AVP doesn't have a CP15 register.
I corrected this in commit 6d6c0bae w/#ifndef CONFIG_TEGRA, but
now that we use SPL, and boot the AVP w/o any ARMv7 code, I can
revert my change, and make Aneesh's change apply to Tegra.

Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-04-15 11:01:37 -07:00
Tom Warren
3efff99fbd Tegra: enable verify support for the crc32 command
Some 3rd-party flash tools use the -v (verify) option of crc32 command.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
2013-04-15 11:01:37 -07:00
Stephen Warren
eb222d1d7d ARM: tegra: support T33 SKU of Tegra30
Make U-Boot aware of the T33 SKU of Tegra30, and treat it identically
to any other Tegra30.

An alternative would be to simply remove the SKU checking from
tegra_get_chip_type(); most use of the value most likely simply wants
to know the current chip, not the specific SKU. Or, the function could
be split into separate tegra_get_chip() and tegra_get_sku() for the
cases where differentiation really is required.

I wonder whether tegra_get_chip_type() should printf() whenever any
unkown chip/SKU is found, although perhaps the function is called so
early that the printf() wouldn't actually make it to the UART anyway.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
2013-04-15 11:01:37 -07:00
Andre Przywara
c4a4e2e20c ARMv7: start.S: stay in HYP mode if u-boot is entered in it
The KVM and Xen hypervisors for the Cortex-A15 virtualization
implementation need to be entered in HYP mode. Should the primary
board firmware already enter HYP mode (Calxeda firmware does that),
we should not deliberately drop back to SVC mode.
Since U-boot does not use the MMU, running in HYP mode is just fine.

Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
2013-04-15 18:30:59 +02:00
Tom Rini
cba6494f24 Prepare v2013.04-rc3
Signed-off-by: Tom Rini <trini@ti.com>
2013-04-15 11:47:10 -04:00
Tom Rini
17059f972f Merge branch 'master' of git://git.denx.de/u-boot-arm 2013-04-15 07:46:11 -04:00
Tom Rini
277f037074 Merge branch 'tpm' of git://git.denx.de/u-boot-x86 2013-04-15 07:45:07 -04:00
Albert ARIBAUD
8960af8ba9 cosmetic: fix CONFIG_SPL_BSS_MAX_SIZE typo in README
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2013-04-14 17:04:43 +02:00
Albert ARIBAUD
eac579d0d4 smdk5250, snow: convert to CONFIG_SPL_MAX_FOOTPRINT
This target wants to check full SPL size, BSS included.
Remove CONFIG_SPL_MAX_SIZE definition and instead define
CONFIG_SPL_MAX_FOOTPRINT.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2013-04-14 16:08:29 +02:00
Albert ARIBAUD
b7b5f1a16c da850evm, da850_am18xxevm: convert to CONFIG_SPL_MAX_FOOTPRINT
This target wants to check full SPL size, BSS included.
Remove CONFIG_SPL_MAX_SIZE definition and instead define
CONFIG_SPL_MAX_FOOTPRINT.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2013-04-14 16:08:08 +02:00
Albert ARIBAUD
e7497891e3 cam_enc_4xx: convert to CONFIG_SPL_MAX_FOOTPRINT
This target wants to check full SPL size, BSS included.
Remove CONFIG_SPL_MAX_SIZE definition and instead define
CONFIG_SPL_MAX_FOOTPRINT.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2013-04-14 16:07:54 +02:00
Albert ARIBAUD
6ebc346111 ARM: fix CONFIG_SPL_MAX_SIZE semantics
Remove SPL-related ASSERT() in arch/arm/cpu/u-boot.lds
as this file is never used for SPL builds.

Rewrite the ASSERT() in arch/arm/cpu/u-boot-spl.lds
to separately test image (text,data,rodata...) size,
BSS size, and full footprint each against its own max,
and make Tegra boards check full footprint.

Also, output section mmutable is not used in SPL builds.
Remove it.

Finally, update README regarding the (now homogeneous)
semantics of CONFIG_SPL_[BSS_]MAX_SIZE and add the new
CONFIG_SPL_MAX_FOOTPRINT macro.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Reported-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-04-14 16:07:14 +02:00
Albert ARIBAUD
345be0b267 Merge branch 'u-boot-imx/master' into 'u-boot-arm/master' 2013-04-14 11:45:06 +02:00
Andrew Gabbasov
9b74dc56fb fsl_esdhc: Fix DMA transfer completion waiting loop
Rework the waiting for transfer completion loop condition
to continue waiting until both Transfer Complete and DMA End
interrupts occur. Checking of DLA bit in Present State register
looks not needed in addition to interrupts status checking,
so it can be removed from the condition. Also, DMA Error
condition is added to the list of data errors, checked in the loop.

Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
2013-04-14 11:22:47 +02:00
Eric Nelson
54899fc8fe fsl_esdhc: flush cache after IO completion
The cache should invalidate the read buffer for
the SD card interface after the transfer complete,
not command-complete.

Tested-by: Andrew Gabbasov <Andrew_Gabbasov@mentor.com>
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2013-04-14 11:20:53 +02:00
Albert ARIBAUD
8dc16cf9dd Merge branch 'u-boot-imx/master' into 'u-boot-arm/master' 2013-04-14 10:38:37 +02:00
Albert ARIBAUD
f84a7b8f54 ARM: Fix __bss_start and __bss_end in linker scripts
Commit 3ebd1cbc introduced compiler-generated __bss_start
and __bss_end__ and commit c23561e7 rewrote all __bss_end__
as __bss_end. Their merge caused silent and harmless but
potentially bug-inducing clashes between compiler- and linker-
generated __bss_end symbols.

Make __bss_end and __bss_start compiler-only, and create
__bss_base and __bss_limit for linker-only use.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Reported-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-04-13 22:37:20 +02:00
Fabio Estevam
0f1411bc8d spi: mxc_spi: Set master mode for all channels
The glitch in the SPI clock line, which commit 3cea335c34 (spi: mxc_spi: Fix spi
clock glitch durant reset) solved, is back now and itwas re-introduced by
commit d36b39bf0d (spi: mxc_spi: Fix ECSPI reset handling).

Actually the glitch is happening due to always toggling between slave mode
and master mode by configuring the CHANNEL_MODE bits in this reset function.

Since the spi driver only supports master mode, set the mode for all channels
always to master mode in order to have a stable, "glitch-free" SPI clock line.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-04-13 17:46:42 +02:00
Otavio Salvador
66300ac25b mx6qsabre{sd, auto}: Fix environment as 'mmc rescan' takes no arguments
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-04-13 17:44:37 +02:00
Tetsuyuki Kobayashi
4411b2aea7 BUGFIX: arm: data abort in get_bad_stack_swi
When swi instruction is executed, it is expected to get message
"software interrupt" in console and dump registers and reboot, as
do_software_interrupt() in arch/arm/lib/interrupts.c.
But, actually it causes data abort accessing wrong address in get_bad_stack_swi
macro in arch/arm/cpu/v7/start.S.
This patch fixes this problem.

The same mistake in arch/arm/cpu/{arm1136,arm1176,pxa}/start.S.

Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
2013-04-13 11:12:46 +02:00
Albert ARIBAUD
0c669fd17a Merge branch 'u-boot-ti/master' into 'u-boot-arm/master' 2013-04-13 09:39:29 +02:00
Che-liang Chiou
8732b0700d tpm: Add TPM command library
TPM command library implements a subset of TPM commands defined in TCG
Main Specification 1.2 that are useful for implementing secure boot.
More TPM commands could be added out of necessity.

You may exercise these commands through the 'tpm' command.  However, the
raw TPM commands are too primitive for writing secure boot in command
interpreter scripts; so the 'tpm' command also provides helper functions
to make scripting easier.

For example, to define a counter in TPM non-volatile storage and
initialize it to zero:

$ tpm init
$ tpm startup TPM_ST_CLEAR
$ tpm nv_define d 0x1001 0x1
$ tpm nv_write d 0x1001 0

And then increment the counter by one:

$ tpm nv_read d 0x1001 i
$ setexpr.l i $i + 1
$ tpm nv_write d 0x1001 $i

Signed-off-by: Che-Liang Chiou <clchiou@chromium.org>
2013-04-12 14:13:13 -07:00
Simon Glass
c1af608f6f exynos: Enable I2C TPM for smdk5250
This is used on some Exynos 5250 variants.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-04-12 14:13:02 -07:00
Rong Chang
f626799816 tpm: Add Infineon slb9635_i2c TPM driver
Add a driver for the I2C TPM from Infineon.

Signed-off-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Rong Chang <rongchang@chromium.org>
Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2013-04-12 14:13:00 -07:00
Taylor Hutt
af98a70a6b tpm: Add casts for proper compilation
When building for the Sandbox version, the casts in this change are
necessary to avoid compilation issues.

Signed-off-by: Taylor Hutt <thutt@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2013-04-12 14:12:51 -07:00
Linus Walleij
5e7ffaa4a3 integrator: enable device tree
This enables the device tree library on the Integrator platforms
so we can pass a device tree when booting.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-04-12 22:25:29 +02:00
Tom Rini
b930a3e637 VCMA9: Enable CONFIG_CMD_NAND_YAFFS
As this board has NAND and supports YAFFS2, add CONFIG_MD_NAND_YAFFS

Cc: David Müller <d.mueller@elsoft.ch>
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: David Müller <d.mueller@elsoft.ch>
2013-04-12 22:08:55 +02:00
Albert ARIBAUD
1812201997 Merge branch 'u-boot/master' into 'u-boot-arm/master'
Conflicts:
	drivers/video/exynos_fb.c
2013-04-12 22:07:57 +02:00
Tom Rini
46afd3eff3 omap5_common.h: Switch to ext4
ext3 should not be used on SD cards, so use ext4 instead.

Cc: Sricharan R <r.sricharan@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
2013-04-12 15:29:23 -04:00
man.huber@arcor.de
9d0fd10ca1 omap3: Display MHz instead of mHz on the console
The processor is hopefully running with M(ega)Hz and not with m(illi)Hz.

Signed-off-by: Manfred Huber <man.huber@arcor.de>
2013-04-12 15:29:23 -04:00
Stefan Roese
e303be2d28 Revert "mtd: cfi_flash: Fix CFI flash driver for 8-bit bus support"
This reverts commit 239cb9d904.

Signed-off-by: Stefan Roese <sr@denx.de>
2013-04-12 19:04:54 +02:00
Stefan Roese
b9589ec1a3 Revert "cfi_flash: Use uintptr_t for casts from u32 to void *"
This reverts commit 81a4f7098b.

Signed-off-by: Stefan Roese <sr@denx.de>
2013-04-12 19:04:37 +02:00
Tom Rini
86fdb1619a am335x: Really correct DDR timings on new BeagleBone part
The previous timings were done on the internal-only A1 board which has
different DDR part than all later revs.  The timings need a slight
adjustment to be correct in all cases with later revs.

Signed-off-by: Tom Rini <trini@ti.com>
2013-04-12 12:38:16 -04:00
Holger Brunck
90639feaa0 arm/km: add support for kmsuv31 board
This board is from a u-boot point of view a mixture between kmnusa and
a standard km_kirkwood board. We have our u-boot environment in the spi
NOR flash, but we have a direct connection between the kirkwood and the
piggy. A FPGA is connected via the PCIe interface. So we only have to
select the specific features in the board setup.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
Acked-By: Prafulla Wadaskar <prafulla@marvell.com>
2013-04-12 21:42:22 +05:30
Holger Brunck
dfeafde4fc arm/km: use CONFIG_NAND_ECC_BCH
Switch from 1-bit ecc to 4-bit ecc.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
Acked-By: Prafulla Wadaskar <prafulla@marvell.com>
2013-04-12 21:42:17 +05:30
Holger Brunck
45bd01ef35 arm/km: rename BOARD_LATE_INIT to CONFIG_BOARD_LATE_INIT
commit 9660e442 cosmetic: s/BOARD_LATE_INIT/CONFIG_BOARD_LATE_INIT
removes BOARD_LATE_INIT and uses CONFIG_BOARD_LATE_INIT instead.
Therefore we have to use this define.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
2013-04-12 21:42:10 +05:30
Gerlando Falauto
7070b550be kirkwood_nand: allow usage of NAND_ECC_SOFT_BCH
If CONFIG_NAND_ECC_BCH is set use 4-bit error correction code instead of
the 1-bit error correction code on the NAND device.

Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Acked-by: Scott Wood <scottwood@freescale.com>
2013-04-12 21:42:01 +05:30