Commit graph

89660 commits

Author SHA1 Message Date
Mayuresh Chitale
5a348ccf02 riscv: binman: Fix compilation error
Some platforms may not have any DDR memory below 4G and for such platforms
the TEXT_BASE and LOAD addresses etc are all 64 bit addresses due to
which the u-boot build fails with below error:

u-boot/arch/riscv/dts/binman.dtsi:30.14-25
Value out of range for 32-bit array element
u-boot/arch/riscv/dts/binman.dtsi:43.14-25
Value out of range for 32-bit array element
u-boot/arch/riscv/dts/binman.dtsi:44.15-26
Value out of range for 32-bit array element
FATAL ERROR: Syntax error parsing input tree

Fix by setting the address-cells property to 2 and converting load
addresses to 64 bit values.

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-19 17:29:32 +08:00
Chanho Park
e96e537efd configs: visionfive2: enable bootstage configs
Enable BOOTSTAGE configuration and its command for visionfive2 board.
The feature can be useful for analyzing the elapsed time between boot
stages.

TODO: define / reserve memory region for boot stage stash

StarFive # bootstage report
Timer summary in microseconds (10 records):
       Mark    Elapsed  Stage
          0          0  reset
  3,139,338  3,139,338  board_init_f
  3,176,753     37,415  board_init_r
  4,036,111    859,358  eth_common_init
  4,101,599     65,488  eth_initialize
  4,105,799      4,200  main_loop
  4,145,207     39,408  usb_start
  5,440,963  1,295,756  cli_loop

Accumulated time:
                10,093  dm_f
                15,867  dm_r

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-10-19 17:29:32 +08:00
Heinrich Schuchardt
9385c9b0cd riscv: remove dram_init_banksize()
Remove dram_init_banksize() on the architecture level.

Limiting used RAM to under 4 GiB is only necessary for CPUs which have a
DMA issue. SoC specific code already exists for FU540, FU740, JH7110.

Not all RISC-V boards will have memory below 4 GiB.

A weak implementation of dram_init_banksize() exists in common/board_f.c.

See the discussion in
https://lore.kernel.org/u-boot/545fe813-cb1e-469c-a131-0025c77aeaa2@canonical.com/T/

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
2023-10-19 17:29:32 +08:00
Jim Liu
127d03893b wdt: nuvoton: Fix reset/expire function error
Fix npcm845 watchdog halt for reset function and expire function.
Reset function is restart wdt.

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2023-10-19 07:51:12 +02:00
Simon Glass
bc003cad7f sandbox: watchdog: Avoid an error on startup
For some time now running sandbox with -T produces an error:

   Core:  270 devices, 95 uclasses, devicetree: board
   WDT:   Not starting wdt-gpio-toggle
   wdt_gpio wdt-gpio-level: Request for wdt gpio failed: -16
   WDT:   Not starting wdt@0
   MMC:   mmc2: 2 (SD), mmc1: 1 (SD), mmc0: 0 (SD)

Use an unallocated GPIO to avoid this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 1fc45d6483 ("watchdog: add pulse support to gpio watchdog driver")
Reviewed-by: Stefan Roese <sr@denx.de>
2023-10-19 07:50:18 +02:00
Marek Vasut
2f96064d0c arm64: dts: imx8mp: Describe M24C32-D write-lockable page in DH i.MX8MP DHCOM DT
The i.MX8MP DHCOM SoM production rev.200 is populated with M24C32-D
EEPROMs which have Additional Write lockable page at separate I2C
address. Describe the page in DT to make it available.

Disable the additional page in rev.100 SoM DTO as those devices
contain EEPROM without an Additional Write lockable page.

Signed-off-by: Marek Vasut <marex@denx.de>
2023-10-18 21:29:59 +02:00
Marek Vasut
3c11643b19 eeprom: at24: add ST M24C32-D Additional Write lockable page support
The ST M24C32-D behaves as a regular M24C32, except for the -D variant
which uses up another I2C address for Additional Write lockable page.
This page is 32 Bytes long and can contain additional data. Add entry
for it, so users can describe that page in DT. Note that users still
have to describe the main M24C32 area separately as that is on separate
I2C address from this page.

From Linux kernel commit:
4791146e9055 ("eeprom: at24: add ST M24C32-D Additional Write lockable page support")

Signed-off-by: Marek Vasut <marex@denx.de>
2023-10-18 21:29:59 +02:00
Tom Rini
9a0cf3993f Merge branch '2023-10-17-spl-test-some-load-methods'
To quote the author:
This series adds some tests for various SPL load methods, with the
intent of helping debug v6 of [1]. With that in mind, notable omissions
include NAND and ROMAPI, which both lack sandbox implementations, and
OS_BOOT, which I have deferred due to its complexity. Semihosting is
also omitted, but I think we can test that with qemu.

In order to test all of these methods, we must first generate suitable
images, possibly on filesystems. While other tests have historically
generated these images using external tools (e.g. mkimage, mkfs, etc.),
I have chosen to generate them on the fly. This is for a few reasons:

- By removing external dependencies on pytest to create certain files,
  the tests become self-contained. This makes them easier to iterate on
  and debug.
- By generating tests at runtime, we can dynamically vary the content.
  This helps detect test failures, as even if tests are loaded to the
  same location, the expected content will be different.
- We are not testing the image parsers themselves (e.g.
  spl_load_simple_fit or fs_read) but rather the load methods (e.g.
  spl_mmc_load_image). It is unnecessary to exercise full functionality
  or generate 100% correct images.
- By reducing functionality to only what is necessary, the complexity of
  various formats can often be greatly reduced.

This series depends on [2-3], which are small fixes identified through
this patch set. The organization of patches in this series is as
follows:

- General fixes for bugs which are unlikely to be triggered outside of
  this series
- Changes to IMX8 container images to facilitate testing
- General prep. work, particularly regarding linker issues
- The tests themselves

Passing CI at [4].

[1] https://lore.kernel.org/all/20230731224304.111081-1-sean.anderson@seco.com/
[2] https://lore.kernel.org/all/20230930204246.515254-1-seanga2@gmail.com/
[3] https://lore.kernel.org/all/20231008014748.1987840-1-seanga2@gmail.com/
[4] https://source.denx.de/u-boot/custodians/u-boot-clk/-/pipelines/18128
2023-10-18 08:28:00 -04:00
Sébastien Szymanski
4655b75335 dm: adc: imx93-adc depends on ADC (fix boot)
The i.MX93 11x11 EVK fails to boot with following error:

 Model: NXP i.MX93 11X11 EVK board
 DRAM:  2 GiB
 Error binding driver 'imx93-adc': -96
 Some drivers failed to bind
 Error binding driver 'simple_bus': -96
 Some drivers failed to bind
 Error binding driver 'simple_bus': -96
 Some drivers failed to bind
 initcall sequence 00000000fffb8f28 failed at call 000000008021e0d4 (err=-96)
 ### ERROR ### Please RESET the board ###

That's because since commit e7ff54d963 ("imx93_evk: defconfig: add adc
support") CONFIG_ADC_IMX93 is enabled but CONFIG_ADC is not.
Fix this by enabling CONFIG_ADC in imx93_11x11_evk_defconfig.

Make sure this situation won't happen again in future i.MX93 defconfig by
making CONFIG_ADC_IMX93 depend on CONFIG_ADC.

Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2023-10-18 10:02:49 +02:00
Igor Prusov
14a21f1a80 arm: meson-a1: dts: Sync DT with Linux
Import device tree changes from Linux v6.6-rc6 for Amlogic A1 board.

Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231017213211.121550-3-ivprusov@salutedevices.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-10-18 09:46:01 +02:00
Igor Prusov
43a0b2cb9b serial: amlogic: Add UART compatible for A1 board
Add additional compatible to allow using serial driver with A1 board.
After compatible change in DTS [1], serial_meson driver should still be
able to work with console device.

[1] https://lore.kernel.org/all/20230705181833.16137-8-ddrokosov@sberdevices.ru/

Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231017213211.121550-2-ivprusov@salutedevices.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-10-18 09:46:01 +02:00
Guillaume La Roque
f699cb1dd5 phy: meson-g12a-usb2: fix ret check on power_domain_get
Patch which add A1 SoC support create a regression on khadas vim3/vim3l
boards when we try to use fastboot command:

  => fastboot usb 0
  failed to get power domain
  failed to get power domain
  No USB device found
  USB init failed: -19

Add ENOENT check on ret in probe function.

Fixes: 5533c883ce ("phy: support Amlogic A1 family")

Signed-off-by: Guillaume La Roque <glaroque@baylibre.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> # on vim3
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231017185725.809524-1-glaroque@baylibre.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-10-18 09:45:48 +02:00
Sean Anderson
60d76e332d test: spl: Add a test for the SPI load method
Add test for the SPI load method. This one is pretty straightforward. We
can't enable FIT_EXTERNAL with LOAD_FIT_FULL because spl_spi_load_image
doesn't know the total image size and has to guess from fdt_totalsize. This
doesn't include external data, so loading it will fail.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-17 20:50:52 -04:00
Sean Anderson
65efaac425 test: spl: Add a test for the NOR load method
Add a test for the NOR load method. Since NOR is memory-mapped we can
substitute a buffer instead. The only major complication is testing LZMA
decompression.  It's too complex to implement LZMA compression in a test, and we
have no in-tree compressor, so we just include some pre-compressed data. This
data was generated through something like

    generate_data(plain, plain_size, "lzma")
    cat plain.dat | lzma | hexdump -C

and was cleaned up further in my editor.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-17 20:50:52 -04:00
Sean Anderson
53d8bf8f9c test: spl: Add a test for the NET load method
Add a test for loading U-Boot over TFTP. As with other sandbox net
routines, we need to initialize our packets manually since things like
net_set_ether and net_set_udp_header always use "our" addresses. We use
BOOTP instead of DHCP, since DHCP has a tag/length-based format which is
harder to parse. Our TFTP implementation doesn't define as many constants
as I'd like, so I create some here. Note that the TFTP block size is
one-based, but offsets are zero-based.

In order to avoid address errors, we need to set up/define some additional
address information settings. dram_init_banksize would be a good candidate
for settig up bi_dram, but it gets called too late in board_init_r.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-17 20:50:52 -04:00
Sean Anderson
6ba8ecaa96 test: spl: Add a test for the MMC load method
Add a test for the MMC load method. This shows the general shape of tests
to come: The main test function calls do_spl_test_load with an appropriate
callback to write the image to the medium.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-17 20:50:52 -04:00
Sean Anderson
6c5d0d9398 test: spl: Add a test for spl_blk_load_image
Add a test for spl_blk_load_image, currently used only by NVMe. Because
there is no sandbox NVMe driver, just use MMC instead. Avoid falling back
to raw images to make failures more obvious.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-17 20:50:52 -04:00
Sean Anderson
59b3633491 test: spl: Add functions to create filesystems
Add some functions for creating fat/ext2 filesystems with a single file and
a test for them. Filesystems require block devices, and it is easiest to
just use MMC for this. To get an MMC, we must also pull in the test device
tree. SPL_TIMER is necessary for SPL_MMC, perhaps because it uses a timeout.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-17 20:50:52 -04:00
Sean Anderson
b93cc1e73e test: spl: Add functions to create images
This add some basic functions to create images, and a test for said
functions. This is not intended to be a test of the image parsing
functions, but rather a framework for creating minimal images for testing
load methods. That said, it does do an OK job at finding bugs in the image
parsing directly.

Since we have two methods for loading/parsing FIT images, add LOAD_FIT_FULL
as a separate CI run.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-17 20:50:52 -04:00
Sean Anderson
b5bf83b691 test: spl: Fix spl_test_load not failing if fname doesn't exist
Returning a negative value from a unit test doesn't automatically fail the
test.  We have to fail an assertion. Modify the test to do so.

This now causes the test to count as a failure on VPL. This is because the
fname of SPL (and U-Boot) is generated with make_exec in os_jump_to_image.
The original name of SPL is gone, and we can't determine the name of U-Boot
from the generated name.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-17 20:50:52 -04:00
Sean Anderson
c56468a60d test: spl: Split tests up and use some configs
In order to make adding new spl unit tests easier, especially when they may
have many dependencies, add some Kconfigs for the existing image test.
Split it into the parts which are generic (such as callbacks) and the
test-specific parts.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-17 20:50:52 -04:00
Sean Anderson
a24be84df9 sandbox: Support -T in spl
The test devicetree is only compiled for U-Boot proper. When accessing it in
SPL we need to go up one directory.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-17 20:50:52 -04:00
Sean Anderson
b02c4e941c spl: Use map_sysmem where appropriate
All "physical" addresses in SPL must be converted to virtual addresses
before access in order for sandbox to work. Add some calls to map_sysmem in
appropriate places. We do not generally call unmap_sysmem, since we need
the image memory to still be mapped when we jump to the image. This doesn't
matter at the moment since unmap_sysmem is a no-op.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-17 20:50:52 -04:00
Sean Anderson
93caa3efe2 spl: Add callbacks to invalidate cached devices
Several SPL functions try to avoid performing initialization twice by
caching devices. This is fine for regular boot, but does not work with
UNIT_TEST, since all devices are torn down after each test. Add some
functions to invalidate the caches which can be called before testing these
load methods.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
2023-10-17 20:50:52 -04:00
Sean Anderson
acb96c170d net: bootp: Fall back to BOOTP from DHCP when unit testing
If we sent a DHCP packet and get a BOOTP response from the server, we
shouldn't try to send a DHCPREQUEST packet, since it won't be DHCPACKed.
Transition straight to BIND. This is only enabled for UNIT_TEST to avoid
bloat, since I suspect the number of BOOTP servers in the wild is
vanishingly small.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-17 20:50:52 -04:00
Sean Anderson
7ccc6044e9 net: bootp: Move port numbers to header
These defines are useful when testing bootp.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2023-10-17 20:50:52 -04:00
Sean Anderson
7d04986adf net: Fix compiling SPL when fastboot is enabled
When fastboot is enabled in U-Boot proper and SPL_NET is enabled, we will
try to (unsuccessfully) reference it in SPL. Fix these linker errors by
conditioning on SPL_UDP/TCP_FUNCTION_FASTBOOT.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-10-17 20:50:52 -04:00
Sean Anderson
0bf3fec279 fs: ext4: Add some defines for testing
Add various defines which are not necessary for reading/writing
filesystems, but which are useful for creating them. These mostly come from
Linux v6.5-rc2 (what I had checked out).

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-17 20:50:52 -04:00
Sean Anderson
44071cd5a8 fs: ext4: Fix building ext4 in SPL if write is enabled
If EXT4_WRITE is enabled, write capabilities will be compiled into SPL, but
not CRC16. Add an option to enable CRC16 to avoid linker errors.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-17 20:50:52 -04:00
Sean Anderson
c39d22c337 fs: Disable sandbox filesystem in SPL
Don't bother compiling the sandbox filesystem in SPL for now, as it is not
needed.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-17 20:50:52 -04:00
Sean Anderson
841c4d6088 lib: acpi: Fix linking SPL when ACPIGEN is enabled
lib/acpi/acpigen.o is only compiled into SPL when SPL_ACPIGEN is enabled.
Update several files which reference these functions accordingly.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-17 20:50:52 -04:00
Sean Anderson
eaf738559c spl: Allow enabling SPL_OF_REAL and SPL_OF_PLATDATA at the same time
Sandbox unit tests in U-Boot proper load a test device tree to have some
devices to work with. In order to do the same in SPL, we must enable
SPL_OF_REAL. However, we already have SPL_OF_PLATDATA enabled. When
generating platdata from a devicetree, it is expected that we will not need
devicetree access functions (even though SPL_OF_CONTROL is enabled). This
expectation does not hold for sandbox, so allow user control of
SPL_OF_REAL.

There are several places in the tree where conditions involving OF_PLATDATA
or OF_REAL no longer function correctly when both of these options can be
selected at the same time. Adjust these conditions accordingly.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-17 20:50:52 -04:00
Sean Anderson
12b3339070 Move i.MX8 container image loading support to common/spl
To facilitate testing loading i.MX8 container images, move the
parse-container code to common/spl.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
2023-10-17 20:50:52 -04:00
Sean Anderson
ab12179b3e arm: imx: Check header before calling spl_load_imx_container
Make sure we have an IMX header before calling spl_load_imx_container,
since if we don't it will fail with -ENOENT. This allows us to fall back to
legacy/raw images if they are also enabled.

This is a functional change, one which likely should have been in place
from the start, but a functional change nonetheless. Previously, all
non-IMX8 images (except FITs without FIT_FULL) would be optimized out if
the only image load method enabled supported IMX8 images. With this change,
support for other image types now has an effect.

There are seven boards with SPL_LOAD_IMX_CONTAINER enabled: three with
SPL_BOOTROM_SUPPORT:

    imx93_11x11_evk_ld imx93_11x11_evk imx8ulp_evk

and four with SPL_MMC:

    deneb imx8qxp_mek giedi imx8qm_mek

All of these boards also have SPL_RAW_IMAGE_SUPPORT and
SPL_LEGACY_IMAGE_FORMAT enabled as well. However, none have FIT support
enabled. Of the six load methods affected by this patch, only SPL_MMC and
SPL_BOOTROM_SUPPORT are enabled with SPL_LOAD_IMX_CONTAINER.
spl_romapi_load_image_seekable does not support legacy or raw images, so
there is no growth. However, mmc_load_image_raw_sector does support loading
legacy/raw images. Since these images could not have been booted before, I
have disabled support for legacy/raw images on these four boards. This
reduces bloat from around 800 bytes to around 200.

There are no in-tree boards with SPL_LOAD_IMX_CONTAINER and AHAB_BOOT both
enabled, so we do not need to worry about potentially falling back to
legacy images in a secure boot scenario.

Future work could include merging imx_container.h with imx8image.h, since
they appear to define mostly the same structures.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
2023-10-17 20:50:52 -04:00
Sean Anderson
d401e0b264 arm: imx: Add function to validate i.MX8 containers
Add a function to abstract the common task of validating i.MX8 container
image headers.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
2023-10-17 20:50:52 -04:00
Sean Anderson
d9416cc449 arm: imx: Use log_err for errors in read_auth_container
To allow for more flexible handling of errors, use log_err instead of
printf.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
2023-10-17 20:50:52 -04:00
Sean Anderson
14399638c6 arm: imx: Add newlines after error messages
These error messages are missing newlines. Add them.

Fixes: 6e81ca220e ("imx: parse-container: Use malloc for container processing")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
2023-10-17 20:50:52 -04:00
Sean Anderson
5c09c25873 arm: imx: Fix i.MX8 container load address
We should load images to their destination, not their entry point.

Fixes: 7b86cd4274 ("imx8: support parsing i.MX8 Container file")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
2023-10-17 20:50:52 -04:00
Sean Anderson
5264413246 spl: fit: Fix entry point for SPL_LOAD_FIT_FULL
The entry point is not always the same as the load address. Use the value
of the entry property if it exists.

Fixes: 8a9dc16e4d ("spl: Add full fitImage support")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-17 20:50:52 -04:00
Sean Anderson
6cc2182c84 spl: nor: Don't allocate header on stack
spl_image_info.name contains a reference to legacy_img_hdr. If we allocate
the latter on the stack, it will be clobbered after we return. This was
addressed for NAND back in 06377c5a1f ("spl: spl_legacy: Fix NAND boot on
OMAP3 BeagleBoard"), but that commit didn't fix NOR.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
2023-10-17 20:50:52 -04:00
Sean Anderson
301ae61842 spl: legacy: Fix referencing _image_binary_end
On non-arm architectures, _image_binary_end is defined as a ulong and not a
char[]. Take the address of it when accessing it, which is correct for
both.

Fixes: 1b8a1be1a1 ("spl: spl_legacy: Fix spl_end address")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-17 20:50:52 -04:00
Sean Anderson
bfcf7521eb Revert "fs: ext4: check the minimal partition size to mount"
This check breaks small partitions (under 1024 blocks) because part_length
is in units of part.blksz and not bytes. Given the purpose of this
function, we really want to make sure the partition is SUPERBLOCK_START +
SUPERBLOCK_SIZE (2048) bytes so we can call ext4_read_superblock without
error.

The obvious solution is to convert callers from things like

	ext4fs_mount(part_info.size)

to

	ext4fs_mount(part_info.size * part_info.blksz);

However, I'm not really a fan of the bloat that would cause, especially
since the error is now suppressed. I think the best course of action here
is to just revert the patch.

This reverts commit 9905cae65e.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-10-17 20:50:52 -04:00
Sean Anderson
a0733b3c66 spl: mmc: Fix subsequent calls to spl_mmc_load with CONFIG_BLK
MMC devices do not have uclass platdata containing blk_descs, only their
child block devices do. Fortunately, we have a function just for this
purpose. This fixes subsequent calls to spl_mmc_load.

Fixes: bf28d9a659 ("spl: mmc: Use correct MMC device when loading image")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
2023-10-17 20:50:52 -04:00
Fedor Ross
a41c9ddb30 ARM: imx: Add support for detecting primary/secondary bmode on MX8M
Implement the 'getprisec' subcommand of 'bmode' command for i.MX8M by
reading out the ROM log events. This event is set by the BootROM if it
switched to the secondary copy due to primary copy being corrupted.

Signed-off-by: Fedor Ross <fedor.ross@ifm.com>
Signed-off-by: Marek Vasut <marex@denx.de>
2023-10-17 23:55:10 +02:00
Fedor Ross
71c2faeca7 ARM: imx: Use correct U-Boot offset in case of secondary boot from eMMC
In case of a secondary image boot from the user area of an eMMC device,
the correct offset must be calculated. The offset is fused in the fuse
IMG_CNTN_SET1_OFFSET of the i.MX8M Nano and Plus. The calculation of the
offset is described in the reference manual (IMX8MNRM Rev. 2, 07/2022
and IMX8MPRM Rev. 1, 06/2021):

The fuse IMG_CNTN_SET1_OFFSET (0x490[22:19]) is defined as follows:
* Secondary boot is disabled if fuse value is bigger than 10,
  n = fuse value bigger than 10.
* n == 0: Offset = 4MB
* n == 2: Offset = 1MB
* Others & n <= 10 : Offset = 1MB*2^n

Signed-off-by: Fedor Ross <fedor.ross@ifm.com>
Signed-off-by: Marek Vasut <marex@denx.de>
2023-10-17 23:55:10 +02:00
Fedor Ross
6c97153b04 ARM: imx: Factor out parsing of ROM log
Factor out parsing of ROM log in function spl_mmc_emmc_boot_partition().
This can be helpful to detect a secondary image boot without fiddling
around with MMC partitions. This way for example, U-Boot is able to
detect a secondary image boot and can enter some fallback scenario like
starting a recovery mode.

Signed-off-by: Fedor Ross <fedor.ross@ifm.com>
Signed-off-by: Marek Vasut <marex@denx.de>
2023-10-17 23:55:10 +02:00
Marek Vasut
e936db9536 spl: mmc: Introduce proper layering for spl_mmc_get_uboot_raw_sector()
Introduce two new weak functions, arch_spl_mmc_get_uboot_raw_sector() and
board_spl_mmc_get_uboot_raw_sector(), each of which can be overridden at
a matching level, that is arch/ and board/ , in addition to the existing
weak function spl_mmc_get_uboot_raw_sector().

This way, architecture code can define a default architecture specific
implementation of arch_spl_mmc_get_uboot_raw_sector(), while the board
code can override that using board_spl_mmc_get_uboot_raw_sector() which
takes precedence over the architecture code. In some sort of unlikely
special case where code has to take precedence over board code too, the
spl_mmc_get_uboot_raw_sector() is still left out to be a weak function,
but it should be unlikely that this is ever needed to be overridden.

Signed-off-by: Marek Vasut <marex@denx.de>
2023-10-17 23:55:10 +02:00
Sébastien Szymanski
fb2bdc4efc arm: dts: imx93-11x11-evk: add bootph-some-ram property
i.MX93 11x11 EVK fails to boot:

U-Boot SPL 2023.10-00558-g65b9b3462bec-dirty (Oct 03 2023 - 17:40:10 +0200)
SOC: 0xa0009300
LC: 0x40010
M33 prepare ok
Normal Boot
Trying to boot from BOOTROM
Boot Stage: Primary boot
image offset 0x8000, pagesize 0x200, ivt offset 0x0
Load image from 0x44400 by ROM_API
NOTICE:  BL31: v2.8(release):android-13.0.0_2.0.0-0-ge4b2dbfa52f5
NOTICE:  BL31: Built : 17:52:46, Sep 28 2023

That's because commit 9e644284ab ("dm: core: Report
bootph-pre-ram/sram node as pre-reloc after relocation"):

	"[This] changes behavior of what nodes are bound in the U-Boot
	proper pre-relocation phase. Change to bootph-all or add
	bootph-some-ram prop to restore prior behavior."

Fix this by adding bootph-some-ram prop as suggested by the commit
above.

Fixes: 9e644284ab ("dm: core: Report bootph-pre-ram/sram node as pre-reloc after relocation")
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2023-10-17 23:55:09 +02:00
Tom Rini
e65b5d35c9 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh
- RZ/G2L part 1, except for two serial port patches which I had to drop
  as they broke R2Dplus, they will come later via subsequent PR.
2023-10-17 09:15:56 -04:00
Paul Barker
4e65545f7a board: rzg2l: Add RZ/G2L SMARC EVK board
The Renesas RZ/G2L SMARC Evaluation Board Kit consists of the RZ/G2L
System-on-Module (SOM) based on the R9A07G044L2 SoC, and a common SMARC
carrier board.

The ARM TrustedFirmware code for the Renesas RZ/G2L SoC family passes a
devicetree blob to the bootloader as an argument in the same was
previous R-Car gen3/gen4 SoCs. This blob contains a compatible string
which can be used to identify the particular SoC we are running on and
this is used to select the appropriate device tree to load.

The configuration renesas_rzg2l_smarc_defconfig is added to support
building for this target. In the future this defconfig will be extended
to support other SoCs and evaluation boards from the RZ/G2L family.

Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-17 03:27:42 +02:00