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arm64: dts: imx8mp: Describe M24C32-D write-lockable page in DH i.MX8MP DHCOM DT

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The i.MX8MP DHCOM SoM production rev.200 is populated with M24C32-D
EEPROMs which have Additional Write lockable page at separate I2C
address. Describe the page in DT to make it available.

Disable the additional page in rev.100 SoM DTO as those devices
contain EEPROM without an Additional Write lockable page.

Signed-off-by: Marek Vasut <marex@denx.de>
This commit is contained in:
Marek Vasut 2023-10-16 02:05:25 +02:00 committed by Stefano Babic
parent 3c11643b19
commit 2f96064d0c
2 changed files with 20 additions and 0 deletions
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8
arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dts
View file

@ -24,6 +24,14 @@
pagesize = <16>;
};
&eeprom0wl {
status = "disabled";
};
&eeprom1wl {
status = "disabled";
};
&ethphy0f { /* SMSC LAN8740Ai */
pinctrl-0 = <&pinctrl_ethphy0 &pinctrl_ioexp>;
reset-gpios = <&gpio3 20 GPIO_ACTIVE_LOW>;

12
arch/arm/dts/imx8mp-dhcom-som.dtsi
View file

@ -392,6 +392,18 @@
reg = <0x53>;
};
eeprom0wl: eeprom@58 {
compatible = "atmel,24c32d-wl"; /* M24C32-D WL page of 0x50 */
pagesize = <32>;
reg = <0x58>;
};
eeprom1wl: eeprom@5b {
compatible = "atmel,24c32d-wl"; /* M24C32-D WL page of 0x53 */
pagesize = <32>;
reg = <0x5b>;
};
ioexp: gpio@74 {
compatible = "nxp,pca9539";
reg = <0x74>;