The function's name is misleading as one might think it is used
generally to select the boot-mode when in reality it is only used by the
MMC driver to find out in what way it should try reading U-Boot Proper
from a device (either using a filesystem, a raw sector/partition, or an
eMMC boot partition).
Rename it to spl_mmc_boot_mode() to make it more obvious what this
function is about.
Link: https://lists.denx.de/pipermail/u-boot/2020-April/405979.html
Signed-off-by: Harald Seiler <hws@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
- fix SMBIOS info on Odroid-C2
- Fix video output on GXBB/GXL/GXM boards
- add USB gadget support for GXL/GXM boards
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Merge tag 'u-boot-amlogic-20200420' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic
- enable DM_RNG on meson boards
- fix SMBIOS info on Odroid-C2
- Fix video output on GXBB/GXL/GXM boards
- add USB gadget support for GXL/GXM boards
- Fix boot on am335x guardian board
- Increase OPSI speed on AM65x and J721E devices
- Use JTAD register for identifying K3 devices.
- Update TI entry in MAINTAINERS file.
Add the USB DWC2 node to u-boot specific dtsi files since Gadget
support is not (yet) available in upstream Linux yet.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Add arch code to initialize USB Gadget mode using the DWC2 controller,
and using the previously added set_mode() phy functions.
[narmstrong: fixup board_usb_cleanup call to phy_meson_gxl_usb2_set_mode]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Add set_mode function in the Amlogic GXL PHYs that will be called by
the arch code to switch PHYs from/to gadget mode.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
JTAG ID register is defined by IEEE 1149.1 for device identification.
Use this JTAG ID register for identifying AM65x[0] and J721E[1] devices
instead of using SoC specific registers.
[0] http://www.ti.com/lit/ug/spruid7e/spruid7e.pdf
[1] http://www.ti.com/lit/ug/spruil1a/spruil1a.pdf
Reported-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Those two boards are supposed to be run with a single u-boot binary.
There are notable differences though - HSC uses DSA switch (which
phy_id == 0x0) and DCC (DP83848C).
After the commit 3bf135b6c3
("drivers: net: phy: Ignore PHY ID 0 during PHY probing") the PHY devices
with phy_id == 0 are not created in U-Boot anymore. This caused regression
on HSC.
To fix this problem - the fec's 'fixed-link' node has been introduced and
the phy_id is not assessed anymore. This approach works on both boards.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
During the conversion of this board to DM_REGULATOR, usb-mass-storage
was broken and started failing with the following error:
=> ums 0 mmc 2
UMS: LUN 0, dev 2, hwpart 0, sector 0x0, count 0xe90000
Error enabling VBUS supply
g_dnl_register: failed!, error: -38
g_dnl_register failed
Fix this by adding the relevant GPIO to the regulator node.
Fixes: 4ca99fe81a ("ARM: imx: dh-imx6: Enable DM regulator")
Signed-off-by: Harald Seiler <hws@denx.de>
Use DM_ETH instead of legacy networking. Add VIO as a fixed regulator
to the relevant device-trees and augment the FEC node with properties
for the reset GPIO.
It should be noted that the relevant properties for the reset GPIO
already exist in the PHY node (reset-gpios, reset-delay-us,
reset-post-delay-us) but U-Boot currently ignores those and only
supports the bus-level reset properties in the FEC node
(phy-reset-gpios, phy-reset-duration, phy-reset-post-delay).
Signed-off-by: Harald Seiler <hws@denx.de>
The detection of the revD1 version is based on the presence of the PMIC.
Currently revb1 device trees are used for mx6q/mx6dl variants, which
do not have the PMIC nodes.
This causes revD1 boards to be incorrectly be detected as revB1.
Fix this issue by using the revd1 device trees, so that the PMIC node can be
found and then the PMIC can be detected by reading its register ID.
Imported the revd1 device trees from mainline kernel version 5.7-rc1.
Reported-by: Heiko Schocher <hs@denx.de>
Reported-by: Derek Atkins <derek@ihtfp.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Derek Atkins <derek@ihtfp.com>
Tested-by: Heiko Schocher <hs@denx.de>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Linux doesn't provide skeleton.dtsi file so let's remove its include and
provide #address-cells/size-cells = <1> that were defined in
skeleton.dtsi before.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Add support for i.MXRT by adding CONFIG_IMXRT in register structure and
adding .compatible = "fsl,imxrt-lcdif".
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
The device trees for TQMa6x SOM support variations in
- CPU type: imx6dl- or imx6q-
- MBa6 I2C bus access: -mba6a (i2c1) or -mba6b (i2c3)
(plus the respective common/module include trees)
- USBH1 is directly connected to a hub
- USBOTG is connected to a separate connector
and can act as host/device or full OTG port.
Signed-off-by: Michael Krummsdorf <michael.krummsdorf@ew.tq-group.com>
The i.MX6DP and i.MX6QP incorporate NoC interconnect logic
which needs to be configured in order to use external DDR memory.
This patch enables the SPL to configure the necessary registers
in accordance with the NXP engineering bulletin EB828.
Co-developed-by: Filip Brozović <fbrozovic@gmail.com>
Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Signed-off-by: Filip Brozovic <fbrozovic@gmail.com>
LDO mode may be already enabled by the ROM and enabling it again
can cause U-Boot to hang.
Avoid this problem by only enabling LDO mode if it is initially disabled.
Reported-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
These PMC0 definitions are already defined in the beginning
of the file, so remove the duplication.
Reported-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Simplify the arm relocation behavior and get gd directly form new_gd,
as it is already done in crt0_64.S:
ldr x18, [x18, #GD_NEW_GD] /* x18 <- gd->new_gd */
This patch avoid assumption on new GD location (new GD is below bd -
with #GD_SIZE offset).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
This reverts the workaround introduced by the
commit 16fec9b0bc ("stm32mp1: remove the imply BOOTSTAGE")
As the bootstage alignment issue is now solved.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Update reference in files detected by
scripts/documentation-file-ref-check
doc/README.mxc_hab => doc/imx/habv4/*
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Add a simple pincontrol associated to the sandbox gpio driver,
that allows to check pin configuration with the command pinmux.
The pinmux test is also updated to test behavior with 2 pincontrols.
Example to check LED pin configuration:
=> pinmux list
| Device | Driver | Parent
| pinctrl-gpio | sandbox_pinctrl_gpio | root_driver
| pinctrl | sandbox_pinctrl | root_driver
=> pinmux dev pinctrl-gpio
=> pinmux status
a0 : gpio input .
a1 : gpio input .
a2 : gpio input .
a3 : gpio input .
a4 : gpio input .
a5 : gpio output .
a6 : gpio output .
...
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Add tests for new API set_dir_flags and set_dir_flags and associated
code in gpio uclass.
Test support for new flags GPIO_OPEN_DRAIN, GPIO_OPEN_SOURCE
GPIO_PULL_UP and GPIO_PULL_DOWN.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Cleanup binding support, use the generic binding by default
(test u-class gpio_xlate_offs_flags function) and add
specific binding for added value.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add test for "pins" configuration in gpio uclass with set_state() ops
and test for generic parsing of pinconf_param array).
set_state() is called by:
- pinctrl_generic_set_state
|- pinctrl_generic_set_state_subnode
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch removes the ops get_open_drain/set_open_drain
and the API dm_gpio_get_open_drain/dm_gpio_set_open_drain.
The ops only provided in one driver (mpc8xxx gpio) and the
associated API is never called in boards.
This patch prepare a more generic set/get_dir_flags ops,
including the open drain property.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
This is pretty minor set of changes mostly touching HSDK board:
* Enable on-chip reset controller on HSDK
* Add possibility to turn-on & off L2$ on more
recent ARC HS processors.
* AXI tunnel clock calculation on HSDK
As the driver of on-chip reset controller became available
we are ready to enable it.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Force inlining of IOC related functions used in other cache
functions. This is preventive change.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Since version 3.0 ARC HS supports SL$ (L2 system level cache)
disable. So add support for SL$ disable/enable to code.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Enhancements to 'dm' command
Log test enhancements and syslog driver
DM change to read parent ofdata before children
Minor fixes
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Merge tag 'dm-pull-10apr20-take2' of git://git.denx.de/u-boot-dm
Functions for reading indexed values from device tree
Enhancements to 'dm' command
Log test enhancements and syslog driver
DM change to read parent ofdata before children
Minor fixes
The Linux VPU bindings have changed and dropped the dmc register range.
Add it back in the meson-gx-u-boot.dtsi file until a proper canvas driver
is available.
Fixes: dd5f2351e9 ("arm64: dts: meson: sync dt and bindings from v5.6-rc2")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The patch adds helper functions to allow reading a single indexed u32
value from a device-tree property containing multiple u32 values, that
is an array of integers.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add test case to cover dev_read_u64 and dev_read_u64_default functions.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
Currently we are not able to test reservations created by ft_board_setup().
Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>
For testing the handling of memory reservations create a reserved-memory
node in sandbox.dts and sandbox64.dts.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>
Hitting Ctrl-C is a documented way to exit the sandbox, but it is not
actually equivalent to the reset command. The latter, since it follows
normal process exit, takes care to reset terminal settings and
restoring the O_NONBLOCK behaviour of stdin (and, in a terminal, that
is usually the same file description as stdout and stderr, i.e. some
/dev/pts/NN).
Failure to restore (remove) O_NONBLOCK from stdout/stderr can cause
very surprising and hard to debug problems back in the terminal. For
example, I had "make -j8" consistently failing without much
information about just exactly what went wrong, but sometimes I did
get a "echo: write error". I was at first afraid my disk was getting
bad, but then a simple "dmesg" _also_ failed with write error - so it
was writing to the terminal that was buggered. And both "make -j8" and
dmesg in another terminal window worked just fine.
So install a SIGINT handler so that if the chosen terminal
mode (cooked or raw-with-sigs) means Ctrl-C sends a SIGINT, we will
still call os_fd_restore(), then reraise the signal and die as usual
from SIGINT.
Before:
$ grep flags /proc/$$/fdinfo/1
flags: 0102002
$ ./u-boot
# hit Ctrl-C
$ grep flags /proc/$$/fdinfo/1
flags: 0106002
After:
$ grep flags /proc/$$/fdinfo/1
flags: 0102002
$ ./u-boot
# hit Ctrl-C
$ grep flags /proc/$$/fdinfo/1
flags: 0102002
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
The way the PCI nodes are written today causes a number of warnings if
we stop disabling some of the warnings we pass to DTC. As these
warnings aren't disabled in current Linux Kernel builds, we should aim
to not disable them here either, so rewrite these slightly. Update the
driver model doc as well.
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
The libretech-ac u-boot.dtsi file is missing to enabled DT nodes changes
to enable Video output on U-Boot.
Fixes: 671b1db8f8 ("arm64: dts: meson-gx: vpu should be probed before relocation")
Reported-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Jerome Brunet <jbrunet@baylibre.com>
This file is potentially useful to other architectures saddled with ACPI
so move most of its contents to a common location.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
This header relates to ACPI and we are about to add some more ACPI
headers. Move this one into a new directory so they are together.
The header inclusion in pci_rom.c is not specific to x86 anymore, so drop
the #ifdef CONFIG_X86.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add a sandbox test for the basic ACPI functionality we have so far.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Add the C version of this header. It includes a few Chrome OS bits which
are disabled for a normal build.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolgang.wallner@br-automation.com>
With P2SB the initial BAR (base-address register) is set up by TPL and
this is used unchanged right through U-Boot.
At present the reading of this address is split between the ofdata() and
probe() methods. There are a few problems that are unique to the p2sb.
One is that its children need to call pcr_read32(), etc. which needs to
have the p2sb address correct. Also some of its children are pinctrl
devices and pinctrl is used when any device is probed. So p2sb really
needs to get its base address set up in ofdata_to_platdata(), before it is
probed.
Another point is that reading the p2sb BAR will not work if the p2sb is
hidden. The FSP-S seems to hide it, presumably to avoid confusing PCI
enumeration.
Reading ofdata in ofdata_to_platdata() is the correct place anyway, so
this is easy to fix.
Move the code into one place and use the early-regs property in all cases
for simplicity and to avoid needing to probe any PCI devices just to read
the BAR.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
