Commit graph

254 commits

Author SHA1 Message Date
Marek Vasut
07252f6f7e ddr: altera: Add ECC DRAM scrubbing support for Arria10
The SDRAM must first be rewritten by zeroes if ECC is used to initialize
the ECC metadata. Make the CPU overwrite the DRAM with zeroes in such a
case. This scrubbing implementation turns the caches on temporarily, then
overwrites the whole RAM with zeroes, flushes the caches and turns them
off again. This provides satisfactory performance.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-07-12 09:22:12 +02:00
Marek Vasut
93a8ed8685 ddr: altera: Drop custom dram_bank_mmu_setup() on Arria10
This function was never used in SPL and the default implementation of
dram_bank_mmu_setup() does the same thing. The only difference is the
part which configures OCRAM as cachable, which doesn't really work as
it covers more than the OCRAM.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
2018-07-12 09:22:12 +02:00
Ley Foon Tan
0bc28b7cb8 ddr: altera: stratix10: Add DDR support for Stratix10 SoC
Add DDR support for Stratix SoC

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-07-12 09:22:12 +02:00
Tom Rini
624d2cae34 SPDX: Fixup SPDX tags in a few new files
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-20 09:47:45 -04:00
Tien Fong Chee
901af3e903 configs: Add DDR Kconfig support for Arria 10
This patch enables DDR Kconfig support for Arria 10.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
2018-05-18 10:30:47 +02:00
Tien Fong Chee
5658a299bd ARM: socfpga: Add DDR driver for Arria 10
Add DDR driver support for Arria 10.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2018-05-18 10:30:47 +02:00
Tien Fong Chee
9ef9fe3455 ARM: socfpga: Rename the gen5 sdram driver to more specific name
Current sdram driver is only applied to gen5 device, hence it is better
to rename sdram driver to more specific name which is related to gen5
device.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2018-05-18 10:30:47 +02:00
Tom Rini
83d290c56f SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 09:34:12 -04:00
Tom Rini
d024236e5a Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR
We have a large number of places where while we historically referenced
gd in the code we no longer do, as well as cases where the code added
that line "just in case" during development and never dropped it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-27 14:54:48 -04:00
Goldschmidt Simon
92962b3caf ddr: altera: silence PHY calibration unless in debug mode
This driver has been using printf() including filename since it was
added. Convert to using debug() instead.

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
2018-01-25 09:59:37 +01:00
Ley Foon Tan
707cd012e2 arm: socfpga: Convert Altera DDR SDRAM driver to use Kconfig
Convert Altera DDR SDRAM driver to use Kconfig method.
Enable ALTERA_SDRAM by default if it is on Gen5 target.
Arria 10 will have different driver.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2017-04-14 14:06:57 +02:00
Chin Liang See
89a54abf1b ddr: altera: Configuring SDRAM extra cycles timing parameters
To enable configuration of sdr.ctrlcfg.extratime1 register which enable
extra clocks for read to write command timing. This is critical to
ensure successful LPDDR2 interface

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-10-27 08:03:07 +02:00
Marek Vasut
e026b984e6 ddr: altera: Repair DQ window centering code
The code uses a lot of signed numbers, which ended up in variables
of unsigned type, which resulted in all sorts of underflows. This
in turn caused incorrect calibration on certain boards. Moreover,
repair the readout of the DQ delay, which was being pulled from
wrong register.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
2016-04-20 11:28:45 +02:00
Marek Vasut
85f76628a0 ddr: altera: Staticize global variables
Just staticize global variables in sequencer, since there is no
point in having these symbols available outside of the DDR code.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
2016-04-20 11:28:45 +02:00
Marek Vasut
ea9aa2414e ddr: altera: Make DLEVEL behavior inclusive
Originally, the DLEVEL selects the debug level within the sequencer code,
but only displays the messages on that particular debug level. Tweak the
handling such that for particular debug level, debug messages on that
level and lower are displayed. This allows better regulation of debug
message verbosity.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
2016-04-20 11:28:45 +02:00
Marek Vasut
70ed80af46 ddr: altera: Zero DM IN delay in scc_mgr_zero_group()
This one last set of delay configuration registers was not properly
zeroed out originally, fix it and zero them out.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
2016-04-20 11:28:45 +02:00
Marek Vasut
f3f777cdf0 ddr: altera: Remove unnecessary ODT mode config
There is no point in resetting the ODT setting if the write test
failed, since the code will always retry the calibration and thus
reconfigure the ODT anyway OR the code will fail calibration and
halt.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
2016-04-20 11:28:44 +02:00
Marek Vasut
f5f8c411de ddr: altera: Remove unnecessary update of the SCC
Every invocation of the scc_mgr_set_dqs_en_delay_all_ranks() is
followed by SCC manager update. Moreover, only this function
triggers the SCC manager update internally. Thus, remove the
internal invocation to avoid triggering the update twice.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
2016-04-20 11:28:44 +02:00
Marek Vasut
164eb23f49 ddr: altera: Fix DRAM end value in protection rule
The hi address bitfield in the protection rule must be set to
the last address in the region which the rule represents. The
behavior is now in-line with code generated by Quartus 15.1 .

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
2016-04-20 11:28:44 +02:00
Marek Vasut
8e9e62c946 ddr: altera: Fix scc_mgr_set() argument order
The code should be setting registers to zero, not one register to value.
Swap the order of arguments to correct the behavior. The behavior is now
in-line with code generated by Quartus 15.1 .

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
2016-04-20 11:28:44 +02:00
Marek Vasut
bba7711092 ddr: altera: Tweak DQS tracking enable handling
In the most unlikely case the DQS tracking was to be disabled,
make sure we do not errornously re-enable it. Note that DQS
tracking is enabled on all systems observed thus far.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
2016-04-20 11:28:44 +02:00
Marek Vasut
abaf83619c ddr: altera: Replace ad-hoc constant with macro
The bit 22 is in fact DQS tracking enable bit (dqstrken) and there
is a macro for this bit already, so use it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
2016-04-20 11:28:43 +02:00
Marek Vasut
1720fad0f1 ddr: altera: Init the rule ID in debug code
Init the rule ID, otherwise the debug code will always dump the
protection settings entry 0.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
2016-01-16 07:07:22 +01:00
Marek Vasut
35e47b7132 ddr: altera: Repair uninited variable
Fix the following problem:
drivers/ddr/altera/sequencer.c: In function 'sdram_calibration_full':
drivers/ddr/altera/sequencer.c:1943:25: warning: 'found_failing_read' may be used uninitialized in this function [-Wmaybe-uninitialized]
  if (found_passing_read && found_failing_read)
                         ^
drivers/ddr/altera/sequencer.c:1803:26: note: 'found_failing_read' was declared here
  u32 found_passing_read, found_failing_read, initial_failing_dtap;
                          ^

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-23 11:56:19 +02:00
Marek Vasut
6d7a33301a ddr: altera: Replace float multiplication with integer one
This gem is really really rare, there was an actual float used in
the Altera DDR init code, which pulled in floating point ops from
the libgcc, just wow.

Since we don't support floating point operations the same way Linux
does not support them, replace this with an integer multiplication
and division combo. This removes some 2kiB of size from the SPL as
the floating point ops are no longer pulled in from libgcc.

This was detected by enabling CONFIG_USE_PRIVATE_LIBGCC=y , which
does not contain the floating point bits.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-23 11:56:19 +02:00
Marek Vasut
139823ecb2 ddr: altera: sequencer: Clean checkpatch issues
Fix most of the dangling checkpatch issues, no functional change.
There are still 7 warnings, 1 checks , but those are left in place
for the sake of readability of the code.

Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-08-08 14:14:30 +02:00
Marek Vasut
5ded7320c8 ddr: altera: sequencer: Clean data types
Replace uintNN_t with uNN. No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-08-08 14:14:29 +02:00
Marek Vasut
96fd4362cf ddr: altera: sequencer: Pluck out misc macros from code
Actually convert the sequencer code to use socfpga_sdram_misc_config
instead of the various macros. This is just an sed exercise here, no
manual coding needed.

This patch actually removes the need to include any board-specific
files in sequencer.c , so sequencer.c namespace is now no longer
poluted by QTS-generated macros.

Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-08-08 14:14:29 +02:00
Marek Vasut
3cd0906cc2 ddr: altera: sequencer: Zap SEQ_T(INIT|RESET)_CNTR._VAL
This is another macro used to obfuscate the real code. The
T(INIT|RESET)_CNTR._VAL is always defined, so this indirection
is unnecessary. Get rid of this.

Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-08-08 14:14:29 +02:00
Marek Vasut
98cfc9058b ddr: altera: sequencer: Zap VFIFO_SIZE
Just use READ_VALID_FIFO_SIZE directly, no need for this macro obfuscation.

Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-08-08 14:14:29 +02:00
Marek Vasut
042ff2d0fa ddr: altera: sequencer: Wrap misc remaining macros
Introduce structure socfpga_sdram_misc_config to wrap the remaining
misc configuration values in board file. Again, introduce a function,
socfpga_get_sdram_misc_config(), which returns this the structure. This
is almost the final step toward wrapping the nasty QTS generated macros
in board files and reducing the pollution of the namespace.

Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-08-08 14:14:29 +02:00
Marek Vasut
160695d886 ddr: altera: sequencer: Pluck out IO_* macros from code
Actually convert the sequencer code to use socfpga_sdram_io_config
instead of the IO_* macros. This is just an sed excercise here, no
manual coding needed.

Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-08-08 14:14:29 +02:00
Marek Vasut
10c14261f3 ddr: altera: sequencer: Wrap IO_* macros
Introduce structure socfpga_sdram_io_config to wrap the IO configuration
values in board file. Introduce socfpga_get_sdram_io_config() function,
which returns this the structure. This is another step toward wrapping
the nasty QTS generated macros in board files and reducing the pollution
of the namespace.

Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-08-08 14:14:29 +02:00
Marek Vasut
1fa0c8c4e3 ddr: altera: sequencer: Pluck out RW_MGR_* macros from code
Actually convert the sequencer code to use socfpga_sdram_rw_mgr_config
instead of the RW_MGR_* macros. This is just an sed exercise here, no
manual coding needed.

Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-08-08 14:14:29 +02:00
Marek Vasut
d718a26b0c ddr: altera: sequencer: Wrap RW_MGR_* macros
Introduce structure socfpga_sdram_rw_mgr_config to wrap the RW manager
configuration values in board file. Introduce a complementary function,
socfpga_get_sdram_rwmgr_config(), which returns this the structure.
This is another step toward wrapping the nasty QTS generated macros
in board files and reducing the pollution of the namespace.

Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-08-08 14:14:29 +02:00
Marek Vasut
04955cf247 ddr: altera: sequencer: Wrap ac_rom_init and inst_rom_init
Introduce two wrapper functions, socfpga_get_seq_ac_init() and
socfpga_get_seq_inst_init() to avoid direct inclusion of the
sequencer_auto_ac_init.h and sequencer_auto_inst_init.h QTS
generated files. This reduces namespace pollution again.

Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-08-08 14:14:28 +02:00
Marek Vasut
499b7a7c88 ddr: altera: sequencer: Zap bogus redefinition of RW_MGR_MEM_NUMBER_OF_RANKS
This is defined in the QTS-generated headers, so it must not be
re-defined in sequencer.h .

Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-08-08 14:14:28 +02:00
Marek Vasut
f085ac3b14 ddr: altera: sequencer: Zap unused params and macros
These parameters are not used in the code, zap them and the
macros which are used by them as well.

Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-08-08 14:14:28 +02:00
Marek Vasut
9c76df518c ddr: altera: sequencer: Move qts-generated files to board dir
Move the files generated by QTS into the board directory, they should not
be part of the driver files at all.

Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-08-08 14:14:28 +02:00
Marek Vasut
08eb947004 ddr: altera: sdram: Make sdram_start and sdram_end into u32
Originally, both sdram_start and sdram_end were 64b values. The
sdram_start had no reason for being so, since our address space
is only 32b, so switching sdram_start to u32 is simple.

The sdram_end is a bit more complex, since it can actually be
set to (1 << 32) if someone really wanted to use an SoCFPGA with
4 GiB of DRAM and fixed the code around a little. But, the code
handling the protection rules internally decrements the sdram_end
variable anyway. Thus, instead of calling the code and passing in
the address of the SDRAM end, pass in the address already decremented
by one. This lets the sdram_end be 32b as well.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:28 +02:00
Marek Vasut
6d01595f63 ddr: altera: sdram: Minor cleanup in sdram_get_rule()
Fix the data types and zap unnecessary type change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:28 +02:00
Marek Vasut
a003740aec ddr: altera: sdram: Minor cleanup in sdram_set_rule()
Zap an obscure unneeded cast and clean other minor nits in this function.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:28 +02:00
Marek Vasut
96b869b6e3 ddr: altera: sdram: Add missing kerneldoc
Add kerneldoc to functions which are missing it, but are already
cleaned up.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:28 +02:00
Marek Vasut
269de4f0ab ddr: altera: sdram: Clean up sdram_write_verify()
Clean the function up so that it's obvious what it is doing,
fix the formating strings in debug outputs, add kerneldoc.
Make the function return proper errno-compliant return values
and propagate this change throughout sdram.c

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:28 +02:00
Marek Vasut
f97606f237 ddr: altera: sdram: Clean up sdram_calculate_size() part 2
Clean up coding style, mostly clean up comments, add kerneldoc.
Also, zap assignment of the "cs" variable, which is outright
dead code, so just remove it.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:27 +02:00
Marek Vasut
bb056d9c07 ddr: altera: sdram: Clean up sdram_calculate_size() part 1
Pluck out all of the CONFIG_HPS_SDR_CTRLCFG_* macros. This change
makes sdram.c completely clear of these macros and allows removing
of the ugly include of sdram.h . The namespace is now a much nicer
place!

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:27 +02:00
Marek Vasut
5af914189e ddr: altera: sdram: Introduce socfpga_sdram_get_config()
Introduce socfpga_sdram_get_config() function implement in a board file,
which returns the socfpga_sdram_config structure. This is the last step
in cleaning up the socfpga_mmr_init_full(), but not the last step which
allows removing the inclusion of sdram.h from drivers/ddr/altera/sdram.c
thus far.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:27 +02:00
Marek Vasut
99f453e953 ddr: altera: sdram: Clean up sdram_mmr_init_full() part 8
Fix the return value so that standard errno return values can be used.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:27 +02:00
Marek Vasut
1e8a85f8c5 ddr: altera: sdram: Clean up sdram_mmr_init_full() part 7
Add kerneldoc.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:27 +02:00
Marek Vasut
1a302a4525 ddr: altera: sdram: Clean up sdram_mmr_init_full() part 6
Pull out the block of register programming into a separate function.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:27 +02:00
Marek Vasut
9d6b012c72 ddr: altera: sdram: Clean up sdram_mmr_init_full() part 5
Rework remaining two register setting functions such that they only
return the final register value. Move the register setting into the
block of register I/O in sdram_mmr_init_full().

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:27 +02:00
Marek Vasut
076470eecd ddr: altera: sdram: Clean up sdram_mmr_init_full() part 4
Merge sdr_set_*() functions which are just setting registers among
the sea of register setting in sdram_mmr_init_full(). There is no
need to keep them separate this way, there is nothing special about
them.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:27 +02:00
Marek Vasut
764aa9a974 ddr: altera: sdram: Clean up sdram_mmr_init_full() part 3
Pluck out the remaining CONFIG_HPS_SDR_CTRLCFG_ and put it into
the socfpga_sdram_config structure.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:27 +02:00
Marek Vasut
dc3b91d9b6 ddr: altera: sdram: Clean up sdram_mmr_init_full() part 2
Suck out all the CONFIG_HPS_SDR_CTRLCFG_* from sdram_mmr_init_full()
into the socfpga_sdram_config structure. There is still one ugly
macro left behind, but this will be taken care of in subsequent patch.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:26 +02:00
Marek Vasut
be9a9fc5e6 ddr: altera: sdram: Clean up sdram_mmr_init_full() part 1
Zap all the ad-hoc readbacks from the registers and other useless
and broken debug output. This is really not useful and is only
confusing.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:26 +02:00
Marek Vasut
04ae448997 ddr: altera: sdram: Introduce socfpga_sdram_config() structure
Introduce this seemingly massive structure, which holds required values
of all the registers of the SDRAM controller. The idea here is to avoid
including the sdram.h header file, which is full of ad-hoc macros that
polute the global namespace. Once the cleanup of sdram.c would be complete
and all registers would be loaded from this new socfpga_sdram_config, a
board file will only pass this structure into the sdram.c . This will
hide all the horrors generated by QTS in the board directory.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:26 +02:00
Marek Vasut
9a48a9ac6c ddr: altera: sdram: Clean up set_sdr_mp_threshold()
Get rid of the constant clrsetbits_le32(), instead prepare the whole
content of the register once and write it at the end of the function.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:26 +02:00
Marek Vasut
ad2ba5d607 ddr: altera: sdram: Clean up set_sdr_mp_pacing()
Get rid of the constant clrsetbits_le32(), instead prepare the whole
content of the register once and write it at the end of the function.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:26 +02:00
Marek Vasut
a5ba929671 ddr: altera: sdram: Clean up set_sdr_mp_weight()
Get rid of the constant clrsetbits_le32(), instead prepare the whole
content of the register once and write it at the end of the function.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:26 +02:00
Marek Vasut
1009e396dd ddr: altera: sdram: Clean up set_sdr_fifo_cfg()
Get rid of the constant clrsetbits_le32(), instead prepare the whole
content of the register once and write it at the end of the function.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:26 +02:00
Marek Vasut
b3bdb2204e ddr: altera: sdram: Clean up set_sdr_static_cfg()
Get rid of the constant clrsetbits_le32(), instead prepare the whole
content of the register once and write it at the end of the function.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:26 +02:00
Marek Vasut
0ef8830037 ddr: altera: sdram: Clean up set_sdr_addr_rw()
Get rid of the constant clrsetbits_le32(), instead prepare the whole
content of the register once and write it at the end of the function.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:26 +02:00
Marek Vasut
60bd0df018 ddr: altera: sdram: Clean up set_sdr_dram_timing*()
Get rid of the constant clrsetbits_le32(), instead prepare the whole
content of the register once and write it at the end of the function.
Merge set_sdr_dram_timing{1,2,3,4,lowpwr}() into single function
set_sdr_dram_timing() , since there's no point in keeping all this
stuff separate anymore.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:26 +02:00
Marek Vasut
067c853fe6 ddr: altera: sdram: Clean up set_sdr_ctrlcfg()
Get rid of the constant clrsetbits_le32(), instead prepare the whole
content of the register once and write it at the end of the function.
The big plan here is to remove all the CONFIG_HPS_SDR_ macros, hide
them in QTS compatibility layer in board implementation and pass only
a small structure into the driver.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:25 +02:00
Marek Vasut
f36716971d ddr: altera: sdram: Clean up compute_errata_rows() part 2
Remove all parameters of this function, since they are only constants
passed in from another function, so make them local. Also, rename the
function to get_errata_rows() as this is closer to what it does.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:25 +02:00
Marek Vasut
791d20e13d ddr: altera: sdram: Clean up compute_errata_rows() part 1
Clean up weird parenthesis and odd type casts from the function.
Fix comment style.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:25 +02:00
Marek Vasut
58d86144d4 ddr: altera: sdram: Switch to generic_hweight32()
Use generic function instead of CPU-specific one.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:25 +02:00
Marek Vasut
3de9622e97 ddr: altera: Clean up of delay_for_n_mem_clocks() part 5
Add kerneldoc.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:24 +02:00
Marek Vasut
0c1b81bdf3 ddr: altera: Clean up of delay_for_n_mem_clocks() part 4
Simplify the loop code, optimizing compiler can deal with this.
No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:24 +02:00
Marek Vasut
6a39be6ca9 ddr: altera: Clean up of delay_for_n_mem_clocks() part 3
Clean up the computation of c_loop, outer and inner variables.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:24 +02:00
Marek Vasut
cbcaf46043 ddr: altera: Clean up of delay_for_n_mem_clocks() part 2
Factor out (afi_clocks - 1) into a single place instead of having it
all around the function.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:24 +02:00
Marek Vasut
90a584b763 ddr: altera: Clean up of delay_for_n_mem_clocks() part 1
Fix data types, clean up comments a bit and fix coding style a bit.
No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:24 +02:00
Marek Vasut
f1f22f7204 ddr: altera: Minor clean up of rw_mgr_mem_handoff()
Add kerneldoc and perform a minor comment cleanup.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:24 +02:00
Marek Vasut
c984278a66 ddr: altera: Clean up rw_mgr_mem_calibrate_lfifo()
Minor coding style cleanup, add kerneldoc. No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:23 +02:00
Marek Vasut
78cdd7d0c8 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_end()
This function is implementing the DDR calibration Stage 3 as
described in Altera EMI_RM 2015.05.04 . The main body of this
function is almost identical to Stage 1.3 (DQ/DQS centering)
for all but two flags -- use_read_test and update_fom. Convert
this function to call rw_mgr_mem_calibrate_dq_dqs_centering()
with the correct flags set to trim down the code duplication.

Moreover, reorder the remnants in the function a little and
convert the function to return either 0 or -EIO in case of
success and failure respectively, to match the common return
value convention.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:23 +02:00
Marek Vasut
8371c2ee68 ddr: altera: Clean up rw_mgr_mem_calibrate_write_test_issue()
Brief clean, add kerneldoc.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:23 +02:00
Marek Vasut
4a82854b07 ddr: altera: Clean up rw_mgr_mem_calibrate_write_test() part 3
Add kerneldoc.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:23 +02:00
Marek Vasut
b9452ea09f ddr: altera: Clean up rw_mgr_mem_calibrate_write_test() part 2
Clean up coding style, mostly broken multiline formatting strings
in debug output. Also clean up data types and constify where applicable.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:23 +02:00
Marek Vasut
ad64769ce0 ddr: altera: Clean up rw_mgr_mem_calibrate_write_test() part 1
Move code around to get rid of the forward declaration. No change
to the actual code.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:23 +02:00
Marek Vasut
a386a50eb2 ddr: altera: Clean up rw_mgr_mem_calibrate_writes_center() part 5
Add kerneldoc.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:23 +02:00
Marek Vasut
d043ee5b49 ddr: altera: Clean up rw_mgr_mem_calibrate_writes_center() part 4
Fix return values to match the common return value convention.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:23 +02:00
Marek Vasut
c654087206 ddr: altera: Clean up rw_mgr_mem_calibrate_writes_center() part 3
Zap the useless addr variable.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:23 +02:00
Marek Vasut
c8570afa04 ddr: altera: Clean up rw_mgr_mem_calibrate_writes_center() part 2
Factor out common code for searching best DM/DQS window.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:22 +02:00
Marek Vasut
3b44f55c3b ddr: altera: Clean up rw_mgr_mem_calibrate_writes_center() part 1
Fix data types and constify where applicable, fix broken multiline
debug strings and fix comments. No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:22 +02:00
Marek Vasut
ac63b9ada5 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 11
Add kerneldoc, no functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:22 +02:00
Marek Vasut
9866824794 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 10
Fix the return value of the function to match common convention
where 0 means success and negative means error. Fix the return
values in case of an error to use errno.h codes.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:22 +02:00
Marek Vasut
0113c3e1fe ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 9
The read_group and write_group arguments are the same in all
cases when this function is invoked, just merge them into one
rw_group argument. Also, clean up the function argument data
types and constify them.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:22 +02:00
Marek Vasut
0c4be198f4 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 8
The search_stop_check() always resets the bit_chk to a new value,
so bit_chk will never survive between search_left_edge() and
search_right_edge() invocation. There is thus no need to pass
it into these functions, so make bit_chk local to them.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:22 +02:00
Marek Vasut
5d6db44485 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 7
Perform minor reordering of the function to make the code more
organised, no functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:22 +02:00
Marek Vasut
ffb8b66ea8 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 6
Factor out center_dq_windows(), which is common code between
stage 2 and stage 3 of the calibration again and cater for
the minor differences.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:22 +02:00
Marek Vasut
afb3eb84b8 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 5
Factor out the get_window_mid_index() for finding the best DQ
window centering. This is again code common to two stages, so
pull it out.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:22 +02:00
Marek Vasut
f0712c3502 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 4
First of all, don't break strings in the debug_cond() calls across
multiple lines. Next, zap a couple of really odd casts in the code.
Finally, make i into a signed variable, so it is possible to avoid
constructs of the form:
    for (i = FOO;; i--) { <code>; if (i == 0) break; }.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:21 +02:00
Marek Vasut
901dc36e7a ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 3
Factor out common code from search_left_edge() and search_right_edge()
which checks whether searching for the window edge should stop. The
code is almost identical, so pull it into separate function and cater
for the minor differences.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:21 +02:00
Marek Vasut
71120773bf ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 2
Factor out common code from rw_mgr_mem_calibrate_writes_center()
and rw_mgr_mem_calibrate_vfifo_center() for searching for the
left edge of the window. The code is almost identical, so pull
it into separate function and cater for the minor differences.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:21 +02:00
Marek Vasut
c4907898a1 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 1
Factor out common code from rw_mgr_mem_calibrate_writes_center()
and rw_mgr_mem_calibrate_vfifo_center() for searching for the
right edge of the window. The code is almost identical, so pull
it into separate function and cater for the minor differences.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:21 +02:00
Marek Vasut
db3a606158 ddr: altera: Clean up rw_mgr_mem_calibrate_writes()
Reorder the content of the function a little and fix the comments
so they at least become full sentences. Constify function args.
Fix the return value to match the common convention of 0 meaning
success.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:21 +02:00
Marek Vasut
783fcf59bd ddr: altera: Clean up rw_mgr_mem_calibrate_read_test() part 5
Make the function documentation into kerneldoc.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:21 +02:00
Marek Vasut
ba522c769e ddr: altera: Clean up rw_mgr_mem_calibrate_read_test() part 4
Clean up the inner loop a bit. No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:21 +02:00
Marek Vasut
7ce23bb6ef ddr: altera: Clean up rw_mgr_mem_calibrate_read_test() part 3
The C language has signed types, so make use of them. Fix this
obscene loop, which tries to do away with unsigned type, but
just makes the code more cryptic.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:21 +02:00
Marek Vasut
3cb8bf3fc5 ddr: altera: Clean up rw_mgr_mem_calibrate_read_test() part 2
Clean up data types and constify where applicable. No function change.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:21 +02:00