Commit graph

23046 commits

Author SHA1 Message Date
Tom Rini
08f80184a9 arm: Remove snapper9260 board
This board is behind on several mandatory DM migrations and is missing
OF_CONTROL support that makes other conversions impossible. Remove it.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-12 16:10:50 -04:00
Tom Rini
7751f54f91 ppc: Remove ids8313 board
This board is behind on several mandatory DM migrations and is missing
OF_CONTROL support that makes other conversions impossible. Remove it.

Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Heiko Schocher <hs@denx.de>
2022-08-12 16:10:50 -04:00
Tom Rini
ff4e87c030 Convert CONFIG_SYS_FSL_QMAN_V3 et al to Kconfig
This converts the following to Kconfig:
   CONFIG_FSL_NGPIXIS
   CONFIG_SYS_FSL_QMAN_V3
   CONFIG_SYS_FSL_RAID_ENGINE
   CONFIG_SYS_FSL_RMU
   CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
   CONFIG_SYS_FSL_SRIO_LIODN
   CONFIG_SYS_FSL_TBCLK_DIV
   CONFIG_SYS_FSL_USB1_PHY_ENABLE
   CONFIG_SYS_FSL_USB2_PHY_ENABLE
   CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE
   CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-12 16:10:49 -04:00
Tom Rini
4143a23794 Convert CONFIG_SYS_FSL_PCIE_COMPAT to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_FSL_PCIE_COMPAT

To do this, introduce a choice and option for each of the strings used
and set CONFIG_SYS_FSL_PCIE_COMPAT based on that.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-12 16:10:49 -04:00
Tom Rini
1de46d91dd Convert CONFIG_SYS_FSL_NUM_CC_PLLS to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_FSL_NUM_CC_PLLS

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-12 16:10:49 -04:00
Tom Rini
c6eec0182a Convert CONFIG_SYS_FSL_MAX_NUM_OF_SEC to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_FSL_MAX_NUM_OF_SEC

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-12 16:10:49 -04:00
Tom Rini
8b549c0b23 Remove CONFIG_SYS_FSL_SCFG_IODSECR1_ADDR et al
This removes the following symbols:
   CONFIG_SYS_FSL_DSPI_BE
   CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT
   CONFIG_SYS_FSL_DSP_CCSR_DDR_ADDR
   CONFIG_SYS_FSL_DSP_CCSR_DDR_OFFSET
   CONFIG_SYS_FSL_DSP_DDR_ADDR
   CONFIG_SYS_FSL_DSP_M2_RAM_ADDR
   CONFIG_SYS_FSL_DSP_M3_RAM_ADDR
   CONFIG_SYS_FSL_ERRATUM_A008751
   CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
   CONFIG_SYS_FSL_ESDHC_NUM
   CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK
   CONFIG_SYS_FSL_FM1_RX0_1G_OFFSET
   CONFIG_SYS_FSL_FM1_RX1_1G_OFFSET
   CONFIG_SYS_FSL_FM1_RX2_1G_OFFSET
   CONFIG_SYS_FSL_FM1_RX3_1G_OFFSET
   CONFIG_SYS_FSL_FM1_RX4_1G_OFFSET
   CONFIG_SYS_FSL_FM1_RX5_1G_OFFSET
   CONFIG_SYS_FSL_ISBC_VER
   CONFIG_SYS_FSL_QSPI_LE
   CONFIG_SYS_FSL_SCFG_IODSECR1_ADDR
   CONFIG_SYS_FSL_SCFG_IODSECR1_OFFSET
   CONFIG_SYS_FSL_SCFG_PIXCLKCR_OFFSET
   CONFIG_SYS_FSL_SCFG_PIXCLK_ADDR
   CONFIG_SYS_FSL_SRDS_NUM_PLLS
   CONFIG_SYS_FSL_WDOG_BE
   CONFIG_SYS_GP1DIR
   CONFIG_SYS_GP1ODR
   CONFIG_SYS_GP2DIR
   CONFIG_SYS_GP2ODR
   CONFIG_SYS_HALT_BEFOR_RAM_JUMP
   CONFIG_SYS_HMI_BASE
   FSL_QSPI_FLASH_NUM
   FSL_QSPI_FLASH_SIZE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-12 16:10:49 -04:00
Tom Rini
83505a7e9f arc: Move SYS_LITTLE_ENDIAN / SYS_BIG_ENDIAN selection to Kconfig
We can determine which of these we need given CPU_BIG_ENDIAN being
enabled or not, so move that logic to Kconfig from config.mk.

Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-12 16:10:49 -04:00
Tom Rini
d0748898d8 Convert CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS
   CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS

And we remove the entries from the README for a number of already
converted items.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-12 16:10:49 -04:00
Simon Glass
0917f77393 bootstd: Add vbe bootmeth into sandbox
Update sandbox to include the VBE bootmeth. Update a few existing tests to
take account of this change, specifically that the new bootmeth now
appears when scanning.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:17:11 -04:00
Simon Glass
2662b54d70 bootstd: Allow EFI bootmgr to support an invalid bootflow
For most testing we don't want this bootmeth to actually do anything. For
the one test where we do, add a test hook to obtain the correct behaviour.
This will allow us to bind the device always, rather than just doing it
for this test.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:17:10 -04:00
Simon Glass
da62e1e861 video: Rename structs and functions to avoid VBE
Rename these to VESA, itself an abbreviation, to avoid a conflict with
Verified Boot for Embedded.

Rename this to avoid referencing VBE.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:14:23 -04:00
Simon Glass
cafe8712e8 video: Renname vbe.h to vesa.h
We want to use VBE to mean Verfiied Boot for Embedded in U-Boot. Rename
the existing VBE (Vesa BIOS extensions) to allow this.

Verified Boot for Embedded is documented doc/develop/vbe.rst

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:14:23 -04:00
Leo Yu-Chi Liang
f4512618ca riscv: ae350: Fix XIP config boot failure
The booting flow is SPL -> OpenSBI -> U-Boot.
The boot hart may change after OpenSBI and may not always be hart0,
so wrap the related branch instruction with M-MODE.

Current DTB setup for XIP is not valid.
There is no chance for CONFIG_SYS_FDT_BASE, the DTB address used
in XIP mode, to be returned. Fix this.

Fixes: 2e8d2f8843 ("riscv: Remove OF_PRIOR_STAGE from RISC-V boards")
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2022-08-11 18:46:07 +08:00
Nikita Shubin
a5041e33e4 riscv: cpu: set gp before board_init_f_init_reserve
Restore global pointer before board_init_f_init_reserve call,
as "a0" can be set in harts_early_init call and we end up with
invalid global pointer.

Signed-off-by: Nikita Shubin <n.shubin@yadro.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2022-08-11 18:42:53 +08:00
Simon Glass
4e4bf9449b common: Drop display_options.h from common header
Move this out of the common header and include it only where needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-10 13:46:55 -04:00
Tom Rini
3dd4e91632 Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- mvebu/turris_omina: Misc fixes and improvements (Pali & Marek)
- mvebu: spl: Always fallback to BootROM boot method (Pali)
- mvebu: Cleanup u-boot,dm-pre-reloc code (Pali)
- gpio: Remove mvgpio driver (Chris)
- SBx81LIFKW/SBx81LIFXCAT disable KIRKWOOD_GPIO (Chris)
- misc: atsha204a: Don't check for error when waking up the device (Pali)
2022-08-09 08:16:14 -04:00
Tom Rini
af7d151b8e - fixup error on efuse commands return
- add documentation on boot flow
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Merge tag 'u-boot-amlogic-20220809' of https://source.denx.de/u-boot/custodians/u-boot-amlogic

- fixup error on efuse commands return
- add documentation on boot flow
2022-08-09 08:14:09 -04:00
Chris Packham
d1471948f3 ARM: kirkwood: SBx81LIFKW: remove direct access of GPIO registers
Replace code that accessed the GPIO registers directly with code that
makes use of the LED_GPIO driver.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-09 08:58:27 +02:00
Pali Rohár
c8ef618ae1 arm: mvebu: armada-38x-controlcenterdc.dts: Move u-boot, dm-pre-reloc to -u-boot.dtsi
Move U-Boot specific device tree property u-boot,dm-pre-reloc into U-Boot
specific device tree include file armada-38x-controlcenterdc-u-boot.dtsi.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-09 08:58:27 +02:00
Pali Rohár
e49a55af8b arm: mvebu: armada-xp-theadorable.dts: Move u-boot, dm-pre-reloc to -u-boot.dtsi
Move U-Boot specific device tree property u-boot,dm-pre-reloc into U-Boot
specific device tree include file armada-xp-theadorable-u-boot.dtsi.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
2022-08-09 08:58:27 +02:00
Pali Rohár
5d4d1212f7 arm: mvebu: Remove redundant u-boot, dm-pre-reloc from all 32-bit Armada SoCs
Replace it by including of mvebu-u-boot.dtsi file. When board does not use
-u-boot.dtsi then mvebu-u-boot.dtsi is included automatically by makefile
scripts/Makefile.lib.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
2022-08-09 08:58:27 +02:00
Pali Rohár
8879258ec0 arm: mvebu: Introduce mvebu-u-boot.dtsi for 32-bit Armada SoCs
Set u-boot,dm-pre-reloc for /soc/, /soc/internal-regs/ and &uart0 nodes as
it is required on every 32-bit Armada SoCs. And set also u-boot,dm-pre-reloc
for &spi0 when going to boot from SPI because otherwise SPL SPI drivers do
not load.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
2022-08-09 08:58:26 +02:00
Pali Rohár
0e8b74addc arm: mvebu: dts: Build only arch-compatible dts files
64-bit Armada DTS files are not build correctly during compilation of
32-bit Armada boards and vice versa. So fix makefile build system to
compile only those dts files which are compatible for the current build
(64-bit Armada DTS files only for 64-bit builds and 32-bit Armada DTS files
only for 32-bit builds).

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-09 08:58:26 +02:00
Pali Rohár
dfebc1b908 arm: mvebu: spl: Always fallback to BootROM boot method
BootROM boot method should always work so always add it as fallback method
to spl_boot_list. In case U-Boot SPI driver fails it is better to try using
BootROM than hanging as by default only one boot method is specified.

Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-09 08:57:23 +02:00
Kunihiko Hayashi
dd8c3136aa ARM: dts: uniphier: Change phy-mode to RGMII-ID to enable delay pins
UniPhier LD20, PXs2 and PXs3 boards have ethernet phy that has RX/TX delays
of RGMII interface using pull-ups on the RXDLY and TXDLY pins.

So should set the phy-mode to "rgmii-id" to show that RX/TX delays are
enabled.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Ramon  Fried <rfried.dev@gmail.com>
2022-08-08 11:37:57 -04:00
Christophe Leroy
81844aced3 net: mpc8xx_fec: Migrate to DM_ETH
Migrate mpc8xx_fec driver to DM_ETH.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-08-08 10:50:20 -04:00
Jerome Brunet
3145e0d0ff ARM: meson: fixup error on efuse commands return
All `sm efuseread/efusewrite` commands exit with an error, even if the fuse
have actually been dealt with correctly.

This is because the smc call return the size it actually processed but this
result is checked against 0.

Return failure in do_efuse_read/write if the return value of
meson_sm_read/write_efuse() is not the requested size.

Fixes: 52195ba5f5 ("ARM: amlogic: add sm efuse write support and cmd for read/write efuse")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220804144138.33809-1-jbrunet@baylibre.com
2022-08-08 09:56:38 +02:00
Tom Rini
7da6a9e7df Convert CONFIG_SYS_FSL_CORES_PER_CLUSTER to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_FSL_CORES_PER_CLUSTER

As part of this, correct the dependencies on SYS_FSL_THREADS_PER_CORE.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-04 16:18:48 -04:00
Tom Rini
612f7a61d5 Convert CONFIG_FSL_MEMAC et al to Kconfig
This converts the following to Kconfig:
   CONFIG_FSL_MEMAC
   CONFIG_SYS_MEMAC_LITTLE_ENDIAN

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-04 16:18:48 -04:00
Tom Rini
923a855509 Convert CONFIG_SYS_FSL_CCSR_GUR_BE et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_FSL_CCSR_GUR_BE
   CONFIG_SYS_FSL_CCSR_SCFG_BE
   CONFIG_SYS_FSL_ESDHC_BE
   CONFIG_SYS_FSL_IFC_BE
   CONFIG_SYS_FSL_PEX_LUT_BE
   CONFIG_SYS_FSL_CCSR_GUR_LE
   CONFIG_SYS_FSL_CCSR_SCFG_LE
   CONFIG_SYS_FSL_ESDHC_LE
   CONFIG_SYS_FSL_IFC_LE
   CONFIG_SYS_FSL_PEX_LUT_LE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-04 16:18:48 -04:00
Tom Rini
6f6b9703d0 Convert CONFIG_FSL_CORENET to Kconfig
This converts the following to Kconfig:
   CONFIG_FSL_CORENET

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-04 16:18:47 -04:00
Tom Rini
2d752b0d4a Convert CONFIG_SYS_FMAN_V3 to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_FMAN_V3

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-04 16:18:47 -04:00
Tom Rini
6eaa0e4ac6 sh: Remove unused code in arch/sh/lib/bootm.c
There are no callers of the hexdump function that is guarded by
CONFIG_SYS_DEBUG, so remove the section.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-04 16:18:47 -04:00
Andrew Davis
b661c1bc92 arm: mach-k3: security: Remove certificate if detected on GP device
If the device is a GP and we detect a signing certificate then remove it.
It would fail to authenticate otherwise as the device is GP and has no
secure authentication services in SYSFW.

This shouldn't happen often as trying to boot signed images on GP devices
doesn't make much sense, but if we run into a signed image we should at
least try to ignore the certificate and boot the image anyway. This could
help with users of GP devices who only have HS images available.

If this does happen, print a nice big warning.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-08-04 15:32:20 -04:00
Andrew Davis
a0379c6fe3 arm: mach-k3: security: Bypass image signing at runtime for GP devices
We can skip the image authentication check at runtime if the device is GP.
This reduces the delta between GP and HS U-Boot builds. End goal is
to re-unify the two build types into one build that can run on all
device types.

Signed-off-by: Andrew Davis <afd@ti.com>
2022-08-04 15:32:20 -04:00
Andrew Davis
e1ef04fb3e arm: mach-k3: security: Allow signing bypass if type is HS-FS
On HS-FS devices signing boot images is optional. To ease use
we check if we are HS-FS and if no certificate is attached
to the image we skip the authentication step with a warning
that this will fail when the device is set to security enforcing.

Signed-off-by: Andrew Davis <afd@ti.com>
2022-08-04 15:32:20 -04:00
Andrew Davis
d1c079557f arm: mach-k3: Add support for device type detection
K3 SoCs are available in a number of device types such as
GP, HS-FS, EMU, etc. Like OMAP SoCs we can detect this at runtime
and should print this out as part of the SoC information line.
We add this as part of the common.c file as it will be used
to also modify our security state early in the device boot.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-08-04 15:32:20 -04:00
Quentin Schulz
2c9cf3b644 mx7ulp_com: fix incorrect select for SPL options
SPL_GPIO_SUPPORT is named SPL_GPIO since commit 83061dbd1c ("Rename
GPIO_SUPPORT to GPIO"), SPL_MMC_SUPPORT is named SPL_MMC since commit
103c5f1806 ("mmc: Rename MMC_SUPPORT to MMC"), SPL_SERIAL_SUPPORT is
named SPL_SERIAL since commit 2a73606668 ("serial: Rename
SERIAL_SUPPORT to SERIAL") so let's select the correct Kconfig options.

Fixes: 8b71576f38 ("mx7ulp_com: add support for SPL")
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2022-08-04 15:32:20 -04:00
Jim Liu
88513fe584 ARM: dts: npcm7xx: add npcm750 full function node
add npcm750 BMC full function node

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2022-08-04 15:32:20 -04:00
Tom Rini
85eb5ac6ef Merge tag 'fsl-qoriq-2022-7-29' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq
mpc85xx: support for generating QorIQ pre-PBL eSDHC boot sector
p1_p2_rdb_pc: Remove I-flag from second L2 SRAM mapping
p1_p2_rdb_pc: Fix parsing inverted bits from boot input data
p1_p2_rdb_pc: Simplify SPL offset macros
2022-07-31 21:08:50 -04:00
Marek Behún
b2d7619e46 arm: mvebu: turris_omnia: Fix mpp26 pin name and comment
There is a bug in Turris Omnia's schematics, whereupon the MPP[26] pin,
which is routed to CN11 pin header, is documented as SPI CS1, but
MPP[26] pin does not support this function. Instead it controls chip
select 2 if in "spi0" mode.

Fix the name of the pin node in pinctrl node and fix the comment in SPI
node.

Signed-off-by: Marek Behún <kabel@kernel.org>
2022-07-29 13:55:52 +02:00
Pali Rohár
162311637d arm: mvebu: Synchronize armada-385-turris-omnia with Linux v5.20
* Add SPDX-License-Identifier
* Add SFP and LED nodes
* Fix PHY nad NOR nodes
* Remove duplicates from u-boot.dtsi file

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-29 13:55:52 +02:00
Pali Rohár
48223161b5 arm: mvebu: Synchronize armada-385.dtsi with Linux v5.20
* Define PCIe interrupts

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-29 13:55:52 +02:00
Pali Rohár
30bbb02a5c arm: mvebu: Synchronize armada-38x.dtsi with Linux v5.20
* Replace skeleton.dtsi by explicit #address-cells / #size-cells
* Add sdramc@1400 and phy@18300 nodes
* Remove (unused) timeout-ms i2c properties
* Fix compatible string for UARTs
* Add interrupts properties for watchdog

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-29 13:55:52 +02:00
Pali Rohár
204b8707cd arm: mvebu: Fix compatible string for nand controller
Linux kernel uses compatible string "marvell,armada370-nand-controller" for
nand controllers on Armada 370/XP/38x. U-Boot currently uses mix of
"marvell,armada370-nand" and "marvell,mvebu-pxa3xx-nand".

So unify it and use just Linux kernel compatible string.

Signed-off-by: Pali Rohár <pali@kernel.org>
Acked-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-29 13:55:35 +02:00
Pali Rohár
786d9f1a82 powerpc: mpc85xx: Add support for generating QorIQ pre-PBL eSDHC boot sector
QorIQ U-Boot binary for SD card booting compiled during build process
(either u-boot.bin or u-boot-with-spl.bin) cannot be directly loaded by
QorIQ pre-PBL BootROM. Compiled U-Boot binary first needs to be processed
by Freescale boot_format tool as described in doc/README.mpc85xx-sd-spi-boot

BootROM requires that image on SD card must contain special boot sector.
Implement support for generating this special boot sector directly in
U-Boot start code. Boot sector needs to be at the beginning of the image,
so when compiling only proper U-Boot without SPL then it needs to be in
proper U-Boot. When compiling SPL with proper U-Boot then it needs to be
only in SPL.

Support can be enabled by a new config option FSL_PREPBL_ESDHC_BOOT_SECTOR.
Via other two additional options FSL_PREPBL_ESDHC_BOOT_SECTOR_START and
FSL_PREPBL_ESDHC_BOOT_SECTOR_DATA it is possible to tune how final U-Boot
image could be stored on the SD card.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-07-29 19:49:13 +08:00
Pali Rohár
8327389748 arm: mvebu: turris_omnia: Add mcu node with gpio-controller
This allows U-Boot to register new Turris Omnia MCU driver.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-29 10:02:43 +02:00
Pali Rohár
319b62880c arm: mvebu: Add gpio-ranges into Armada 38x device tree file
This allows U-Boot mvebu-gpio.c driver to switch particular MPP pin into
GPIO mode and enable GPIO support.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-07-28 08:41:45 +02:00
Andre Przywara
81e712a917 ARM: relocate: Fix Thumb code by using proper label type
The generic ARM relocate_code function was using its own function entry
point as a relocation base, and it was obtaining that address by using
the "adr" instruction on that entry point label.
However that label is not just an ordinary label, instead we explicitly
mark it as a function start address. Normally that doesn't change much
(other than for debugging), but when assembled in Thumb mode, newer
versions of the GNU assembler prepare everything for this address being
used as the argument to a "bx" call, so make sure bit 0 is set in there
to mark this function as Thumb code. Of course this doesn't end up very
well when we use this address for the ensuing memcpy operation.

To avoid this problem, and to solve it in a robust way, add an extra
label, which is not marked as a function entry, and use that for the adr
instruction. This lets all assemblers generate the right immediate offset
in the "adr" instruction.

This fixes in particular ARMv7-M ports when using GNU binutils v2.37 or
newer (commit d3e52e120b68 seems to trigger the change in behaviour).

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reported-by: Jesse Taube <mr.bossman075@gmail.com>
2022-07-26 17:53:43 -04:00