Errors were handled only if an I2C transfer timed out
and received a NACK which is very unlikely. This commit
changes the condition such that errors are handled if
an I2C transfer times out or received a NACK.
Signed-off-by: Francois Berder <fberder@outlook.fr>
Reviewed-by: Heiko Schocher <hs@denx.de>
The NETSEC GMAC occasionally falls into a weird state where
MAC_REG_DESC_SOFT_RST has never been cleared and shows errors like the
below when networking commands are issued:
=> ping 192.168.1.1
ethernet@522d0000 Waiting for PHY auto negotiation to complete... done
netsec_wait_while_busy: timeout
Using ethernet@522d0000 device
ARP Retry count exceeded; starting again
ping failed; host 192.168.1.1 is not alive
It happens on not only 'ping' but also 'dhcp', 'tftp' and so on.
Luckily, restarting the NETSEC GMAC and trying again seems to fix the
problematic state. So first ensure that we haven't entered the state by
checking MAC_REG_DESC_SOFT_RST to be cleared; otherwise, restarting
NETSEC/PHY and trying again would work as a workaround.
Signed-off-by: Ryosuke Saito <ryosuke.saito@linaro.org>
Tested-by: Masahisa Kojima <masahisa.kojima@linaro.org>
commit 280f45d239 ("configs: get rid of build warnings due to
SPL_USB_DWC3_GENERIC") missed enabling DWC3 glue layer for
usbmsc_defconfig and this broke boot from USB mass storage.
Fix this by enabling DWC3 glue layer.
Fixes: 280f45d239 ("configs: get rid of build warnings due to SPL_USB_DWC3_GENERIC")
Signed-off-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
Make sure to stay within bounds, as a misbehaving HTTP server
can trigger a buffer overflow if not properly handled.
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Richard Weinberger <richard@nod.at>
- Fix a bug of missing setting size of initrd in pxeboot
- Allow Python packages to be dropped
- Reland "x86: Move FACP table into separate functions"
- Fixes for chromebook_link64 and chromebook_samus_tpl
- Fixes and improvements for coreboot
- x86 documentation updates
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEUEWE0gAMrH0ckwrwqSElQ6ZwxhQFAmUNq6sACgkQqSElQ6Zw
xhRG5RAAiWIJOcZLQNRM/+B2DiFxYBD284vO9azN2tWYmBntKLNp3xB7EkACovQ+
1L5qTTSBIlg2bN6GezwZvcKVSnjcwuZ2tM/cqbWvRJfRUJdFygpW2Ufi2lP/8XCO
UgMBTGjXBwT2mhwG6FE9Ecyau7//8xpChCL1Yhli5Xk5YDASt7GFuB2uhsDtyL8p
HgCkPQj3YkbEkOpNeO3QOVS47wFNH85uAkIIqnkp3DKMcjNgQhY64LmFJrSLXxWg
TbKt3Cc3NJ1GRdDJnNE5KB4JQNL+6TrxzXFzIzU/Z7fBu3qB3gMoikNt7d8+61e9
+lXHjaeZ5qopL0xinKqCDZcK+1Sn3yEo0Ri1W1LWY3ReJkh/6axQn2Pj0HawRENk
ccY1lQ4TqO6R1OI3/FqdTB8+HDZ9kRM+xTxpnlXoVgK3ahgEIJvH/v/tWqDb/ld5
hheADW10b5+D8vy82XOzgg78CDG937UxGhEDxAJep6v5kKl2zijL7bMFDlbauS7y
FcndGRqY95uzEMrfiAD6nj9YkdG70ourOhakuV24ed6sgCA+xhs04pk9MWFa8lY8
sY7ZJnCZE0FXebA40j/ubV5n7WZ5CRBNw08j+/m5f77tb1/4/8SSZZ7L3RT4H3xx
/BF6rVbP/zGrv4WXZ8vw3Y78R/JD5JicuATe4vvv20hgvuFmLE8=
=+q36
-----END PGP SIGNATURE-----
Merge tag 'x86-pull-20230922' of https://source.denx.de/u-boot/custodians/u-boot-x86 into next
- Add bootstd support to 64-bit efi payload
- Fix a bug of missing setting size of initrd in pxeboot
- Allow Python packages to be dropped
- Reland "x86: Move FACP table into separate functions"
- Fixes for chromebook_link64 and chromebook_samus_tpl
- Fixes and improvements for coreboot
- x86 documentation updates
Add a little more detail as to why coreboot64 is preferred for booting
Linux distros.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Move this out of the main file since for simple users it is easier to
rely on standard boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Refresh the summary information so it is more up-to-date. Add links to
the coreboot and slimbootloader docs.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
There is enough material that it makes sense to split this up into
several files. Create an x86/ directory for this purpose.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Make a note of where coreboot installed the SMBIOS tables so that we can
pass this on to EFI.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
U-Boot should set up the SMBIOS tables during startup, as it does on x86.
Ensure that it does this correctly on non-x86 machines too, by creating
an event spy for last-stage init.
Tidy up the installation-condition code while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Remember where these end up so that we can pass this information on to
the EFI layer.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
When 'usb stop' is run, doing 'bootflow scan' does not run the USB hunter
again so does not see any devices. Fix this by telling bootstd about the
state of USB.
Signed-off-by: Simon Glass <sjg@chromium.org>
When booted from coreboot, U-Boot does not build the SMBIOS tables, but
it should still pass them on to the OS. Add a new option which indicates
whether SMBIOS tables are present, however they were built.
Flip the ordering so that the dependency is listed first, which is less
confusing.
Adjust GENERATE_SMBIOS_TABLE to depend on this new symbol.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
It is not always the case that U-Boot builds the ACPI tables itself. For
example, when booting from coreboot, the ACPI tables are built by
coreboot.
Correct the Makefile condition so that U-Boot can pass on tables built
by a previous firmware stage.
Tidy up the installation-condition code while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At least on modern machines the write-back mechanism for the frame buffer
is quite slow when scrolling, since it must read the entire frame buffer
and write it back.
Enable the VIDEO_COPY feature to resolve this problem.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
These two builds are similar but have some different options for not good
reason. Line them up to be as similar as possible.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This is very annoying as it is quite slow on many machines. Also, U-Boot
has an existing 'preboot' mechanism to enable this feature if desired.
Drop this code so that it is possible to choose whether to init USB or
not.
Use the existing USE_PREBOOT mechanism instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The debug UART on modern machines uses a 32-bit wide transfer. Without
this, setting debug output causes a hang or no output. It is not obvious
(when enabling CONFIG_DEBUG_UART) that this is needed.
Enable 32-bit access to avoid this trap.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
If coreboot does not set up sysinfo for the UART, SPL currently hangs.
Use the DBG2 technique there as well. This allows coreboot64 to boot from
coreboot even if the console info is missing from sysinfo
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This is needed so we can find the DBG2 table provided by coreboot. Add a
Kconfig so it can be enabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
We don't read this information in 64-bit mode, since we don't have the
macros for doing it. Set it to Intel by default. This allows the TSC timer
to work correctly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Init errors in SPL are currently ignored by this function.
Change the code to init the CPU, reporting an error if something is wrong.
After that, look for the coreboot table.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Enable bootstd options and provide instructions on how to boot a linux
distro using coreboot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add these options to permit access to more disk types.
Add some documentation as well.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This driver is not actually built since a Kconfig was never created for
it.
Add a Kconfig (which is already implied by COREBOOT) and update the
implementation to avoid using unnecessary memory. Drop the #ifdef at the
top since we can rely on Kconfig to get that right.
To enable it (in addition to serial and video), use:
setenv stdout serial,vidconsole,cbmem
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[Modified the comment about overflow a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Coreboot changed a few years ago to include an overflow flag. Update the
structure to match this.
This comes from coreboot commit:
6f5ead14b4 ("mb/google/nissa/var/joxer: Update eMMC DLL settings")
Note: There are several implementations of this in coreboot. I have chosen
to follow the one in src/lib/cbmem_console.c
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
When turning off CAR, set the flag to make sure that nothing tries to use
driver model in SPL before jumping to U-Bot proper, since its tables are
in CAR.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The current condition does not handle the samus_tpl case where it sets
up the RAM in SPL but needs to commit the MTRRs in U-Boot proper.
Add another case to handle this and update the comment.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
When TPL has already set up the CPU, don't do it again. This existing
code actually has this backwards, so fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Make this depend on whether the address matches the offset, rather than
a particular board build. For samus_tpl we don't need to copy, for
example.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Make sure that CONFIG_X86_OFFSET_U_BOOT is the same as CONFIG_TEXT_BASE
as it is changing CONFIG_X86_OFFSET_U_BOOT
Samus boots into U-Boot proper in flash, not RAM. Also expand the SPL
malloc() size a little, to avoid an error.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Samus only takes 7 seconds but it is long enough to think it has hung. Add
a message about what it is doing, similar to the approach on coral.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
On x86 devices we use CAR (Cache-As-RAM) to hold the malloc() region in
SPL, since SDRAM is not set up yet. This means that driver model stores
its tables in this region.
When preparing to jump from SPL to U-Boot proper, we must disable CAR, so
that the CPU can uses the caches normally. This means that driver model
tables become inaccessible. From there until we jump to U-Boot proper, we
must avoid using driver model.
This is only a problem on boards which operate this way, for example
chromebook_link64
Add a flag to indicate that driver model is dead and should not be used.
It can be used in SPL to avoid hanging the machine.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add a note about using -cdrom with QEMU.
Suggested-by: Bin Meng <bmeng@tinylab.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
Recent approach with FADT writer shows that there is
a room for subtle errors. Prevent this from happening
again by introducing acpi_add_fadt() helper.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Each board has its own way of creating this table. Rather than calling the
acpi_create_fadt() function for each one from a common acpi_write_fadt()
function, just move the writer into the board-specific code.
Co-developed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Declare the global_data pointer at the top of the file, to avoid an
error:
arch/x86/include/asm/global_data.h:143:35: error: a label can
only be part of a statement and a declaration is not a statement
board/coreboot/coreboot/coreboot.c:60:2: note: in expansion of macro
‘DECLARE_GLOBAL_DATA_PTR’
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Mike Frysinger <vapier@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
When building in a portage chroot, we do not have the environment needed
to build pylibfdt. It is instead build as a separate package.
Provide a build option to tell U-Boot to skip this part of the build. We
still need it to use binman, etc. but don't need it to build its
dependencies.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Mike Frysinger <vapier@chromium.org>
[s/build bytes/builds bytes in tools.rst]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
The problem was, that zboot() didn't work because of missing
ramdisc size.
Signed-off-by: Thomas Mittelstaedt <thomas.mittelstaedt@de.bosch.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Enable bootstd support for U-Boot at VirtualBox described at
https://source.denx.de/u-boot/u-boot/-/blob/master/doc/develop/bootstd.rst
This is used to boot system images at Virtualbox via
- distroboot (extlinux.conf)
- boot script
Signed-off-by: Thomas Mittelstaedt <thomas.mittelstaedt@bosch.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[Added 'efi-payload64' tag]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
U-Boot at VirtualBox must load Linux and boot configuration from disk devices.
Here the discs at AHCI (scsi) bus are used to load the needed boot data.
Signed-off-by: Thomas Mittelstaedt <thomas.mittelstaedt@de.bosch.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[Added 'efi-payload64' tag and rebased on top of u-boot/master]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This avoids an error when ifdef CONFIG_PCI is changed to
if CONFIG_IS_ENABLED(PCI)
Signed-off-by: Troy Kisky <troykiskyboundary@gmail.com>
[Rebased on top of u-boot/master]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
clk:
- Dont return error when assigned-clocks is empty or missing
dm:
- Support reading a single indexed u64 value
- Add support for reading bootscript address/flash address from DT
cmd:
- Fix flash_is_unlocked API
fpga:
- Define fpga_load() for debug build
global:
- U-Boot project name cleanup (next2)
net:
- zynq_gem: Use generic_phy_valid() helper
- axienet: Convert to ofnode functions
- gmii2rgmii: Read bridge address from DT
pytest:
- skip tpm2_startup when env__tpm_device_test_skip=True
spi-nor:
- Add mx25u25635f support
- zynqmp_qspi: Tune cache behavior
trace:
- Fix flyrecord alignment issue
xilinx:
- Move scriptaddr to DT as bootscr-address
- Pick script_offset_f/script_size_f from DT as bootscr-flash-offset/size
- Do not generate distro boot variables if disabled
versal:
- Extend memory ranges to cover HBM
- Enable TPM, sha1sum and KASLRSEED
- Fix distroboot prioritization in connection to available devices
- Clean mini targets bootcommand
- Fix clock driver
versal-net:
- Enable TPM, sha1sum and KASLRSEED
- Fix distroboot prioritization in connection to available devices
zynqmp;
- Allow AES to run from SPL
- Enable CMD_KASLRSEED
- Add proper dependencies for USB and remove ZYNQMP_USB
- Fix user si570 default frequency for zcu* boards
- Cover SOM rev2 revision
- Various DT changes
- Add firmware and pinctrl support for tristate configuration
(high impedance/output enable)
- Add output-enable pins to SOMs
- Fix distroboot prioritization in connection to available devices
- Read bootscript address/flash address from DT
- Fix pcap_prog address
-----BEGIN PGP SIGNATURE-----
iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCZQwqWAAKCRDKSWXLKUoM
IQYIAJ9WQrnZoCfi7MuxzYA2t34Dbx4gkwCgk1o6bX+R89jvjBOhgZOlXTQCbb0=
=/rxs
-----END PGP SIGNATURE-----
Merge tag 'xilinx-for-v2024.01-rc1-v2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next
Xilinx changes for v2024.01-rc1
clk:
- Dont return error when assigned-clocks is empty or missing
dm:
- Support reading a single indexed u64 value
- Add support for reading bootscript address/flash address from DT
cmd:
- Fix flash_is_unlocked API
fpga:
- Define fpga_load() for debug build
global:
- U-Boot project name cleanup (next2)
net:
- zynq_gem: Use generic_phy_valid() helper
- axienet: Convert to ofnode functions
- gmii2rgmii: Read bridge address from DT
pytest:
- skip tpm2_startup when env__tpm_device_test_skip=True
spi-nor:
- Add mx25u25635f support
- zynqmp_qspi: Tune cache behavior
trace:
- Fix flyrecord alignment issue
xilinx:
- Move scriptaddr to DT as bootscr-address
- Pick script_offset_f/script_size_f from DT as bootscr-flash-offset/size
- Do not generate distro boot variables if disabled
versal:
- Extend memory ranges to cover HBM
- Enable TPM, sha1sum and KASLRSEED
- Fix distroboot prioritization in connection to available devices
- Clean mini targets bootcommand
- Fix clock driver
versal-net:
- Enable TPM, sha1sum and KASLRSEED
- Fix distroboot prioritization in connection to available devices
zynqmp;
- Allow AES to run from SPL
- Enable CMD_KASLRSEED
- Add proper dependencies for USB and remove ZYNQMP_USB
- Fix user si570 default frequency for zcu* boards
- Cover SOM rev2 revision
- Various DT changes
- Add firmware and pinctrl support for tristate configuration
(high impedance/output enable)
- Add output-enable pins to SOMs
- Fix distroboot prioritization in connection to available devices
- Read bootscript address/flash address from DT
- Fix pcap_prog address
Cache related issues are seen with small sized data reads.
Due to this, proper data is not read. Also some times sf probe
fails randomly. To workaround this issue, invalidate dcache after read DMA
is triggered.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20230915031759.28889-3-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Before DMA read, ideally cache should be invalidated, so that data from
memory will be updated to cache after DMA is completed. But
flush_dcache_range is being used which is incorrect. Change
flush_dcache_range to invalidate_dcache_range.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20230915031759.28889-2-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
