Commit graph

87722 commits

Author SHA1 Message Date
Manorit Chawdhry
b8ebf24e7f arm: mach-k3: common: don't reconfigure background firewalls
K3 devices have some firewalls set up by ROM that we usually remove so
that the development is easy in HS devices.

While removing the firewalls disabling a background region before
disabling the foreground regions keeps the firewall in a state where all
the transactions will be blacklisted until all the regions are disabled.
This causes a race for some other entity trying to access that memory
region before all the firewalls are disabled and causes an exception.

Since the background regions configured by ROM are in such a manner
that they allow all transactions, don't touch the background regions at
all.

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Reviewed-by: Kamlesh Gurudasani <kamlesh@ti.com>
2023-05-02 14:24:36 -04:00
Vignesh Raghavendra
fdb051ba3f arm: mach-k3: common: Default to non fitImage boot on HS-FS
Allow non fitImage bootflow on Field Securable (HS-FS) devices in
addition to GP, force fitImage boot only on Security enforced (HS-SE)
devices where signed images are necessary to maintain chain of trust.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Kamlesh Gurudasani <kamlesh@ti.com>
2023-05-02 14:23:59 -04:00
Vladimir Zapolskiy
0e889a7c1b arm: dts: msm: add GENI SE QUP device tree node
On modern Qualcomm platforms including SDM845 a GENI SE QUP IP
description is supposed to be found in board device tree nodes,
the version of the IP is used by the GENI UART driver to properly
set an oversampling divider value, which impacts UART baudrate.

The change touches dragonboard845c and starqltechn board device
tree source files, a device tree node label to "debug" UART is
renamed to 'uart9' according to the naming found in Linux.

Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
2023-05-02 14:23:59 -04:00
Vladimir Zapolskiy
10ea2a7a93 serial: msm-geni: correct oversampling value based on QUP hardware revision
Starting from QUP v2.5 the value of oversampling is changed from 32
to 16, keeping the old value on newer platforms results on wrong set
UART IP clock divider, thus the asked baudrate does not correspond to
the actually set with all the consequencies for a user.

The change links the driver to a new Qualcomm GENI SE QUP driver
to get its hardware version and update the oversampling value.

Deliberately the code under CONFIG_DEBUG_UART_MSM_GENI is not touched,
since a wanted baudrate can be controlled by setting a modified
CONFIG_DEBUG_UART_CLOCK build time variable.

Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
2023-05-02 14:23:59 -04:00
Konrad Dybcio
aa539d89e1 serial: msm-geni: Use upstream Linux bindings
The name "se" is used in upstream Linux device trees and has been for
ages, long before this U-Boot-ism was introduced. Same goes for the
existing compatible. Get rid of that.

[vzapolskiy: removed a ready change in the driver]
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
2023-05-02 14:23:58 -04:00
Vladimir Zapolskiy
babdadc8a5 serial: msm-geni: fix a compile time warning from msm_serial_setbrg()
A compiler warns about a missing function prototype, which is valid
and fixed by converting the function into static one, also fix
interleaved local variable declarations and assignments.

Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Fixes: 324df15a29 ("serial: qcom: add support for GENI serial driver")
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
2023-05-02 14:23:58 -04:00
Vladimir Zapolskiy
b955970b23 serial: msm-geni: fix code indentation
This a cosmetic change, which corrects code indentation in a few places.

Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
2023-05-02 14:23:58 -04:00
Vladimir Zapolskiy
9dd480c30d serial: msm-geni: remove invalid se-clk clock name
There is only one clock supplier to the serial IP, thus getting it by
name is not needed, also note that "clock-names" property is not listed
under doc/device-tree-bindings/serial/msm-geni-serial.txt, and finally
"se-clk" clock name is invalid, if added, it shall get "se" value like
it's already described in Linux device tree documentation.

Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
2023-05-02 14:23:58 -04:00
Konrad Dybcio
f877932123 serial: msm-geni: Always bind before relocation
In preparation for supporting upstream Linux device trees on Qualcomm
platforms, make this the default behavior.

[vzapolskiy: extracted the driver change from a combination with dts changes]
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
2023-05-02 14:23:58 -04:00
Vladimir Zapolskiy
acf4062448 serial: msm-geni: remove redundant includes
For whatever reason, likely a driver stub was copied from another
driver, the driver contains a bunch of unnecessary and confusing
includes like watchdog.h etc., the change reduces the list.

Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
2023-05-02 14:23:58 -04:00
Vladimir Zapolskiy
1b15483deb misc: add Qualcomm GENI SE QUP device driver
This change adds a Qualcomm GENI SE QUP device driver as a wrapper for
actually enabled and used serial devices found on a board.

At the moment the driver is pretty simple, its intention is to populate
childred devices and provide I/O mem read interface to them as clients,
this is needed for GENI UART driver to set up a proper clock divider
and provide the actually asked baud rate.

Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
2023-05-02 14:23:58 -04:00
Linus Walleij
6f63c296fe board: Add new Broadcom Northstar board
This adds a simple Northstar "BRCMNS" board to be used with
the BCM4708x and BCM5301x chips.

The main intention is to use this with the D-Link DIR-890L
and DIR-885L routers for loading the kernel into RAM from
NAND memory using the BCH-1 ECC and using the separately
submitted SEAMA load command, so we are currently not adding
support for things such as networking.

The DTS file is a multiplatform NorthStar board, designed to
be usable with several NorthStar designs by avoiding any
particulars not related to the operation of U-Boot.

If other board need other ECC for example, they need to
create a separate DTS file and augment the code, but I don't
know if any other users will turn up.

Cc: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-05-02 14:23:58 -04:00
Linus Walleij
d3d9cd8ee1 arm: Add support for the Broadcom Northstar SoCs
The original Northstar is an ARM SoC series that comprise
BCM4709x and BCM5301x and uses a dual-core Cortex A9, the
global timer and a few other things.

This series should not be confused with North Star Plus
(NSP) which is partly supported by U-Boot already.

The SoC is well supported by the Linux kernel and OpenWrt
as it is used in many routers.

Since we currently don't need any chip-specific quirks
and can get the system up from just the device tree, a
mach-* directory doesn't even need to be added, just
some small Kconfig fragments.

Cc: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-05-02 14:23:58 -04:00
Linus Walleij
8a5122bfd3 arm: dts: Import device tree for Broadcom Northstar
This brings in the main SoC device tree used by the
Broadcom Northstar chipset, i.e. BCM4709x and BCM5301x.
This is taken from the v6.3 Linux kernel.

Cc: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-05-02 14:23:58 -04:00
Svyatoslav Ryhel
488d3dae24 extcon: add MAX14526 MUIC support
MAX14526 is a powerful extcon chip which allows detection of various
plugs like usb, mhl, uart, headset etc. This version of driver
implements support of AP-usb and CP-usb/uart paths.

Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # LG P880 T30
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-05-02 14:23:58 -04:00
Svyatoslav Ryhel
8b215e10fe test: Add tests for the extcon
Provide tests to the simple extcon device.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-05-02 14:23:58 -04:00
Svyatoslav Ryhel
5f650fa6ad dm: extcon: add an uclass for extcon
Add a new simple uclass for extcon. Currently all setup is done
in the probe. Uclass struct and ops are empty for now.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-05-02 14:23:34 -04:00
Tom Rini
021e303492 adjust maintainers
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Merge tag 'tpm-master-02052023' of https://source.denx.de/u-boot/custodians/u-boot-tpm

adjust maintainers
2023-05-02 12:52:40 -04:00
Tom Rini
30f6305e0c Merge branch '2023-05-01-assorted-powerpc-updates'
- A number of PCI fixes, and one Kconfig cleanup for PowerPC platforms
2023-05-02 12:50:42 -04:00
Pali Rohár
44efad2ff1 pci: auto: Remove PCI_CLASS_PROCESSOR_POWERPC autoconfig case
PCI autoconfig case for PCI_CLASS_PROCESSOR_POWERPC just prints debug
message and then calls autoconfig setup code like for any other standard
endpoint device. We do not need special debug message for it, so remove
this case and handle PCI_CLASS_PROCESSOR_POWERPC via default code path.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
2023-05-02 08:55:15 -04:00
Heinrich Schuchardt
a390050b41 MAINTAINERS: assign include/tpm*, cmd/tpm*
The files include/tpm* are an integral part of the TPM drivers.
The tpm* commands are used to access TPM devices.

Both should be managed by the TPM DRIVERS maintainer.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2023-05-02 14:09:19 +03:00
Heinrich Schuchardt
7e218c19c7 cmd: missing break in test_write_limit()
In test_write_limit() an unintended fall-through occurs.

Suggested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2023-05-02 14:09:19 +03:00
Tim Harvey
bb6ea0fe92 usb: ehci-mx6: move phy setup before register access
For the CONFIG_PHY case, move the PHY setup before the register access.

This avoids a hang when updating the imx8mm.dtsi which moves the
USB OTG power-domains to the PHY.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Tested-by: Fabio Estevam <festevam@denx.de>
2023-05-02 10:57:32 +02:00
Fabio Estevam
6171278765 smegw01: Convert CFG_EXTRA_ENV_SETTINGS to an env file
Currently, it is recommended to move from CFG_EXTRA_ENV_SETTINGS to
an env file, so do the conversion.

Suggested-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-05-02 10:57:32 +02:00
Eduard Strehlau
fd20052662 smegw01: Fix fallback to altbootcmd
The bootcmd/altbootcmd mechanism is not invoked for bootmenus.
Manually compare bootcount and bootlimit to implement fallback on all
codepaths.

Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-05-02 10:57:32 +02:00
Eduard Strehlau
e13698bb66 smegw01: Disable additional boot menu options
Defaults have changed, we do not want the bootmenu to contain EFI
options.

Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-05-02 10:57:32 +02:00
Fabio Estevam
ea99d227f9 smegw01: Read the second MAC address
Currently, only the first MAC address is read from the fuses.

The second MAC address is not read and Linux assigns a random one.

To prevent this behavior, read the second MAC address from the fuses
and store it into the eth1addr environment variable so that it
can be passed to Linux.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-05-02 10:57:32 +02:00
Eduard Strehlau
a1bc4f1937 smegw01: Add lockdown U-Boot env support
Add lockdown U-Boot env support so that only certain U-Boot environment
variables are allowed to be modified.

Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-05-02 10:57:32 +02:00
Eduard Strehlau
f3ce9db85a smegw01: Switch to fitImage
Instead of loading the zImage kernel and the devicetree separately, switch
to the fitImage format, which is more convenient when working with secure
boot, for example.

Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-05-02 10:57:32 +02:00
Eduard Strehlau
b1bbdf1541 smegw01: Change default boot device to eMMC
Let eMMC be the default boot medium.

Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-05-02 10:57:32 +02:00
Eduard Strehlau
31c6c79a01 smegw01: Enable EMMC boot from multiple partitions
GPT Partition labels are used for determining the right
root filesystem to boot from.

The U-Boot environment is configured to reside in the eMMC hardware
boot partition we are currently booted from.

This should enable a dual copy approach for upgrading the bootloader.
One can overwrite the inactive hardware partition with new bootloader
and environment and afterwards switch the eMMC boot partition for an
atomic bootloader switch.

Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-05-02 10:57:32 +02:00
Eduard Strehlau
52726d24d6 smegw01: Only commit to new partition if update was successful
When performing rootfs update via swupdate, it is convenient to check the
'ustate' variable to decide whether the update succeeded or not.

Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-05-02 10:57:32 +02:00
Eduard Strehlau
440dc0694b smegw01: Run altbootcmd in the case of failure
Run the altbootcmd script if any step of bootcmd fails.

This ensures that always a valid image can be run.

Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-05-02 10:57:32 +02:00
Eduard Strehlau
ac52bb99cc smegw01: Add altbootcmd
Add an altbootcmd script, which is convenient way to integrate with
swupdate and perform a roll back of the previous working version in the
case of update failure.

Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-05-02 10:57:32 +02:00
Eduard Strehlau
3bb2b48ed2 smegw01: Select bootcount support
Add automatic boot counter that increases after every
reset. After a power-on reset, it will be initialized with 1,
and each reboot will increment the value by 1. By default it is
disabled if bootlimit isn't set.

Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-05-02 10:57:32 +02:00
Eduard Strehlau
21e81011a2 smegw01: Select CONFIG_CMD_SQUASHFS
Select CONFIG_CMD_SQUASHFS so that the SquashFS U-Boot commands
are available.

Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-05-02 10:57:32 +02:00
Eduard Strehlau
7f932c6b84 smegw01: Enable setting additional boot params
Introduce EXTRA_BOOTPARAMS to allow passing additional parameters
to kernel command line. This is useful for debugging purposes.

Signed-off-by: Eduard Strehlau <eduard@lionizers.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-05-02 10:57:32 +02:00
Hugo Villeneuve
feb710b381 arm: imx8m: remove unused and obsolete board_fix_fdt() in SOC context
It doesn't seem appropriate for arch/SOC to use a board-level
functionality (CONFIG_OF_BOARD_FIXUP), because this prevents boards
that need to do FDT fixup from using that feature.

Also, this code is completely dead and useless (from comments by
Rasmus Villemoes on the mailing list):

  - No in-tree imx8m-based board seems to set CONFIG_OF_BOARD_FIXUP
  - The nodes which that function wants to disable don't even exist in
    the U-Boot copy of imx8mp.dtsi.

This code was introduced in commit 35bb60787b. It seems to be some
random import of code from downstream NXP U-Boot, with a commit
message that makes no sense in upstream context.

Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-05-02 10:57:32 +02:00
Tim Harvey
a48a824dba imx: fix get_boot_device() for imx8
commit 787f04bb6a ("imx: add USB2_BOOT type") broke get_boot_device()
for IMX8 which affects booting from SDP due to boot_instance being
non-zero.

Fix this by only using boot_instance for imx8ulp and imx9.

Fixes: 787f04bb6a ("imx: add USB2_BOOT type")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-05-02 10:57:32 +02:00
Dario Binacchi
1490292a07 imx6: clock: print real pixel clock rate
Add debug messages to print the real pixel clock rate, which may not be
the requested one.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2023-05-02 10:57:32 +02:00
Dario Binacchi
82863a99c0 imx6: clock: add support to get LCD pixel clock rate
Add the get_lcd_clk() function to get the LCD pixel clock rate.

The patch has been tested on imx6ul platform.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2023-05-02 10:57:32 +02:00
Dario Binacchi
41d7a7da80 imx6: clock: improve calculations to get the PLL video rate
During some tests to check the pixel clock rate in the transition from
U-Boot to the Linux kernel, I noticed that with the same configuration
of the registers the debug messages reported different rates.

The same Linux kernel calculations are now used to get the PLL video
rate.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
2023-05-02 10:57:32 +02:00
Oliver Graute
3bc6257e80 imx: support i.MX8QM DMSSE20 a1 board
Add i.MX8QM DMSSE20 a1 board support

U-Boot 2023.04-00030-g7be2f547b2 (Apr 21 2023 - 11:11:43 +0200)

Model: Advantech iMX8QM DMSSE20
Board: DMS-SE20A1 8GB
Build: SCFW 549b1e18, SECO-FW c9de51c0, ATF 5782363
Boot:  USB
DRAM:  8 GiB
Core:  100 devices, 19 uclasses, devicetree: separate
MMC:   FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... OK
In:    serial@5a060000
Out:   serial@5a060000
Err:   serial@5a060000
Net:   eth0: ethernet@5b040000
Warning: ethernet@5b050000 (eth1) using random MAC address - 32:05:0c:f9:5e:10
, eth1: ethernet@5b050000
Hit any key to stop autoboot:  0

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
2023-05-02 10:57:32 +02:00
Heinrich Schuchardt
76ce66408d imx8mn: buffer overflow in low_drive_gpu_freq()
Avoid a buffer overflow if assigned-clock-rates has less than two elements.

Fixes: 98bcdf1635 ("imx8mn: Add low drive mode support for DDR4/LPDDR4 EVK")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-05-02 10:57:32 +02:00
Fabio Estevam
b016fcf723 pico-imx6ul: Convert to CONFIG_DM_SERIAL
The conversion to CONFIG_DM_SERIAL is mandatory, so select
this option.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-05-02 10:57:32 +02:00
Patrick Wildt
ebe2e0c309 board: mntre: imx8mq: Add MNT Reform 2 board support
The MNT Reform 2 is a modular DIY laptop.  In its initial version it
is based on the BoundaryDevices i.MX8MQ SoM.  Some parts have been
lifted from BoundaryDevices official U-Boot downstream project.

Signed-off-by: Patrick Wildt <patrick@blueri.se>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
Signed-off-by: Stefano Babic <sbabic@denx.de>
2023-05-02 10:57:22 +02:00
Pali Rohár
c06597ff11 pci: mpc85xx: Do not access PCI BARs registers of BDF address 00:00.0
At BDF address 00:00.0 is fictional device which PCI configuration header
is for configuring mpc85xx PCI controller itself. PCI config space of this
device has ATMU inbound registers on position of PCI BARs. Trying to do PCI
auto configuration of this device cause rewriting ATMU inbound registers.
To avoid it, do not allow overwriting registers at BARs positions. And
because this device does not have any PCI memory, return zeros when trying
to read PCI BARs config space registers. It signals to auto configuration
tool to not allocate any PCI memory for this device.

This information is taken from MPC8544E Reference Manual, sections
17.3.1.3, 17.3.1.1.1, 17.3.2 and 17.3.2.11. Available at NXP website:
https://www.nxp.com/docs/en/reference-manual/MPC8544ERM.pdf

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
2023-05-01 18:59:33 -04:00
Pali Rohár
159f104076 pci: mpc85xx: Do not try to access extended PCIe registers
Driver pci_mpc85xx.c is PCI controller driver for old PCI Local Bus,
which does not support access to extended PCIe registers (above 0xff),
as opposite of the PCIe driver pcie_fsl.c for the same platform.

So do not try to access extended PCIe registers as it cannot work.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
2023-05-01 18:59:33 -04:00
Pali Rohár
f5375a4500 pci: mpc85xx: Allow 8/16-bit access to PCI config space
This Freescale mpc85xx PCI controller should support 8-bit and 16-bit read
and write access to PCI config space as described in more Freescale
reference manuals.

This change fixes issue that 8-bit and 16-bit write to PCI config space
caused to clear adjacent bits of 32-bit PCI register.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
2023-05-01 18:59:33 -04:00
Pali Rohár
76c72930f9 pci: mpc85xx: Add missing sync() after writing to PCI config space
On PowerPC we should use barrier after store operation to HW register.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
2023-05-01 18:59:33 -04:00