Commit graph

34 commits

Author SHA1 Message Date
Ed Swarthout
32922cdc47 mpc8641 image size cleanup
e600 does not have a bootpg restriction.
Move the version string to beginning of image at fff00000.
Resetvec.S is not needed.
Update flash copy instructions.
Add tftpflash env variable

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-06-05 13:27:34 -05:00
Ed Swarthout
b84289b595 8641hpcn: Fix Makefile after moving pixis to board/freescale.
The OBJTREE != SRCTREE build scenario was broken.
This fixes it.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-05-08 14:17:07 -05:00
Ed Swarthout
2e343b9a57 mpc8641hpcn: Fix LAW and TLB setup to use the IO_PHYS #defines.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
2007-04-20 14:52:04 -05:00
Zhang Wei
79cb47391e Enable LAWs for MPC8641 PCI-Ex2.
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-04-20 14:50:56 -05:00
Haiying Wang
3d98b85800 Add PIXIS FPGA support for MPC8641HPCN board.
Move the 8641HPCN's PIXIS code to the new directory
board/freescale/common/ as it will be shared by
future boards not in the same processor family.

Write a "pixis_reset" command that utilizes the FPGA
reset sequencer to support alternate soft-reset options
such as using the "alternate" flash bank, enabling
the watch dog, or choosing different CPU frequencies.

Add documentation for the pixis_reset to README.mpc8641hpcn.

Signed-off-by: Haiying Wang <haiying.wang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-04-09 14:25:05 -05:00
Jon Loeliger
6eb1df8351 Fix 8641HPCN problem with ld version 2.16
(Dot outside sections problem).

This fix is in the spirit of 807d5d7319.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-03-22 11:39:40 -05:00
Jon Loeliger
bf651baa36 Move "ar" flags to config.mk to allow for silent "make -s" 2006-10-11 10:10:43 -05:00
Jon Loeliger
7b382b7125 Fix whitespace issues. 2006-10-10 17:14:45 -05:00
Jon Loeliger
afbdc649f8 Modified makefile for new build mechanism.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2006-09-19 09:34:10 -05:00
Jon Loeliger
80e955c7dd General indent and whitespace cleanups. 2006-08-22 12:25:27 -05:00
Jon Loeliger
40bc83559d Removed MPC8641HPCN DTS source file from build.
It is no longer linked into U-Boot; its sources are
now located in the kernel tree.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2006-08-09 15:32:16 -05:00
John Traill
8fc8bd2cc4 Add Rapidio support for the MPC8641HPCN
Signed-off-by: John Traill <john.traill@freescale.com>
2006-08-09 11:20:30 -05:00
Haiying Wang
71748af833 Correct the irq value of DUART2 2006-07-31 09:43:08 -05:00
Haiying Wang
239db37c94 Move get_board_sys_clk to board directory 2006-07-31 09:27:57 -05:00
Zhang Wei
c86360b830 Fixed OF device tree of mpc86xxhpcn board.
The changes works in with kernel irq mapping rework.

Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
2006-07-27 15:32:02 -05:00
Haiying Wang
bea3f28d28 Add support for reading and writing mac addresses to or from ID EEPROM.
Added code for reading and writing Mac addresses to/from ID EEPROM(0x57).
With attached patch, we can use command "mac/mac read/mac save/"
to read and write EEPROM under u-boot prompt.

U-boot will calculate the checksum of EEPROM while bootup,
if it is right, then u-boot will check whether the mac address
of eTSEC0/1/2/3 is availalbe (non-zero).

If there is mac address availabe in EEPROM, u-boot will use it,
otherewise, u-boot will use the mac address defined in
MPC8641HPCN.h. This matches the requirement to set unique mac address
for each TSEC port.

Signed-off-by: Haiying Wang <haiying.wang@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
2006-07-13 10:57:37 -05:00
Jon Loeliger
684623ce92 Fix bug in 8641hpcn reset command with no args.
Signed-off-by: Haiying Wang <haiying.wang@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
2006-06-22 08:51:46 -05:00
Zhang Wei
8be429a5dd Reworked IRQ mapping in OF-tree. 2006-06-22 08:31:21 -05:00
Jon Loeliger
d9bf4858fc Allow DTC path to be passed in.
Signed-off-by: Jon Loeliger <jdl@jdl.com>
2006-06-07 10:52:49 -05:00
Haiying Wang
c83ae9ea6d Modify the IRQ of DUART2 2006-06-07 08:48:08 -05:00
Jon Loeliger
c934f655f9 Review cleanups.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2006-05-31 14:01:32 -05:00
Jon Loeliger
cb5965fb95 White space cleanup.
Some 80-column cleanups.
Convert printf() to puts() where possible.
Use #include "spd_sdram.h" as needed.
Enhanced reset command usage message a bit.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2006-05-31 12:44:44 -05:00
Jon Loeliger
3d5c5be547 Removed unneeded local_bus_init() from 8641HPCN board.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2006-05-31 11:39:34 -05:00
Jon Loeliger
4d3d729c16 Moved mpc8641hpcn_board_reset() out of cpu/ into board/.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2006-05-31 11:24:28 -05:00
Jon Loeliger
126aa70f10 Move mpc86xx PIXIS code to board directory
First cut at moving the PIXIS platform code out of
the 86xx cpu directory and into board/mpc8641hpcn
where it belongs.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2006-05-31 09:49:33 -05:00
Haiying Wang
ed45d6c930 Added pci@8000 block.
Updated ethernet interrupt mappings (moved up 48).
Cleaned up a few comments.

Signed-off-by: Jon Loeliger <jdl@jdl.com>
2006-05-26 10:13:04 -05:00
Jon Loeliger
586d1d5abd Update 86xx address map and LAWBARs. 2006-05-19 13:54:02 -05:00
Jon Loeliger
f35ec68fb0 Enable 2nd CPU and I2C. 2006-05-19 13:54:02 -05:00
Jon Loeliger
bf690dcb51 Update interrupt mapping. 2006-05-15 07:26:56 -05:00
Haiying Wang
6cfea33477 Remove unneeded INIT_RAM_LOCK cache twiddling.
Correctly tracks r29 as global data pointer now.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
2006-05-10 09:38:06 -05:00
Jon Loeliger
d4dd317b58 Remove unnecessary flash.c file. 2006-05-10 09:33:07 -05:00
Jon Loeliger
18b6c8cd8a Get MPC8641HPCN flash images working.
Enable the CFI driver.
    Remove bogus LAWBAR7 cruft.
    Use correct TEXT_BASE, Fixup load script.
    Enable SPD EEPROM during DDR setup.
    Use generic RFC 1918 IP addresses by default.
2006-05-09 08:23:49 -05:00
Jon Loeliger
5c9efb36a6 Cleanup whitespaces and style issues.
Removed //-style comments.
Use 80-column lines.
Remove trailing whitespace.
Remove dead code and debug cruft.
2006-04-27 10:15:16 -05:00
Jon Loeliger
debb7354d1 Initial support for MPC8641 HPCN board. 2006-04-26 17:58:56 -05:00