Commit graph

5927 commits

Author SHA1 Message Date
Jon Loeliger
e31d2c1e2b FSL DDR: Convert MPC8548CDS to new DDR code.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:50 -05:00
Jon Loeliger
aa11d85cf3 FSL DDR: Convert MPC8541CDS to new DDR code.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:50 -05:00
Jon Loeliger
2b40edb10d FSL DDR: Convert MPC8555ADS to new DDR code.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:49 -05:00
Jon Loeliger
8b625114e8 FSL DDR: Convert MPC8560ADS to new DDR code.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:49 -05:00
Kumar Gala
9617c8d49a FSL DDR: Convert MPC8540ADS to new DDR code.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:48 -05:00
Kumar Gala
2a6c2d7ab2 FSL DDR: Add 85xx specific register setting
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:48 -05:00
Kumar Gala
6fb1b73468 FSL DDR: Add e500 TLB helper for DDR code
Provide a helper function that board code can call to map TLBs when
setting up DDR.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:48 -05:00
Kumar Gala
b5710d9974 FSL DDR: Remove old SPD support from cpu/mpc86xx
All 86xx boards have been converted to the new code so we can
remove the old SPD DDR setup code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 02:06:05 +02:00
Kumar Gala
9bd4e5911b FSL DDR: Convert SBC8641D to new DDR code.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 02:06:04 +02:00
Jon Loeliger
39aa1a7348 FSL DDR: Convert MPC8610HPCD to new DDR code.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 02:06:03 +02:00
Kumar Gala
6a8e569293 FSL DDR: Convert MPC8641HPCN to new DDR code.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 02:06:02 +02:00
Kumar Gala
46ff4f1100 FSL DDR: Add 86xx specific register setting
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 02:06:01 +02:00
Kumar Gala
233fdd502a FSL DDR: Add DDR2 DIMM paramter support
Compute DIMM parameters based upon the SPD information.

Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 02:06:00 +02:00
Kumar Gala
05c05a2363 FSL DDR: Add DDR1 DIMM paramter support
Compute DIMM parameters based upon the SPD information in spd.

Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 02:05:59 +02:00
Kumar Gala
58e5e9aff1 FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code.
The main purpose of this rewrite it to be able to share the same
initialization code on all FSL PowerPC products that have DDR
controllers.  (83xx, 85xx, 86xx).

The code is broken up into the following steps:
	GET_SPD
	COMPUTE_DIMM_PARMS
	COMPUTE_COMMON_PARMS
	GATHER_OPTS
	ASSIGN_ADDRESSES
	COMPUTE_REGS
	PROGRAM_REGS

This allows us to share more code an easily allow for board specific code
overrides.

Additionally this code base adds support for >4G of DDR and provides a
foundation for supporting interleaving on processors with more than one
controller.

Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 02:05:58 +02:00
Kumar Gala
f784e32b4b FSL DDR: Provide a generic set_ddr_laws()
Provide a helper function that will setup the last available
LAWs (upto 2) for DDR.  Useful for SPD/dyanmic DDR setting code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 02:05:55 +02:00
James Yang
0f2cbe3f5e Add proper SPD definitions for DDR1/2/3
Also adds helper functions for DDR1/2 to verify the checksum.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 02:05:53 +02:00
Wolfgang Denk
285db74716 Update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-08-27 01:02:48 +02:00
Heiko Schocher
adf22b66d8 Add support for muas3001 board (MPC8270)
Signed-off-by: Heiko Schocher <hs@denx.de>
2008-08-27 01:00:43 +02:00
Gururaja Hebbar K R
322098bff3 common/cmd_load.c cleanup - remove unused variables
- Remove unused global variable os_data_count.
- Remove unused variable z.

Signed-off-by: Gururaja Hebbar <gururajakr@sanyo.co.in>
2008-08-27 00:57:17 +02:00
Andre Schwarz
306620b762 remove MVS1 board
MVS1 board has reached end-of-life and can be removed completely.

Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
2008-08-26 23:58:46 +02:00
Kumar Gala
40d7e99d37 bootm: refactor do_reset and os boot function args
There is no need for each OS specific function to call do_reset() we
can just do it once in bootm. This means its feasible on an error for
the OS boot function to return.

Also, remove passing in cmd_tbl_t as its not needed by the OS boot
functions.  flag isn't currently used but might be in the future so
we left it alone.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-26 23:48:01 +02:00
Kumar Gala
40afac22a9 fdt: Added resize command
Resize the fdt to size + padding to 4k boundary

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-26 23:45:47 +02:00
Kumar Gala
2a1a2cb6e2 fdt: refactor initrd related code
Created a new fdt_initrd() to deal with setting the initrd properties
in the device tree and fixing up the mem reserve.  We can use this
both in the choosen node handling and lets us remove some duplicated
code when we fixup the initrd info in bootm on PPC.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-26 23:45:20 +02:00
Kumar Gala
3082d2348c fdt: refactor fdt resize code
Move the fdt resizing code out of ppc specific boot code and into
common fdt support code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-26 23:43:36 +02:00
Kumar Gala
396f635b8f bootm: refactor image detection and os load steps
Created a bootm_start() that handles the parsing and detection of all
the images that will be used by the bootm command (OS, ramdisk, fdt).
As part of this we now tract all the relevant image offsets in the
bootm_headers_t struct. This will allow us to have all the needed
state for future sub-commands and lets us reduce a bit of arch
specific code on SPARC.

Created a bootm_load_os() that deals with decompression and loading
the OS image.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-26 23:41:43 +02:00
Kumar Gala
e906cfae08 bootm: move lmb into the bootm_headers_t structure
To allow for persistent state between future bootm subcommands we
need the lmb to exist in a global state.
Moving it into the bootm_headers_t allows us to do that.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-26 23:38:48 +02:00
Kumar Gala
54f9c86691 bootm: Set working fdt address as part of the bootm flow
Set the fdt working address so "fdt FOO" commands can be used as part
of the bootm flow.  Also set an the environment variable "fdtaddr"
with the value.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-26 23:37:54 +02:00
Kumar Gala
06a09918f3 bootm: refactor fdt locating and relocation code
Move the code that handles finding a device tree blob and relocating
it (if needed) into common code so all arch's have access to it.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-26 23:37:12 +02:00
Kumar Gala
c4f9419c6b bootm: refactor ramdisk locating code
Move determing if we have a ramdisk and where its located into the
common code. Keep track of the ramdisk start and end in the
bootm_headers_t image struct.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-26 23:35:24 +02:00
Kumar Gala
c160a95447 bootm: refactor entry point code
Move entry point code out of each arch and into common code.
Keep the entry point in the bootm_headers_t images struct.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-26 23:31:33 +02:00
Randy Vinson
20220d22b9 mpc7448hpc2: Fix PCI I/O space mapping.
PCI I/O space is currently mapped 1:1 at 0xFA000000. Linux requires
PCI I/O space to start at 0 on the PCI bus. This patch maps PCI I/O
space such that 0xFA000000 in the processor's address space maps to 0
on the PCI I/O bus.

Signed-off-by Randy Vinson <rvinson@mvista.com>
Acked-by: Roy Zang <tie-fei.zang@freescale.com>
2008-08-26 23:23:49 +02:00
Wolfgang Denk
c5d11e79a2 Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx 2008-08-26 23:14:58 +02:00
Guennadi Liakhovetski
b4e07520bb i.MX31: Specify maintainers for i.MX31-based boards
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-08-26 23:10:16 +02:00
Wolfgang Denk
51e46e28fd ADS5121: adjust image addresses in RAM and flash
Use the same mapping in flash as used by Linux

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-08-26 15:01:28 +02:00
Wolfgang Denk
19f101412c cmd_mem.c: Fix help message alignment
Bug was introced by "Big white-space cleanup" (53677ef1)

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-08-26 13:14:34 +02:00
Andre Schwarz
1a9eeb78b8 change mvBL-M7 default env and move to vendor subdir
fix mvBL-M7 config and move to matrix_vision subdir

Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-08-25 17:11:20 -05:00
Nick Spence
002d27caf2 MPC83XX: Add miscellaneous registers and #defines to support MPC83xx family devices
This patch adds elements to the 83xx sysconf structure and #define values that are used
by mpc83xx family devices.

Signed-off-by: Nick Spence <nick.spence@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-08-25 17:04:40 -05:00
Ira W. Snyder
447ad5768a MPC8349EMDS: Add PCI Agent (PCISLAVE) support
Add the ability for the MPC8349EMDS to run in PCI Agent mode, acting as a
PCI card rather than a host computer.

Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-08-25 17:04:36 -05:00
Ira W. Snyder
4ff9aea9d6 mpc83xx: add PCISLAVE support to 83XX_GENERIC_PCI setup code
This adds a helper function to unlock the PCI configuration bit, so that
any extra PCI setup (such as outbound windows, etc.) can be done after
using the 83XX_GENERIC_PCI code to set up the PCI bus.

Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-08-25 17:04:30 -05:00
Ira W. Snyder
162338e1fc MPC8349EMDS: use 83XX_GENERIC_PCI setup code
Change the MPC8349EMDS board to use the generic PCI initialization code
for the mpc83xx cpu.

Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-08-25 17:04:24 -05:00
Kim Phillips
f4e55a4941 fix out of tree building
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-08-25 17:03:57 -05:00
Kim Phillips
ce0eb70333 Merge branch 'next' 2008-08-25 17:02:10 -05:00
Wolfgang Denk
a49d10cf02 Minor coding style cleanup, updte CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-08-25 23:45:41 +02:00
Wolfgang Denk
b97a31165a Merge branch 'master' of git://git.denx.de/u-boot-arm 2008-08-25 23:34:22 +02:00
Stefan Roese
4d56e8dea6 RTC: Fix Makefile problem with COBJS-$(CONFIG_RTC_DS1307 || CONFIG_RTC_DS1338)
This "||" doesn't seem to work. Now using the idea suggest by Scott Wood
to combine both config options into one line. This even allows defining
both options and not generating the target object twice.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-08-25 23:32:39 +02:00
Jens Gehrlein
079edb913d MX31: fix bit masks in function mx31_decode_pll()
Bits MPCTL[MFN] and MPCTL[MFD] were not fully covered.

Signed-off-by: Jens Gehrlein <sew_s@tqs.de>
2008-08-25 21:47:01 +02:00
Gururaja Hebbar K R
e8f1207bbf Correct ARM Versatile Timer Initialization
- According to ARM Dual-Timer Module (SP804) TRM (ARM DDI0271),
   -- Timer Value Register @ TIMER Base + 4 is Read-only.
   -- Prescale Value (Bits 3-2 of TIMER Control register)
	can only be one of 00,01,10. 11 is undefined.
   -- CFG_HZ for Versatile board is set to
	#define CFG_HZ		(1000000 / 256)
	So Prescale bits is set to indicate
	- 8 Stages of Prescale, Clock divided by 256
 - The Timer Control Register has one Undefined/Shouldn't Use Bit
   So we should do read/modify/write Operation

Signed-off-by: Gururaja Hebbar <gururajakr@sanyo.co.in>
2008-08-25 13:00:03 +02:00
Gururaja Hebbar K R
535cfa4f3d Add ARM AMBA PL031 RTC Support
Signed-off-by: Gururaja Hebbar K R <gururajakr@sanyo.co.in>
2008-08-25 11:30:29 +02:00
Hugo Villeneuve
e394116746 ARM DaVinci: Removed redundant NAND initialization code.
ARM DaVinci: Removed redundant NAND initialization code.

Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
2008-08-25 11:12:44 +02:00