* 'master' of git://git.denx.de/u-boot-arm:
ARM926EJS: Fix cache.c to comply with checkpatch.pl
ARM926EJS: Make asm routines volatile in cache ops
MX35: mx35pdk: wrong board revision
ARM1136: MX35: Make asm routines volatile in cache ops
ARM: add u-boot.imx as target for i.MX SOCs
M28: Pull out CONFIG_APBH_DMA so it's always enabled
DMA: Split the APBH DMA init into block and channel init
imx: Return gpio_set_value in gpio_direction_output
imx: Use GPIO_TO_PORT macro in the gpio driver instead of (gpio >> 5)
imx: Add GPIO_TO_PORT macro in the mxc_gpio driver
imx: Remove unneeded/repititive definitions from imx headers
i.MX28: Allow coexistence of PIO and DMA mode for SD/MMC
MX31: mx31pdk: drop enable_caches from board file
i.MX28: Fix initial stack pointer position
mx35: mx35pdk: fix when cache functions are linked
mx35: flea3: fix when cache functions are linked
ARM: 926ejs: use debug() for misaligned addresses
ARM1136: add cache flush and invalidate operations
mx6qsabrelite: Fix the serial console port
mx6qsabrelite: Add boot switch setting information into the README
i.MX6: mx6qsabrelite: add cache commands if cache is enabled
i.MX6: implement enable_caches()
i.MX6: define CACHELINE_SIZE
MX53: DDR: Fix ZQHWCTRL field TZQ_CS
mx28evk: Add a README file
mx28: Split the README into a common part and a m28 specific part
tricorder: Load kernel from ubifs
tricorder: Add UBIFS
cm-t35: fix Ethernet reset timing
hawkboard: Add CONFIG_SPL_LIBGENERIC_SUPPORT
BeagleBoard: Remove userbutton command and use gpio command instead
OMAP: Move omap1510inn to Unmaintained / Orphaned
We certainly don't want the compiler to reorganise the code for dcache flushing.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Stefano Babic <sbabic@denx.de>
The board revision is detected accessing to the pmic,
that is not available before relocation (I2C).
This generates the following error:
CPU: Freescale i.MX35 rev 2.0 at 532 MHz.
Reset cause: WDOG
<reg num> = 7 is invalid. Should be less than 0
Board: MX35 PDK 1.0
The revision number is wrong, as a default value is printed
(tested on a mx35pdk Rev. 2.0).
Move the output in the board_late_init(), when
pmic can be accessed.
Signed-off-by: Stefano Babic <sbabic@denx.de>
As well as pushed for ARM926EJS, we certainly don't want
the compiler to reorganise the code for dcache flushing
Fix checkpatch warnings as well.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Marek Vasut <marex@denx.de>
CC: Albert Aribaud <albert.u.boot@aribaud.net>
Freescale SOCs require an header to u-boot.bin
The patch adds u-boot.imx to the default targets
if the imx file is set (IMX_CONFIG).
Signed-off-by: Stefano Babic <sbabic@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
CC: Loïc Minier <loic.minier@linaro.org>
CC: Mike Frysinger <vapier@gentoo.org>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
Tested-by: Dirk Behme <dirk.behme@googlemail.com>
The ABPH DMA is now used also by the SD card. Therefore it has to be enabled
even if NAND is disabled.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
This fixes the issue where mxs_dma_init() was called either twice or never,
without introducing any new init hooks.
The idea is to allow each and every device using the APBH DMA block to
configure and request only the channels it uses, instead of making it call init
for all the channels as is now.
The common DMA block init part, which only configures the block, is then called
from CPUs arch_cpu_init() call.
NOTE: This patch depends on:
http://patchwork.ozlabs.org/patch/150957/
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
This SD DMA function of i.MX28 is still apparently too experimental to be
enabled by default in 2012.04 release. Enable this feature only if the user
plans to tinker with DCache or explicitly enables it.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
enable_caches() is implemented now in cpu.c for
ARM1136.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
The patch:
m28evk: Use GENERATED_GBL_DATA_SIZE
commit 1084606c97
introduced usage of GENERATED_GBL_DATA_SIZE and calculation of initial stack
pointer position defived from that. Due to a small typo, the SP position moved
to 0x21f80, which is past the SRAM area. This didn't manifest on the real
hardware as the SRAM repeats there (address bits in the CPU being ignored).
Though this was caught in QEMU, where it crashed the emulator.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Misaligned warnings are useful to debug faulty drivers.
A misaligned warning is printed also when the driver
is correct - use debug() instead of printf().
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Albert Aribaud <albert.u.boot@aribaud.net>
CC: Mike Frysinger <vapier@gentoo.org>
CC: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Since commit 5c1ad3e6f8
(net: fec_mxc: allow use with cache enabled) the FEC_MXC
driver uses flush_dcache_range() and invalidate_dcache_range()
functions. This driver is also configured for ARM1136 based
'flea3' and 'mx35pdk' boards which currently do not build
as there are no ARM1136 specific flush_dcache_range() and
invalidate_dcache_range() functions. Add various ARM1136
cache functions to fix building for 'flea3' and 'mx35pdk'.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
CC: Mike Frysinger <vapier@gentoo.org>
CC: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Currently, board files are setting this field to 0x01
which the manual says is a reserved value. Change to
use the default of 0x02 - 128 cycles.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
Split the README into a common part and a m28 specific part.
This will make things easier when adding new README files for other mx28
based boards.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
Since kernel should be in a ubifs partition, we need UBIFS.
The greater malloc size is needed for UBIFS.
Signed-off-by: Bernhard Walle <walle@corscience.de>
Squashed two commits (UBIFS enabled and malloc size increased) into one.
Signed-off-by: Thomas Weber <weber@corscience.de>
The reset_net_chip() function has wrong timings for the reset pulse.
This appeared to work until:
0607e2b (ARMV7: OMAP: Write more than 1 byte at a time in i2c_write)
Fix the Ethernet support by introducing right timings.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Remove userbutton command and do the detection in board config file using the gpio command
Signed-off-by: Joel A Fernandes <agnel.joel@gmail.com>
Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
After removing omap1610inn for not building, move omap1510inn to
orphaned. Also update boards.cfg to note it's part of the 'omap' SoC to
make sure the board is built more often and future breakage noticed
quicker.
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
Fix:
spr_smi.c: In function 'smi_write':
spr_smi.c:325:15: warning: variable 'WM' set but not used
[-Wunused-but-set-variable]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Vipin Kumar <vipin.kumar@st.com>
Fix the compiler warning
mkenvimage.c: In function ‘main’:
mkenvimage.c:218: warning: format ‘%ld’ expects type ‘long int’, but argument 3 has type ‘unsigned int’
mkenvimage.c:226: warning: format ‘%ld’ expects type ‘long int’, but argument 3 has type ‘unsigned int’
introduced with the commit
mkenvimage: Use mmap() when reading from a regular file
6ee39f8055
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
CC: David Wagner <david.wagner@free-electrons.com>
CC: Anatolij Gustschin <agust@denx.de>
CC: Mike Frysinger <vapier@gentoo.org>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: David Wagner <deubeuliou@gmail.com>
The standalone example does not have get_timer() defined, so we cannot
rely on it being available.
Move the timer function into boootstage.c to avoid this problem.
This corrects a build breakage for the standalone example on some boards.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Fix typo on CONFIG_SYS_HUSH_PARSER and also add CONFIG_SYS_PROMPT_HUSH_PS2
to avoid build error.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* 'marek.vasut@gmail.com' of git://git.denx.de/u-boot-staging:
LMB: Fix undefined lmb_reserve() on non-lmb platforms
MIPS: fix endianess handling
MIPS: fix inconsistency in config option for cache operation mode
MIPS: board.c: fix init of flash data in bd_info
* 'master' of git://git.denx.de/u-boot-net:
net/designware: Change timeout loop implementation
net/designware: Set ANAR to 0x1e1
net/designware: Program phy registers when auto-negotiation is ON
net/designware: Try configuring phy on each dw_eth_init
net/designware: Consecutive writes must have delay
net/designware: Phy address fix
net/designware: Fix the max frame length size
net/designware: Fix to restore hw mac address
microblaze: Wire up LL_TEMAC driver initialization
microblaze: Add faked LL_TEMAC driver configuration
microblaze: Enable several ethernet driver compilation
net: ll_temac: Add LL TEMAC driver to u-boot
Update net subsystem maintainer in doc/git-mailrc
net/eth.c: fix eth_write_hwaddr() to use dev->enetaddr as fall back
mvgbe: remove warning for unused methods
* 'master' of git://git.denx.de/u-boot-onenand:
onenand: samsung: Enable OneNAND support at Samsung's Exynos4210
onenand: Replace ONENAND_IS_MLC() with ONENAND_HAS_4KB()
onenand:samsung OneNAND chip probe functions added for GONI and Exynos4210
onenand:samsung Target dependent OneNAND chip probe function
* 'master' of git://git.denx.de/u-boot-nios:
nios2 - adjust gbl data off to account for bd_info
nios2: implement get_ticks and get_tbclk
nios2: add flush_dcache_range function
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <TWarren@nvidia.com>
Cc: Graeme Russ <graeme.russ@gmail.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
The new implementation changes the timeout loop implementation to avoid 1 ms
delay in each failing test. It also configures the delay to 10usec.
Signed-off-by: Amit Virdi <amit.virdi@st.com>
This patch forces the advertised capabilities during auto
negotiation to always be 10/100 Mbps and half/full as duplexing.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
If AN(auto-negotiation) is ON, speed bit of control register are not
applicable. Also phy registers were not getting programmed as per the
result of AN. This patch sets only AN bit & restart AN bit for AN ON
selection & programs PHY registers as per AN result.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Phy autonegotiation works only when the ethernet cable is plugged in.
Since the phy was configured only at the init time, a plugged in cable
was necessary to initialize the phy properly.
This patch keeps a flag to check if the phy initialization has
succeeded, and calls configure_phy routine at every init if this flag
reports otherwise.
Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
This patch solves a TX/RX problem which happens at 10Mbps, due to the
fact that we are not respecting 4 cyles of the phy_clk (2.5MHz) between
two consecutive writes on the same register.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
The code assumes the phy address to be > 0, which is not true, the phy address
can be in the range 0-31.
Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
