Commit graph

86229 commits

Author SHA1 Message Date
Bhupesh Sharma
d8c7cc0ee6 board: Fix board file path for sdm845.c for Samsung and Qualcomm boards
Currently a few 'board/qualcomm/../Makefile' point to incorrect
path of sdm845 board file.

Fix the same.

Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
2023-05-03 09:05:17 -04:00
Manorit Chawdhry
b8ebf24e7f arm: mach-k3: common: don't reconfigure background firewalls
K3 devices have some firewalls set up by ROM that we usually remove so
that the development is easy in HS devices.

While removing the firewalls disabling a background region before
disabling the foreground regions keeps the firewall in a state where all
the transactions will be blacklisted until all the regions are disabled.
This causes a race for some other entity trying to access that memory
region before all the firewalls are disabled and causes an exception.

Since the background regions configured by ROM are in such a manner
that they allow all transactions, don't touch the background regions at
all.

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Reviewed-by: Kamlesh Gurudasani <kamlesh@ti.com>
2023-05-02 14:24:36 -04:00
Vignesh Raghavendra
fdb051ba3f arm: mach-k3: common: Default to non fitImage boot on HS-FS
Allow non fitImage bootflow on Field Securable (HS-FS) devices in
addition to GP, force fitImage boot only on Security enforced (HS-SE)
devices where signed images are necessary to maintain chain of trust.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Kamlesh Gurudasani <kamlesh@ti.com>
2023-05-02 14:23:59 -04:00
Vladimir Zapolskiy
0e889a7c1b arm: dts: msm: add GENI SE QUP device tree node
On modern Qualcomm platforms including SDM845 a GENI SE QUP IP
description is supposed to be found in board device tree nodes,
the version of the IP is used by the GENI UART driver to properly
set an oversampling divider value, which impacts UART baudrate.

The change touches dragonboard845c and starqltechn board device
tree source files, a device tree node label to "debug" UART is
renamed to 'uart9' according to the naming found in Linux.

Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
2023-05-02 14:23:59 -04:00
Vladimir Zapolskiy
10ea2a7a93 serial: msm-geni: correct oversampling value based on QUP hardware revision
Starting from QUP v2.5 the value of oversampling is changed from 32
to 16, keeping the old value on newer platforms results on wrong set
UART IP clock divider, thus the asked baudrate does not correspond to
the actually set with all the consequencies for a user.

The change links the driver to a new Qualcomm GENI SE QUP driver
to get its hardware version and update the oversampling value.

Deliberately the code under CONFIG_DEBUG_UART_MSM_GENI is not touched,
since a wanted baudrate can be controlled by setting a modified
CONFIG_DEBUG_UART_CLOCK build time variable.

Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
2023-05-02 14:23:59 -04:00
Konrad Dybcio
aa539d89e1 serial: msm-geni: Use upstream Linux bindings
The name "se" is used in upstream Linux device trees and has been for
ages, long before this U-Boot-ism was introduced. Same goes for the
existing compatible. Get rid of that.

[vzapolskiy: removed a ready change in the driver]
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
2023-05-02 14:23:58 -04:00
Vladimir Zapolskiy
babdadc8a5 serial: msm-geni: fix a compile time warning from msm_serial_setbrg()
A compiler warns about a missing function prototype, which is valid
and fixed by converting the function into static one, also fix
interleaved local variable declarations and assignments.

Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Fixes: 324df15a29 ("serial: qcom: add support for GENI serial driver")
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
2023-05-02 14:23:58 -04:00
Vladimir Zapolskiy
b955970b23 serial: msm-geni: fix code indentation
This a cosmetic change, which corrects code indentation in a few places.

Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
2023-05-02 14:23:58 -04:00
Vladimir Zapolskiy
9dd480c30d serial: msm-geni: remove invalid se-clk clock name
There is only one clock supplier to the serial IP, thus getting it by
name is not needed, also note that "clock-names" property is not listed
under doc/device-tree-bindings/serial/msm-geni-serial.txt, and finally
"se-clk" clock name is invalid, if added, it shall get "se" value like
it's already described in Linux device tree documentation.

Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
2023-05-02 14:23:58 -04:00
Konrad Dybcio
f877932123 serial: msm-geni: Always bind before relocation
In preparation for supporting upstream Linux device trees on Qualcomm
platforms, make this the default behavior.

[vzapolskiy: extracted the driver change from a combination with dts changes]
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
2023-05-02 14:23:58 -04:00
Vladimir Zapolskiy
acf4062448 serial: msm-geni: remove redundant includes
For whatever reason, likely a driver stub was copied from another
driver, the driver contains a bunch of unnecessary and confusing
includes like watchdog.h etc., the change reduces the list.

Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
2023-05-02 14:23:58 -04:00
Vladimir Zapolskiy
1b15483deb misc: add Qualcomm GENI SE QUP device driver
This change adds a Qualcomm GENI SE QUP device driver as a wrapper for
actually enabled and used serial devices found on a board.

At the moment the driver is pretty simple, its intention is to populate
childred devices and provide I/O mem read interface to them as clients,
this is needed for GENI UART driver to set up a proper clock divider
and provide the actually asked baud rate.

Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
2023-05-02 14:23:58 -04:00
Linus Walleij
6f63c296fe board: Add new Broadcom Northstar board
This adds a simple Northstar "BRCMNS" board to be used with
the BCM4708x and BCM5301x chips.

The main intention is to use this with the D-Link DIR-890L
and DIR-885L routers for loading the kernel into RAM from
NAND memory using the BCH-1 ECC and using the separately
submitted SEAMA load command, so we are currently not adding
support for things such as networking.

The DTS file is a multiplatform NorthStar board, designed to
be usable with several NorthStar designs by avoiding any
particulars not related to the operation of U-Boot.

If other board need other ECC for example, they need to
create a separate DTS file and augment the code, but I don't
know if any other users will turn up.

Cc: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-05-02 14:23:58 -04:00
Linus Walleij
d3d9cd8ee1 arm: Add support for the Broadcom Northstar SoCs
The original Northstar is an ARM SoC series that comprise
BCM4709x and BCM5301x and uses a dual-core Cortex A9, the
global timer and a few other things.

This series should not be confused with North Star Plus
(NSP) which is partly supported by U-Boot already.

The SoC is well supported by the Linux kernel and OpenWrt
as it is used in many routers.

Since we currently don't need any chip-specific quirks
and can get the system up from just the device tree, a
mach-* directory doesn't even need to be added, just
some small Kconfig fragments.

Cc: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-05-02 14:23:58 -04:00
Linus Walleij
8a5122bfd3 arm: dts: Import device tree for Broadcom Northstar
This brings in the main SoC device tree used by the
Broadcom Northstar chipset, i.e. BCM4709x and BCM5301x.
This is taken from the v6.3 Linux kernel.

Cc: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-05-02 14:23:58 -04:00
Svyatoslav Ryhel
488d3dae24 extcon: add MAX14526 MUIC support
MAX14526 is a powerful extcon chip which allows detection of various
plugs like usb, mhl, uart, headset etc. This version of driver
implements support of AP-usb and CP-usb/uart paths.

Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # LG P880 T30
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-05-02 14:23:58 -04:00
Svyatoslav Ryhel
8b215e10fe test: Add tests for the extcon
Provide tests to the simple extcon device.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-05-02 14:23:58 -04:00
Svyatoslav Ryhel
5f650fa6ad dm: extcon: add an uclass for extcon
Add a new simple uclass for extcon. Currently all setup is done
in the probe. Uclass struct and ops are empty for now.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-05-02 14:23:34 -04:00
Tom Rini
021e303492 adjust maintainers
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Merge tag 'tpm-master-02052023' of https://source.denx.de/u-boot/custodians/u-boot-tpm

adjust maintainers
2023-05-02 12:52:40 -04:00
Tom Rini
30f6305e0c Merge branch '2023-05-01-assorted-powerpc-updates'
- A number of PCI fixes, and one Kconfig cleanup for PowerPC platforms
2023-05-02 12:50:42 -04:00
Pali Rohár
44efad2ff1 pci: auto: Remove PCI_CLASS_PROCESSOR_POWERPC autoconfig case
PCI autoconfig case for PCI_CLASS_PROCESSOR_POWERPC just prints debug
message and then calls autoconfig setup code like for any other standard
endpoint device. We do not need special debug message for it, so remove
this case and handle PCI_CLASS_PROCESSOR_POWERPC via default code path.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
2023-05-02 08:55:15 -04:00
Heinrich Schuchardt
a390050b41 MAINTAINERS: assign include/tpm*, cmd/tpm*
The files include/tpm* are an integral part of the TPM drivers.
The tpm* commands are used to access TPM devices.

Both should be managed by the TPM DRIVERS maintainer.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2023-05-02 14:09:19 +03:00
Heinrich Schuchardt
7e218c19c7 cmd: missing break in test_write_limit()
In test_write_limit() an unintended fall-through occurs.

Suggested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2023-05-02 14:09:19 +03:00
Pali Rohár
c06597ff11 pci: mpc85xx: Do not access PCI BARs registers of BDF address 00:00.0
At BDF address 00:00.0 is fictional device which PCI configuration header
is for configuring mpc85xx PCI controller itself. PCI config space of this
device has ATMU inbound registers on position of PCI BARs. Trying to do PCI
auto configuration of this device cause rewriting ATMU inbound registers.
To avoid it, do not allow overwriting registers at BARs positions. And
because this device does not have any PCI memory, return zeros when trying
to read PCI BARs config space registers. It signals to auto configuration
tool to not allocate any PCI memory for this device.

This information is taken from MPC8544E Reference Manual, sections
17.3.1.3, 17.3.1.1.1, 17.3.2 and 17.3.2.11. Available at NXP website:
https://www.nxp.com/docs/en/reference-manual/MPC8544ERM.pdf

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
2023-05-01 18:59:33 -04:00
Pali Rohár
159f104076 pci: mpc85xx: Do not try to access extended PCIe registers
Driver pci_mpc85xx.c is PCI controller driver for old PCI Local Bus,
which does not support access to extended PCIe registers (above 0xff),
as opposite of the PCIe driver pcie_fsl.c for the same platform.

So do not try to access extended PCIe registers as it cannot work.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
2023-05-01 18:59:33 -04:00
Pali Rohár
f5375a4500 pci: mpc85xx: Allow 8/16-bit access to PCI config space
This Freescale mpc85xx PCI controller should support 8-bit and 16-bit read
and write access to PCI config space as described in more Freescale
reference manuals.

This change fixes issue that 8-bit and 16-bit write to PCI config space
caused to clear adjacent bits of 32-bit PCI register.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
2023-05-01 18:59:33 -04:00
Pali Rohár
76c72930f9 pci: mpc85xx: Add missing sync() after writing to PCI config space
On PowerPC we should use barrier after store operation to HW register.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
2023-05-01 18:59:33 -04:00
Christophe Leroy
f1dc0daf7a mpc83xx: Don't allow W and G bits in IBATs
The "Programming Environments Manual for 32-Bit Implementations of the
PowerPC™ Architecture" says "W and G bits are not defined for IBAT
registers. Attempting to write to these bits causes boundedly-undefined
results"

The "e300 Power Architecture™ Core Family Reference Manual" says the
same: "Neither the W or G bits of the IBAT registers should be set.
Attempting to write to these bits causes boundedly-undefined results."

Remove the possibility to set those bytes.

Fixes: 30915ab95d ("mpc83xx: Migrate BATS config to Kconfig")
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Cc: Mario Six <mario.six@gdsys.cc>
2023-05-01 18:59:33 -04:00
Tom Rini
50f64026f7 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-spi
- cadence-quadspi fixes (Apurva Nandan, Dhruva Gole)
- CHIP_ERASE optimization (Marek Vasut)
- fixups for s25fs512s (Takahiro Kuwano)
2023-05-01 13:29:52 -04:00
Tom Rini
6735ab59e6 Prepare v2023.07-rc1
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-05-01 12:02:02 -04:00
Tom Rini
c960c0fd38 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-05-01 11:50:26 -04:00
Tom Rini
27dc882644 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
Please pull the second part of the sunxi pull request for this cycle.
Another bunch of patches that replace old-school U-Boot hacks with
proper DM based code, this time for the raw NAND flash driver, and the
USB PHY VBUS detection code. Plus two smaller patches that were sitting
in my inbox for a while.

Gitlab CI passed. In lack of some supported board with NAND flash I
couldn't really test this part, but apparently this was tested by the
reviewer. I briefly ran the branch on some boards with USB-OTG, and
this still worked.
2023-04-30 21:29:50 -04:00
Tom Rini
fe3a77cb15 Merge branch 'for-2023.07' of https://source.denx.de/u-boot/custodians/u-boot-mpc8xx
This pull request adds support for the last CPU board from
CS GROUP France (previously CSSI).

That CPU board called CMPCPRO has a mpc8321E CPU (Family PQII PRO hence
its name) and can be plugged in place of the CMPC885 board.

In order to support that new board, the following changes are included
in this series:
- Make the mpc8xx watchdog driver more generic for reusing it
with mpc83xx
- Fix various small problems on mpc83xx platform
- Add a GPIO Driver for QE GPIOs
- Add support for mpc832x into mpc83xx SPI driver
- Refactor existing board code that will be shared with new board
- Add the new board
2023-04-29 09:29:41 -04:00
Tom Rini
076f13308c sandbox and fdt bug fixes / tweaks
various other minor fixes
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Merge tag 'dm-pull-28apr23' of https://source.denx.de/u-boot/custodians/u-boot-dm

sandbox and fdt bug fixes / tweaks
various other minor fixes
2023-04-28 19:00:01 -04:00
Simon Glass
f43fc16812 fdt: Indicate that people should use the ofnode API
Add a note to the comment at the top of this file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-04-28 11:52:38 -06:00
Hugo Villeneuve
ded112f24c fdt_support: fix comments syntax error
Fix comments syntax error in fdt_node_offset_by_compat_reg()
description:
    compatiable -> compatible

Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-28 11:52:38 -06:00
Johan Jonker
37937aba35 core: fdtaddr: use map_sysmem() as cast for the return
For the devfdt_get_addr_index_ptr() and devfdt_get_addr_size_index_ptr()
function use map_sysmem() function as cast for the return for use in
sandbox. Also fix sandbox test.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Drop second hunk:
Signed-off-by: Simon Glass <sjg@chromium.org>
2023-04-28 11:52:30 -06:00
Jan Kiszka
de65b122a2 tools: Fall back to importlib_resources on Python 3.6
importlib.resources became part of 3.7 only. Allow using distros with
3.6 and the importlib_resources backport.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-28 11:49:00 -06:00
Marek Vasut
f53e973b84 test: fdt: Fix copyright message
Drop the map_to_sysmem() copy paste error. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-28 11:49:00 -06:00
Heinrich Schuchardt
c25be4f3ac patman: fix class TestFunctional
Variable orig_dir cannot be used in the finally block if it has not be
assigned outside of the try block.

tools/patman/func_test.py:523:21:
E0601: Using variable 'orig_dir' before assignment
(used-before-assignment)

tools/patman/func_test.py:691:21:
E0601: Using variable 'orig_dir' before assignment
(used-before-assignment)

Fixes: fd70986a62 ("patman: Add a test that uses gitpython")
Fixes: be051c0c77 ("patman: Detect missing upstream in CountCommitsToBranch")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-28 11:49:00 -06:00
Simon Glass
ad827e15b2 binman: Use expanduser instead of HOME
There may not be a HOME environment variable, so use the os.expanduser()
function instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-04-28 11:49:00 -06:00
Rasmus Villemoes
ca031c0827 dm: core: introduce uclass_get_device_by_of_path()
There's quite a few instances of board-specific code doing

  off = fdt_path_offset(gd->fdt_blob, ...);
  ...
  ret = uclass_get_device_by_of_offset(..., off, &dev);

looking for an eeprom or a pmic via some alias. Such code can be
simplified a little if we have a helper for directly getting a device
via device tree path (including being given as an alias).

Implement it in terms of ofnode rather than raw offsets so that this
will work whether live tree is enabled or not.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2023-04-28 11:48:59 -06:00
Rasmus Villemoes
6ebb357a6a uclass: add uclass_find_device_by_phandle_id() helper
The functions uclass_find_device_by_phandle() and
uclass_get_device_by_phandle_id() both loop over a given uclass
looking for a device with a given phandle. Factor that out to a common
helper.

For now, there are no (known potential) users of the new helper
outside uclass.c, so make it static.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fix warning on sandbox_spl; fix code style:
Signed-off-by: Simon Glass <sjg@chromium.org>
2023-04-28 11:48:09 -06:00
Pavel Skripkin
763f0a1f0d sandbox: disable tracing before unmapping RAM
Currently doing 'reset' command in sandbox with tracing enabled causes
SIGSEV

```
Hit any key to stop autoboot:  0
=>
=>
=> reset
resetting ...
Segmentation fault (core dumped)

```

Tracing callback uses RAM buffer for storing tracing reports, but
state_uninit() function unmaps whole RAM, which causes SIGSEV on umapped
memory inside tracing subsystem.

Fix it by disabling tracing before unmapping memory

Signed-off-by: Pavel Skripkin <paskripkin@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add missing check for CONFIG_TRACE:
Signed-off-by: Simon Glass <sjg@chromium.org>
2023-04-28 11:47:01 -06:00
Heinrich Schuchardt
c383e85434 sandbox: correct posix_types.h define
arch/arm/include/asm/posix_types.h and
arch/sandbox/include/asm/posix_types.h should use different defines.

Add SPDX header.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-28 11:30:18 -06:00
Tom Rini
e0dda26c2e bootflow: Rework do_bootflow_menu() slightly
When building this with clang, we get a warning such as:
cmd/bootflow.c:412:27: warning: variable 'bflow' is uninitialized when used here [-Wuninitialized]
        printf("Selected: %s\n", bflow->os_name ? bflow->os_name : bflow->name);
                                 ^~~~~

And a suggestion to just initialize bflow to NULL. This would however
would be ensuring a bad dereference. Instead, looking at the function we
rework things so that when CONFIG_EXPO is not enabled (and so, no UI) we
error early and would never reach this point in the code.  Simplify the
rest slightly as well while at this.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-28 11:30:17 -06:00
Bin Meng
86592af536 dm: core: Make aliases_lookup static
aliases_lookup is only referenced in of_access.c

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-28 11:30:17 -06:00
Jorge Ramirez-Ortiz
7f1a4c9dd8 drivers: tee: sandbox: Fix SCP03 control emulator
Fix and document the Secure Channel Protocol03 emulator.

Fixes: 5a8783c80c ("drivers: tee: sandbox: SCP03 control emulator")

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2023-04-28 11:30:17 -06:00
Heinrich Schuchardt
1a07d39521 sandbox: fix return type of os_filesize()
Given a file ../img of size 4294967296 with GPT partition table and
partitions:

=> host bind 0 ../img
=> part list host 0
Disk host-0.blk not ready

The cause is os_filesize() returning int. File sizes must use off_t.

Correct all uses of os_filesize() too.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-28 11:30:17 -06:00
Heinrich Schuchardt
86daa47c84 MAINTAINERS: assign include/os.h
os.h is only used by the sandbox.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-28 11:30:17 -06:00