If CONFIG_CMD_DHCP is enabled, the vci (vendor-class-identifier) string
isn't inserted into the bootp-packet during SPL stage because the
CONFIG_BOOTP_VCI_STRING
instead
CONFIG_SPL_NET_VCI_STRING
We fix this with testing for CONFIG_SPL_BUILD and testing for existing
CONFIG_SPL_NET_VCI_STRING.
Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
TFTP source and destination port variable names are
'tftpsrcp' and 'tftpdstp' in the code, but 'tftpsrcport'
and 'tftpdstport' in the README file. Fix the README.
Add environment variable 'tftptimeoutcountmax'. As per the
comments about the global variable tftp_timeout_count_max,
make sure tftptimeoutcountmax is nonnegative.
Introduce configuration option CONFIG_NET_TFTP_VARS,
which controls whether environment variables tftpblocksize,
tftptimeout, and tftptimoueoutcountmax are read by the TFTP
client code. CONFIG_NET_TFTP_VARS defaults to y but can be
set to n by targets with to tight size contraints.
Make bf527-ezkit set CONFIG_NET_TFTP_VARS to n to keep the
target size below limit.
Do not enable both I2C controllers by default. Enable them only when
they are selected.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
- Moved macro definitions to top
- Give tab space to CONFIG_ALTERA_SPI_IDLE_VAL value
- Re-arrange header includes ascending order
Acked-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Replace numerical bit shift with BIT macro
in altera_spi
:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 .... 31
Cc: Marek Vasut <marex@denx.de>
Acked-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
In 1fec3c5 I added a check that if we had an Android image we default to
trying the kernel address for a ramdisk. However when we don't have an
Android image buf is NULL and we oops here. Ensure that we have 'buf'
to check first.
Reported-by: elipe Balbi <balbi@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Replace numeric mask hexcodes with GENMASK macro
in xilinx_spi
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Replace numeric mask hexcodes with GENMASK macro
in tegra*.c
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Tom Warren <twarren@nvidia.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Replace numeric mask hexcodes with GENMASK macro
in fsl_qspi
Cc: York Sun <yorksun@freescale.com>
Cc: Haikun Wang <Haikun.Wang@freescale.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Replace numeric mask hexcodes with GENMASK macro
in designware_spi
Cc: Stefan Roese <sr@denx.de>
Cc: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Replace numeric mask hexcodes with GENMASK macro
in atmel_spi
Cc: Bo Shen <voice.shen@atmel.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Replace numerical bit shift with BIT macro
in xilinx_spi
:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 .... 31
Cc: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Replace numerical bit shift with BIT macro
in ti_qspi
:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 .... 31
Reviewed-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Replace numerical bit shift with BIT macro
in tegra*.c
:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 .... 31
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Tom Warren <twarren@nvidia.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Replace numerical bit shift with BIT macro
in sh_qspi
:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 .... 31
Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Replace numerical bit shift with BIT macro
in omap3_spi
:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 .... 31
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Replace numerical bit shift with BIT macro
in mpc8xxx_spi
:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 .... 31
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Replace numerical bit shift with BIT macro
in ich
:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 .... 31
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Replace numerical bit shift with BIT macro
in fsl_*spi.c
:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 .... 31
Cc: York Sun <yorksun@freescale.com>
Cc: Haikun Wang <Haikun.Wang@freescale.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Replace numerical bit shift with BIT macro
in designware_spi
:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 .... 31
Cc: Stefan Roese <sr@denx.de>
Cc: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Replace numerical bit shift with BIT macro
in cadence_qspi_apb
:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 .... 31
Cc: Stefan Roese <sr@denx.de>
Cc: Marek Vasut <marex@denx.de>
Acked-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Replace numerical bit shift with BIT macro
in bfin_spi6xx
:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 .... 31
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Replace numerical bit shift with BIT macro
in atmel_spi
:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 .... 31
Cc: Bo Shen <voice.shen@atmel.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
GENMASK macro used on zynq_spi.c and zynq_qspi.c
GENMASK is used to create a contiguous bitmask([hi:lo]).
Ex: (0x7 << 3) => GENMASK(5, 3)
Cc: Michal Simek <michal.simek@xilinx.com>
Acked-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Used BIT macro on zynq_spi.c and zynq_qspi.c
:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 .... 31
Cc: Michal Simek <michal.simek@xilinx.com>
Acked-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
This board has not compiled for me for quite some time due to size
constraints, remove.
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This board has not compiled for me for quite some time due to size
constraints, remove.
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This board has not compiled for me for quite some time due to size
constraints, remove.
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This board has not compiled for me for quite some time due to size
constraints, remove.
Cc: John Otken <jotken@softadvances.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch changes the cword union to use specific length types that are
architecture indepented.
This patch also renames the members of the cword union to represent
their usage, i.e.:
c -> w8
s -> w16
l -> w32
ll -> w64
Where "w" stands for "width" in bits.
I discovered this problem when enabling CFI flash on vexpress64.
cword.l was an unsigned long int, but it was intended to be 32 bits wide.
Unfortunately, it's 64-bits wide on a 64-bit system, meaning that a
64-bit system fails when attempting to use 32-bit wide CFI flash parts.
Similar problems also existed with the other cword sizes.
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Stefan Roese <sr@denx.de>
As QSPI and IFC are pin-multiplexed on LS1021A, only IFC is supported in
SD boot now. For the customer's demand, QSPI needs to be supported in SD
boot too.
This patch adds QSPI or IFC support in SD boot according to the
corresponding defconfig. For detail, ls1021atwr_sdcard_ifc_defconfig is
used to support IFC in SD boot and ls1021atwr_sdcard_qspi_defconfig is
used to support QSPI in SD boot.
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Pointer 'reg' returned from call to function 'fdt_getprop' may be
NULL, will be passed to function and may be dereferenced there by
passing argument 1 to function 'of_read_number'. So check pointer
'reg' first.
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Currently, using fdt_fixup_stdout() on a device tree that is missing
the relevant alias results in this:
WARNING: could not set linux,stdout-path FDT_ERR_NOTFOUND.
ERROR: /chosen node create failed
- must RESET the board to recover.
FDT creation failed! hanging...### ERROR ### Please RESET the board ###
There is no reason for this to be a fatal error rather than a warning,
and removing this allows for a smooth transition on a platform where
the device tree currently lacks the correct aliases but will have them
in the future.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: Kumar Gala <galak@kernel.crashing.org>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <yorksun@freescale.com>
This will allow OF-based earlycon to be used once the appropriate
aliases are added to the device tree and kernel support is fixed.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
The PEB array is an array of __be32, so let's fix the
scan_pool() prototype accordingly.
Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Heiko Schocher <hs@denx.de>
sync with linux v4.2
commit 64291f7db5bd8150a74ad2036f1037e6a0428df2
Author: Linus Torvalds <torvalds@linux-foundation.org>
Date: Sun Aug 30 11:34:09 2015 -0700
Linux 4.2
This update is needed, as it turned out, that fastmap
was in experimental/broken state in kernel v3.15, which
was the last base for U-Boot.
Signed-off-by: Heiko Schocher <hs@denx.de>
Tested-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
add missing definitions for the ubi/ubifs sync
with linux 4.2, also change "#define kfree ..."
into a static inline, so prevent ubi compile error:
CC drivers/mtd/ubi/fastmap.o
drivers/mtd/ubi/fastmap.c: In function 'scan_pool':
drivers/mtd/ubi/fastmap.c:475:3: error: called object 'free' is not a function
Signed-off-by: Heiko Schocher <hs@denx.de>
- Use __func__ on debug
- Removed unnecessary comment
- Fix function name in debug as zynq_qspi_xfer instead of spi_xfer
Signed-off-by: Jagan Teki <jteki@openedev.com>
This patch adds flag status register reading support to
spi_flash_cmd_wait_ready.
Cc: Simon Glass <sjg@chromium.org>
Cc: Marek Vasut <marex@denx.de>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Tom Warren <twarren@nvidia.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Hou Zhiqiang <B48286@freescale.com>
Tested-by: Jagan Teki <jteki@openedev.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Current flash wait_ready logic is not modular to add new
register status check, hence updated the status check for
adding few more register checks in future.
Below are the sf speed runs with 'sf update' on whole flash, 16MiB.
=> sf update 0x100 0x0 0x1000000
device 0 whole chip
16777216 bytes written, 0 bytes skipped in 59.564s, speed 289262 B/s
=> sf update 0x100 0x0 0x1000000
device 0 whole chip
16777216 bytes written, 0 bytes skipped in 62.549s, speed 275036 B/s
=> sf update 0x100 0x0 0x1000000
device 0 whole chip
16777216 bytes written, 0 bytes skipped in 61.276s, speed 284359 B/s
Cc: Simon Glass <sjg@chromium.org>
Cc: Marek Vasut <marex@denx.de>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Tom Warren <twarren@nvidia.com>
Cc: Tom Rini <trini@konsulko.com>
Tested-by: Jagan Teki <jteki@openedev.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Use the flash->flags for generic usage, not only for dm-spi-flash,
this will be used for future flag additions.
[Correct the spi flash flags detect logic]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Optimized spi-flash bar writing code and also removed
unnecessary bank_sel in read_ops.
Cc: Simon Glass <sjg@chromium.org>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Add spi_flash_read_bar function for reading bar and
discovering bar commands at probe time.
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
