Commit graph

631 commits

Author SHA1 Message Date
Simon Glass
8a8d24bdf1 dm: treewide: Rename ..._platdata variables to just ..._plat
Try to maintain some consistency between these variables by using _plat as
a suffix for them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 16:51:09 -07:00
Simon Glass
d1998a9fde dm: treewide: Rename ofdata_to_platdata() to of_to_plat()
This name is far too long. Rename it to remove the 'data' bits. This makes
it consistent with the platdata->plat rename.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 16:51:09 -07:00
Simon Glass
c69cda25c9 dm: treewide: Rename dev_get_platdata() to dev_get_plat()
Rename this to be consistent with the change from 'platdata'.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 16:51:09 -07:00
Simon Glass
caa4daa2ae dm: treewide: Rename 'platdata' variables to just 'plat'
We use 'priv' for private data but often use 'platdata' for platform data.
We can't really use 'pdata' since that is ambiguous (it could mean private
or platform data).

Rename some of the latter variables to end with 'plat' for consistency.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 16:51:08 -07:00
Simon Glass
41575d8e4c dm: treewide: Rename auto_alloc_size members to be shorter
This construct is quite long-winded. In earlier days it made some sense
since auto-allocation was a strange concept. But with driver model now
used pretty universally, we can shorten this to 'auto'. This reduces
verbosity and makes it easier to read.

Coincidentally it also ensures that every declaration is on one line,
thus making dtoc's job easier.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 08:00:25 -07:00
Simon Glass
734206dda1 dm: core: Rename device_bind_ofnode() to device_bind()
This is the standard function to use when binding devices. Drop the
'_ofnode' suffix to make this clear.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 07:58:18 -07:00
Michael Walle
382985675c mtd: spi-nor-ids: add Winbond W25Q32JW-IM flash
The Kontron SMARC-sAL28 board uses that flash.

This is the same change as in the linux commit f3418718c0ec ("mtd:
spi-nor: Add support for w25q32jwm").

Signed-off-by: Michael Walle <michael@walle.cc>
Reported-by: Leo Krueger <leo.krueger@zal.aero>
2020-12-02 16:21:58 -05:00
Michal Simek
89b7f1010f mtd: spi: Fix incorrect indentation
Use tabs to be aligned with the rest of the code.

Fixes: 658df8bd94 ("mtd: spi-nor-core: Add octal mode support")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:33 +01:00
Tom Rini
b7e7831e5d Merge branch 'next'
Bring in the assorted changes that have been staged in the 'next' branch
prior to release.

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-10-05 14:10:59 -04:00
Sean Anderson
8985e1cf91 mtd: spi: Fix logging in spi-nor-tiny
This fixes dev_xxx() not always being called with a device. In
spi_nor_reg_read, a the slave device may not always be available, so we use
bus and cs instead.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-30 08:52:41 -04:00
Sean Anderson
c64633644e mtd: spi: Include dm.h in spi-nor-core.c
This header is needed so struct udevice can be used in dev_xxx().

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-30 08:52:39 -04:00
Vladimir Vid
2781c71873 mtd: spi-nor-ids: add support for Macronix mx25u12835f flash
Some of Marvell A3700 boards use mx25u12835f, specifically uDPU
and ESPRESSObin v7.

Signed-off-by: Vladimir Vid <vladimir.vid@sartura.hr>
[a.heider: adapt commit message to mainline]
Signed-off-by: Andre Heider <a.heider@gmail.com>
2020-09-24 10:13:22 +02:00
Simon Glass
e567ec849a mtd: spi-nor: Tidy up error handling / debug code
The -ENODEV error value in spi_nor_read_id() is incorrect since there
clearly is a device - it just cannot be supported. Use -ENOMEDIUM instead
which has the virtue of being less common.

Fix the return value in spi_nor_scan().

Also there are a few printf() statements which should be debug() since
they bloat the code with unused strings at present. Fix those while here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-03 22:19:54 -04:00
Simon Glass
f38a29997d spi: Allow separate control of SPI_FLASH_TINY for SPL/TPL
In some cases SPL needs to be able to erase but TPL just needs to read.
Allow these to have separate settings for SPI_FLASH_TINY.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-03 22:19:54 -04:00
Tom Rini
497c7598c4 Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-spi
- Enable DM_SPI on siemens omap boards (Jagan)
- Dropped some non-dm supported omap3 boards (Jagan)
- Dropped non-dm code in omap3 spi driver (Jagan)
- Dropped non-dm code in kirkwood spi driver (Bhargav)
2020-07-11 17:40:00 -04:00
Walter Lozano
addf358bac core: add support for U_BOOT_DRIVER_ALIAS
Currently when using OF_PLATDATA the binding between devices and drivers
is done trying to match the compatible string in the node with a driver
name. However, usually a single driver supports multiple compatible strings
which causes that only devices which its compatible string matches a
driver name get bound.

To overcome this issue, this patch adds the U_BOOT_DRIVER_ALIAS macro,
which generates no code at all, but allows an easy way to declare driver
name aliases. Thanks to this, dtoc could be improve to look for the driver
name based on its alias when it populates the U_BOOT_DEVICE entry.

Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-09 18:57:22 -06:00
Walter Lozano
e3e2470fdd drivers: rename drivers to match compatible string
When using OF_PLATDATA, the bind process between devices and drivers
is performed trying to match compatible string with driver names.
However driver names are not strictly defined, and also there are different
names used when declaring a driver with U_BOOT_DRIVER, the name of the
symbol used in the linker list and the used in the struct driver_info.

In order to make things a bit more clear, rename the drivers names. This
will also help for further OF_PLATDATA improvements, such as checking
for valid driver names.

Signed-off-by: Walter Lozano <walter.lozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a fix for sandbox of-platdata to avoid using an invalid ANSI colour:
Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-09 18:57:22 -06:00
Heinrich Schuchardt
a6cfc34e36 sandbox: spi: sandbox_sf_state_name() is required
Compiling drivers/mtd/spi/sandbox.c fails when compiled with
CONFIG_LOG=n:

In file included from include/common.h:20,
                 from drivers/mtd/spi/sandbox.c:13:
drivers/mtd/spi/sandbox.c:295:15: error: format ‘%s’ expects argument of
type ‘char *’, but argument 7 has type ‘int’ [-Werror=format=]
  295 |   log_content(" cmd: transition to %s state\n",
      |               ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/printk.h:37:21: note: in definition of macro ‘pr_fmt’
   37 | #define pr_fmt(fmt) fmt
      |                     ^~~
include/log.h:128:30: note: in expansion of macro ‘log_nop’
  128 | #define log_content(_fmt...) log_nop(LOG_CATEGORY, \
      |                              ^~~~~~~
drivers/mtd/spi/sandbox.c:295:3: note: in expansion of macro
‘log_content’
  295 |   log_content(" cmd: transition to %s state\n",
      |   ^~~~~~~~~~~
drivers/mtd/spi/sandbox.c:295:37: note: format string is defined here
  295 |   log_content(" cmd: transition to %s state\n",
      |                                    ~^
      |                                     |
      |                                     char *
      |                                    %d

Supply function sandbox_sf_state_name() independent of CONFIG_LOG.

Fixes: c3aed5db59 ("sandbox: spi: Add more logging")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-09 18:57:21 -06:00
Pragnesh Patel
e69d078039 mtd: spi-nor: Enable QE bit for ISSI flash in case of SFDP
Enable QE bit for ISSI flash chips.

QE enablement logic is similar to what Macronix
has, so reuse the existing code itself.

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-07-09 20:58:06 +05:30
Lukasz Majewski
56c4046038 spi: Convert CONFIG_DM_SPI* to CONFIG_$(SPL_TPL_)DM_SPI*
This change allows more fine tuning of driver model based SPI support in
SPL and TPL. It is now possible to explicitly enable/disable the DM_SPI
support in SPL and TPL via Kconfig option.

Before this change it was necessary to use:
    /* SPI Flash Configs */
    #if defined(CONFIG_SPL_BUILD)
    #undef CONFIG_DM_SPI
    #undef CONFIG_DM_SPI_FLASH
    #undef CONFIG_SPI_FLASH_MTD
    #endif

in the ./include/configs/<board>.h, which is error prone and shall be
avoided when we strive to switch to Kconfig.

The goal of this patch:

Provide distinction for DM_SPI support in both U-Boot proper and SPL (TPL).
Valid use case is when U-Boot proper wants to use DM_SPI, but SPL must
still support non DM driver.

Another use case is the conversion of non DM/DTS SPI driver to support
DM/DTS. When such driver needs to work in both SPL and U-Boot proper, the
distinction is needed in Kconfig (also if SPL version of the driver
supports OF_PLATDATA).

In the end of the day one would have to support following use cases (in
single driver file - e.g. mxs_spi.c):

- U-Boot proper driver supporting DT/DTS
- U-Boot proper driver without DT/DTS support (deprecated)
- SPL driver without DT/DTS support
- SPL (and TPL) driver with DT/DTS (when the SoC has enough resources to
  run full blown DT/DTS)
- SPL driver with DT/DTS and SPL_OF_PLATDATA (when one have constrained
  environment with no fitImage and OF_LIBFDT support).

Some boards do require SPI support (with DM) in SPL (TPL) and some only
have DM_SPI{_FLASH} defined to allow compiling SPL.

This patch converts #ifdef CONFIG_DM_SPI* to #if CONFIG_IS_ENABLED(DM_SPI)
and provides corresponding defines in Kconfig.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Tested-by: Adam Ford <aford173@gmail.com> #da850-evm
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
[trini: Fixup a few platforms]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-29 13:34:43 -04:00
Jagan Teki
c862b91d93 mtd: sf: Drop plat from sf_probe
dm_spi_slave_platdata used in sf_probe for printing
plat->cs value and there is no relevant usage apart
from this.

We have enough debug messages available in SPI and SF
areas so drop this plat get and associated bug statement.

Cc: Simon Glass <sjg@chromium.org>
Cc: Vignesh R <vigneshr@ti.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-01 17:55:24 +05:30
Jagan Teki
46e4cdff1e mtd: spi: Call sst_write in _write ops
Currently spi-nor code is assigning _write ops for SST
and other flashes separately. 

Just call the sst_write from generic write ops and return
if SST flash found, this way it avoids the confusion of
multiple write ops assignment during the scan and makes
it more feasible for code readability.

No functionality changes.

Cc: Simon Glass <sjg@chromium.org>
Cc: Vignesh R <vigneshr@ti.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-01 17:55:24 +05:30
Jagan Teki
f12f96cfaf sf: Drop spl_flash_get_sw_write_prot
The get_sw_write_prot API is used to get the write-protected
bits of flash by reading the status register and other wards
it's API for reading register bits.

1) This kind of requirement can be achieved using existing
   flash operations and flash locking API calls instead of
   making a separate flash API.
2) Technically there is no real hardware user for this API to
   use in the source tree.
3) Having a flash operations API for simple register read bits
   also make difficult to extend the flash operations.
4) Instead of touching generic code, it is possible to have
   this functionality inside spinor operations in the form of
   flash hooks or fixups for associated flash chips.

Considering all these points, this patch drops the get_sw_write_prot
and associated code bases.

Cc: Simon Glass <sjg@chromium.org>
Cc: Vignesh R <vigneshr@ti.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-01 17:55:24 +05:30
Jagan Teki
3ee152b965 mtd: spi: Use CONFIG_IS_ENABLED to prevent ifdef
Use CONFIG_IS_ENABLED to prevent ifdef in sf_probe.c

Cc: Simon Glass <sjg@chromium.org>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-01 17:55:24 +05:30
Simon Glass
cd93d625fd common: Drop linux/bitops.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
c05ed00afb common: Drop linux/delay.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
f7ae49fc4f common: Drop log.h from common header
Move this header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:18 -04:00
Simon Glass
b79fdc7697 common: Drop flash.h from common header
Move this uncommon header out of the common header.

Fix up some style problems in flash.h while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 14:53:28 -04:00
Ye Li
8af1caa237 sf: Add Macronix MX25R6435F SPI NOR flash to flash parameters array
On i.mx7ulp EVK board, we use MX25R6435F NOR flash, add its parameters
and IDs to flash parameter array. Otherwise, the flash probe will fails.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-11 01:30:49 +05:30
Dario Binacchi
1fbfe58df6 spi: fix dev parameter in dev_* calls
Probably the non-use of the device parameter by the print routines did
not generate compilation errors.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-05-11 01:30:49 +05:30
Kuldeep Singh
685465fbba mtd: spi-nor-ids: Add Spansion s25fs512s flash entry
Spansion "s25fs512s" flash is incorrectly decoded as "s25fl512s" on
various platforms as former is not present. Add the entry.

Linux already has both the flashes present. A snippet below:
{ "s25fl512s",  INFO6(0x010220, 0x4d0080, 256 * 1024, 256...},
{ "s25fs512s",  INFO6(0x010220, 0x4d0081, 256 * 1024, 256...},

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-04-30 22:34:20 +05:30
Jagan Teki
a976238de3 mtd: spi-nor-ids: Enable 4B_OPCODES for is25wp256
IS25WP256 flash chips do support 4byte address opcodes,
so enable support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Sagar Kadam <sagar.kadam@sifive.com>
2020-04-30 22:34:20 +05:30
Jagan Teki
5bf3f3dd11 mtd: spi-nor: Enable QE bit for ISSI flash
Enable QE bit for ISSI flash chips.

QE enablement logic is similar to what Macronix
has, so reuse the existing code itself.

Cc: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-04-30 22:34:20 +05:30
Bacem Daassi
6f3b1f4a1d mtd: spi-nor: Enable dual and quad read for s25fl256s0
The s25fl256s0 supports dual and quad read like s25fl256s1.
Enable it by adding SPI_NOR_DUAL_READ and SPI_NOR_QUAD_READ
flags to the flash_info entry.
Tested on real silicon and confirmed to be working.

Signed-off-by: Bacem Daassi <Bacem.Daassi@cypress.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-04-29 01:44:35 +05:30
Kuldeep Singh
cae3c7cc58 mtd: spi-nor-ids: Enable SPI_NOR_OCTAL_READ flag for mt35xu*
Commit 658df8bd94 ("mtd: spi-nor-core: Add octal mode support")
enables octal mode(1-1-8) support in spi-nor framework.

mt35xu512aba and mt35xu02g supports SINGLE and OCTAL I/O. Hence, enable
SPI_NOR_OCTAL_READ flag for these flashes.

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-04-29 01:44:35 +05:30
Rasmus Villemoes
7ddea75654 spi: use is_power_of_2 instead of hweight32 in spi_nor_write()
hweight32 is a somewhat expensive way to check for power-of-2. Use the
is_power_of_2 helper, which does the standard and cheap idiom
foo&(foo-1)==0.

add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-96 (-96)
Function                                     old     new   delta
spi_nor_write                                388     292     -96

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Acked-by: Vignesh Raghavendra <vigneshr@ti.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2020-04-29 01:44:35 +05:30
Tom Warren
808e19362f mtd: spi: Add Macronix MX25U3235F device
Add Macronix MX25U3235F flash device description.
This is a 4MiB part.

Signed-off-by: Tom Warren <twarren@nvidia.com>
2020-04-02 14:30:02 -07:00
Simon Glass
336d4615f8 dm: core: Create a new header file for 'compat' features
At present dm/device.h includes the linux-compatible features. This
requires including linux/compat.h which in turn includes a lot of headers.
One of these is malloc.h which we thus end up including in every file in
U-Boot. Apart from the inefficiency of this, it is problematic for sandbox
which needs to use the system malloc() in some files.

Move the compatibility features into a separate header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05 19:33:46 -07:00
Simon Glass
61b29b8268 dm: core: Require users of devres to include the header
At present devres.h is included in all files that include dm.h but few
make use of it. Also this pulls in linux/compat which adds several more
headers. Drop the automatic inclusion and require files to include devres
themselves. This provides a good indication of which files use devres.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-02-05 19:33:46 -07:00
Vignesh Raghavendra
658df8bd94 mtd: spi-nor-core: Add octal mode support
Add support for Octal flash devices. Octal flash devices use 8 IO lines
for data transfer. Currently only 1-1-8 Octal Read mode is supported.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-27 22:27:22 +05:30
Simon Glass
db41d65a97 common: Move hang() to the same header as panic()
At present panic() is in the vsprintf.h header file. That does not seem
like an obvious choice for hang(), even though it relates to panic(). So
let's put hang() in its own header.

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Migrate a few more files]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-01-17 17:53:40 -05:00
Tom Rini
ac0f978afd First set of u-boot-atmel features for 2020.04 cycle
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Merge tag 'u-boot-atmel-2020.04-a' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel

First set of u-boot-atmel features for 2020.04 cycle

This feature set is a patch series from Tudor Ambarus which includes
parsing of the spi flash SFDP parser for SST flashes, and using those
tables to retrieve unique saved per device MAC address. This is then
used as base mac address on the SAMA5D2 Wireless SOM EK board.
2020-01-07 08:44:56 -05:00
Tom Rini
5a8fa095cb Merge branch 'next'
Bring in the following merges:

commit 8fbbec12f7
Merge: 87f69f467a 63618e71e8
Author: Tom Rini <trini@konsulko.com>
Date:   Fri Jan 3 09:48:47 2020 -0500

    Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq into next

    - updates and fixes on ls1028a, lx2, ls1046a, MC-DPSPARSER support

commit 87f69f467a
Merge: c0912f9bbf 4466b99703
Author: Tom Rini <trini@konsulko.com>
Date:   Tue Dec 24 08:18:19 2019 -0500

    Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xx into next

    - Enable DM driver on ppc/km boards
    - Enable DM_USB for some of NXP powerpc platforms: P5040, T4240, T208x,
      T104x, P4080, P2041, P2020, P1020, P3041
    - Some updates in mpc85xx-ddr driver, km boards

commit c0912f9bbf
Merge: 533c9f5714 a1d6dc3f84
Author: Tom Rini <trini@konsulko.com>
Date:   Wed Dec 18 07:20:19 2019 -0500

    Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-x86 into next

    - Various x86 common codes updated for TPL/SPL
    - I2C designware driver updated for PCI
    - ICH SPI driver updated to support Apollo Lake
    - Add Intel FSP2 base support
    - Intel Apollo Lake platform specific drivers support
    - Add a new board Google Chromebook Coral

commit 533c9f5714
Merge: 553cb06887 033e18b47b
Author: Tom Rini <trini@konsulko.com>
Date:   Tue Dec 17 07:53:08 2019 -0500

    Merge tag '20191217-for-next' of https://gitlab.denx.de/u-boot/custodians/u-boot-i2c into next

    i2c: for next
    - misc: i2c_eeprom:
      Add partition support and add ability to query size
      of eeprom device and partitions
    - i2c common:
      add support for offset overflow in to address and add
      sandbox tests for it.

commit 553cb06887
Merge: f39abbbc53 b4f98b3b16
Author: Tom Rini <trini@konsulko.com>
Date:   Thu Dec 12 08:18:59 2019 -0500

    Merge tag 'dm-next-13dec19' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm into next

    buildman improvements including toolchain environment feature
    sandbox unicode support in serial
2020-01-06 17:07:49 -05:00
Vignesh Raghavendra
cb56caacf8 mtd: spi-nor-core: Fix static checker warnings
Static checker warns 'ret' variable may be used uninitialized in
spi_nor_erase() and spi_nor_write() in case of zero length requests.
Fix these warnings by checking for zero length requests and returning
early.

Reported-by: Dan Murphy <dmurphy@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2019-12-27 17:47:26 +05:30
Peter Robinson
864d66431a mtd: spi-nor: ids: Add GigaDevice gd25q128
Add gd25q128 128Mbit chip to spi-nor id table.

Tested on Pinebook Pro

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Acked-by: Vignesh Raghavendra <vigneshr@ti.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> # roc-rk3399-pc
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-12-18 20:05:40 +05:30
Tudor Ambarus
a11c081da3 mtd: spi: spi-nor-core: Add SST vendor specific SFDP parser
JESD216 allow vendors to define their own SFDP tables.

Add SST SFDP parser. The vendor table is allocated using resource-managed
kmalloc - the table will be freed on driver detach. It will be accessible
by getting the UCLASS_SPI_FLASH's private data.

The SST's SFDP table is particularly of interest because contains
pre-programmed globally unique EUI-48 and EUI-64 identifiers.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
2019-12-17 09:49:05 +02:00
Simon Glass
4806fcea1a mtd: spi: Export spi_flash_std_probe()
With of-platdata we need to create drivers for particular chips, or at
least drivers that are separate from the standard code, since C structures
are created by dtoc which are private to that driver.

To avoid duplicating the probing code, export this probe function for use
by these drivers.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15 11:44:24 +08:00
Miquel Raynal
85f7e9d547 mtd: spi: SPI_FLASH_MTD depends on MTD
It is already the case that all defconfigs with SPI_FLASH_MTD also
declare using MTD, but let's make this consistent and enforce it in
Kconfig. Most of the time SPI_FLASH_MTD is used in conjunction with
UBI, which already depends on MTD.

Suggested-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-12-04 17:10:51 -05:00
Simon Glass
1eb69ae498 common: Move ARM cache operations out of common.h
These functions are CPU-related and do not use driver model. Move them to
cpu_func.h

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:24:58 -05:00
Fabio Estevam
395ec74186 spi-nor-ids: Add support for Adesto AT25SL321
Add an entry for the Adesto AT25SL321 SPI NOR chip.

This SPI NOR chip is found in the Embedded Artist i.MX7ULP COM board.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-10-25 00:48:32 +05:30
Frieder Schrempf
832ce20278 mtd: spi: Clean up usage of CONFIG_SPI_FLASH_MTD
Most boards currently use SPI_FLASH_MTD only in U-Boot proper, not in
SPL. They often rely on hacks in the board header files to include
this option conditionally. To be able to fix this, we previously
introduced a separate option SPL_SPI_FLASH_MTD.

Therefore we can now adjust the Makefile and change the code in
sf_probe.c and sf_internal.h to use CONFIG_IS_ENABLED(SPI_FLASH_MTD).

We also need to move all occurences of CONFIG_SPI_FLASH_MTD from the
header files to the according defconfigs. The affected boards are
socfpga, aristainetos, cm_fx6, display5, ventana, rcar-gen2, dh_imx6
and da850evm.

We do this all in one patch to guarantee bisectibility.

This change was tested with buildman to make sure it does not
introduce any regressions by comparing the resulting binary sizes.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-10-25 00:48:32 +05:30
Vignesh Raghavendra
73d74b5881 spi-nor: spi-nor-ids: Add USE_FSR flag for mt25q* and n25q* entry
n25q* and mt25q* (both 256Mb and 512Mb) flashes support Flag status
register that indicates various errors that may be encountered during
erase/write operations. Therefore add USE_FSR flag wherever missing.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-10-25 00:48:32 +05:30
Vignesh Raghavendra
8651593a8c spi-nor: spi-nor-ids: Add entries for mt25q variants
mt25q* flashes support stateless 4 byte addressing opcodes. Add entries
for the same. These flashes have bit 6 set in 5th byte of READ ID
response when compared to n25q* variants.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-10-25 00:48:32 +05:30
Vignesh Raghavendra
d66e07cdf9 spi-nor: spi-nor-ids: Disable SPI_NOR_4B_OPCODES for n25q512* and n25q256*
Per datasheets of n25q256* and n25q512* not all variants of n25q256* and
n25q512* support 4 Byte stateless addressing opcodes. Therefore drop
SPI_NOR_4B_OPCODES flag from these entries

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-10-25 00:48:32 +05:30
Vignesh Raghavendra
2a2174d3da mtd: spi-nor-core: Replace MTD_SPI_NOR_USE_4K_SECTORS with SPI_FLASH_USE_4K_SECTORS
U-Boot uses CONFIG_SPI_FLASH_USE_4K_SECTORS to enable 4K small sector
support. Use that instead of MTD_SPI_NOR_USE_4K_SECTORS.

Reported-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-10-25 00:48:32 +05:30
Vignesh Raghavendra
cc9118757f mtd: spi-nor-core: Use dev_err for reporting erase/write failures
Use dev_err() when reporting reason for erase/write failures so that
users can be made aware of the reason for failure.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-10-25 00:48:32 +05:30
Frieder Schrempf
64f736c901 mtd: spi: Add a new option SPL_SPI_FLASH_MTD to Kconfig
To allow SPI_FLASH_MTD being enabled separately in SPL we add a new
option. The only user currently is the stm32mp15_basic board.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Acked-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-10-25 00:48:31 +05:30
Jagan Teki
77df1a9b66 mtd: spi: Kconfig: Imply SPI_FLASH if DM_SPI_FLASH
DM_SPI_FLASH should require spi flash interface code for dm
version, so imply SPI_FLASH core by default if any board
enabled DM_SPI_FLASH.

This overcome the explicit enablement of CONFIG_SPI_FLASH on
respective boards when DM_SPI_FLASH being used.

Acked-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-10-25 00:48:31 +05:30
Jagan Teki
97009d543d mtd: spi-nor: ids: Add is25wp256 chip
Add is25wp256, chip to spi-nor id table.

Tested on SiFive FU540 board.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-25 00:48:31 +05:30
Jagan Teki
989fd97fe5 mtd: spi: Kconfig: Update CONFIG_SPI_FLASH
1) CONFIG_SPI_FLASH is not just a legacy code, but it has common
   core code which handle both dm and non-dm spi flash code. So
   fix the info text to make it clear globally.

2) Since it's flash core it shouldn't depends on legacy SPI,
   so remove the 'depends on SPI'

Cc: Vignesh R <vigneshr@ti.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-10-25 00:42:57 +05:30
Simon Glass
27084c03d3 spl: Allow tiny printf() to be controlled in SPL and TPL
At present there is only one control for this and it is used for both SPL
and TPL. But SPL might have a lot more space than TPL so the extra cost of
a full printf() might be acceptable.

Split the option into two, providing separate SPL and TPL controls. The
TPL setting defaults to the same as SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-08 13:57:45 +08:00
Eugeniy Paltsev
718fd834c0 mtd: spi-nor: enable protection ops for SST26 flash series
Commit c4e8862308 (mtd: spi: Switch to new SPI NOR framework)
performs switch from previous 'spi_flash' infrastructure without
proper testing/investigations which results in a regressions for
SST26 flash series.

Enable protection ops for SST26 flash series which were
previously enabled by
Commit 3d4fed87a5 (mtd: sf: Add support of sst26wf* flash ICs
protection ops)

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-09-16 08:09:22 +05:30
Eugeniy Paltsev
e0cacdcc0a mtd: spi-nor: add missing SST26* flash IC protection ops
Commit c4e8862308 (mtd: spi: Switch to new SPI NOR framework)
performs switch from previous 'spi_flash' infrastructure without
proper testing/investigations which results in a regressions for
SST26 flash series.

Add missing SST26* flash IC protection ops which were introduced
previously by
Commit 3d4fed87a5 (mtd: sf: Add support of sst26wf* flash ICs
protection ops)

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-09-16 08:09:22 +05:30
Jagan Teki
210d8ad0fa mtd: spi: Drop sf.c
spi_write_then_read, will manage to do the respective
spi_xfer based on the tx_buf, rx_buf so drop the
legacy spi_flash_read/write/cm code.

Tested-by: Adam Ford <aford173@gmail.com> #da850-evm
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-09-16 08:09:22 +05:30
Jagan Teki
43084a56b0 mtd: spi_dataflash: Use spi read then write
Now, we have spi_write_then_read routine that would handle
spi_xfer handling based on the tx_buf and rx_buf parameters.

So, replace individual flash read/write/cmd transfer call
with spi_write_then_read.

Cc: Egnite GmbH <info@egnite.de>
Cc: Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
Cc: Ilko Iliev <iliev@ronetix.at>
Cc: Marek Vasut <marex@denx.de>
Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Cc: Alison Wang <alison.wang@nxp.com>
Tested-by: Adam Ford <aford173@gmail.com> #da850-evm
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-09-16 08:09:22 +05:30
Ashish Kumar
9454fee460 mtd: spi: Add micron mt35xu512aba and mt35xu02g flash ID
mt35xu512aba and mt35xu02g suports Single I/O and OCTAL I/O
also enable use of SPI_NOR_4B_OPCODES.

These flashes are tested on LX2160ARDB and LS1028ARDB respectively

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
[jagan: suffix 'ba' on part name and update commit message]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-22 16:57:23 +05:30
Ashish Kumar
8385520f29 mtd: spi: Add flash property for Micron mt25qu512a
mt25qu512a is rebranded after its spinoff from STM, so it is
different only in term of extended jedec ID, initial JEDEC id
is same as that of n25q512a.In order to avoid any confussion
with respect to name new entry is added.

This flash is tested for Single I/O mode on LS1046FRWY although
it also support QUAD I/O.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-18 17:11:16 +05:30
Weijie Gao
60e2bf4678 mtd: spi-nor: fix page program issue when using spi-mem driver
Some SPI controllers can't write nor->page_size bytes in a single step
because their TX FIFO is too small, but when that happens we should
make sure a WRITE_EN command before each write access and READ_SR command
after each write access is issued.

We should allow nor->write() to return a size that is smaller than the
requested write size to gracefully handle this case.

Also, the spi_nor_write_data() should return the actual number of bytes
that were written during the spi_mem_exec_op() operation.

This patch is a combination of two commits backported from kernel:

  commit 630d6bd8a3b4 ("mtd: spi-nor: Support controllers with limit ...")
  commit 3baa8ec88c2f ("mtd: devices: m25p80: Make sure WRITE_EN is ...")

Cc: Vignesh R <vigneshr@ti.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Acked-by: Vignesh R <vigneshr@ti.com>
Tested-by: Shyam Saini <shyam.saini@amarulasolutions.com> # microzed
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-05-03 15:26:12 +05:30
Neil Armstrong
30b9a28a3f mtd: spi-nor-ids: Add Gigadevice gd25lq128 ID
This adds support for the Gigadevice gd25lq128 ID needed on the
upcoming libretech-ac board.

SPI_NOR_QUAD_READ is not set since it has not been tested in Quad
mode.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-12 18:41:33 +05:30
Patrick Delaunay
b0cc1b846f dm: spi: Read default speed and mode values from DT
This patch update the behavior introduced by
commit 96907c0fe5 ("dm: spi: Read default speed and mode values from DT")

In case of DT boot, don't read default speed and mode for SPI from
CONFIG_* but instead read from DT node. This will make sure that boards
with multiple SPI/QSPI controllers can be probed at different
bus frequencies and SPI modes.

Remove also use in boards of the value speed=0 (no more supported)
for ENV in SPI by using CONFIG_ENV_SPI_MAX_HZ=0.

DT values will be always used when available (full DM support of
SPI slave with available DT node) even if speed and mode are requested;
for example in splash screen support (in splash_sf_read_raw)
or in SPL boot (in spl_spi_load_image).
The caller of spi_get_bus_and_cs() no more need to force speed=0.

But the current behavior don't change if the SPI slave is not
present (device with generic driver is created automatically)
or if platdata is used (CONFIG_OF_PLATDATA).

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-12 11:54:50 +05:30
Marek Vasut
f909ddb3e1 mtd: spi: Replace ad-hoc default implementation with spi_mem_op
Replace the ad-hoc erase operation implementation with a simple spi_mem_op
implementation of the same functionality. This is a minor optimization and
removal of the ad-hoc code.

This however also changes the behavior of the execution of the erase
opcode from two separate transfer requests to the SPI NOR driver to
one transfer request to the SPI NOR driver. The former was how U-Boot
behaved before the SPI NOR framework was imported and the later was
introduced by the SPI NOR framework. The former is more optimal, so
keep that.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Horatiu Vultur <horatiu.vultur@microchip.com>
Cc: Jagan Teki <jagan@openedev.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Vignesh R <vigneshr@ti.com>
Tested-by: Ashish Kumar <Ashish.kumar@nxp.com>
2019-04-12 11:42:48 +05:30
Marek Vasut
3d2f12c4a1 mtd: spi: Add Macronix MX66U2G45F device
Add Macronix MX66U2G45F flash device description.
This is a 256 MiB part.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Vignesh R <vigneshr@ti.com>
[jagan: use 'g' instead of 'f' in flash name]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-12 10:56:25 +05:30
Neil Armstrong
cd35365762 mtd: sf_probe: remove spi-flash compatible
Now the "spi-flash" compatible has been removed in the DTS files,
remove this compatible from sf_probe to finally use the Linux "jedec,spi-nor"
compatible.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2019-04-12 10:54:27 +05:30
Heiko Schocher
a2dc8b1832 mtd: add spi flash id s25fl064l
Add support for SPANSION s25fl064l

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Acked-by: Vignesh R <vigneshr@ti.com>
2019-04-12 10:54:27 +05:30
Patrick Delaunay
14453fbfad Convert CONFIG_SF_DEFAULT_* to Kconfig
This converts the following to Kconfig:
  CONFIG_SF_DEFAULT_BUS
  CONFIG_SF_DEFAULT_CS
  CONFIG_SF_DEFAULT_MODE
  CONFIG_SF_DEFAULT_SPEED

I use moveconfig script and then manual check on generated u-boot.cfg
to solve the remaining issue.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-03-25 17:36:53 -04:00
Vignesh R
778572d7cb mtd: spi: Add lightweight SPI flash stack for SPL
Add a tiny SPI flash stack that just supports reading data/images from
SPI flash. This is useful for boards that have SPL size constraints and
would need to use SPI flash framework just to read images/data from
flash. There is approximately 1.5 to 2KB savings with this.

Based on prior work of reducing spi flash id table by
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>

Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07 15:33:21 +05:30
Vignesh R
5b66fdb29d mtd: spi: Remove unused files
spi_flash and spi_flash_ids are no longer needed after SPI NOR
migration. Remove them.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07 15:33:21 +05:30
Vignesh R
c4e8862308 mtd: spi: Switch to new SPI NOR framework
Switch spi_flash_* interfaces to call into new SPI NOR framework via MTD
layer. Fix up sf_dataflash to work in legacy way. And update sandbox to
use new interfaces/definitions

Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07 15:33:21 +05:30
Vignesh R
2ee6705be0 mtd: spi: sf_probe: Add "jedec, spi-nor" compatible string
Linux uses "jedec,spi-nor" as compatible string for JEDEC compatible
SPI Flash device nodes. Therefore make U-Boot also to look for the same
compatible string so that we can use Linux DTS files as is.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07 15:33:21 +05:30
Vignesh R
8c927809ea mtd: spi: spi-nor-core: Add back U-Boot specific features
For legacy reasons, we will have to keep around U-Boot specific
SPI_FLASH_BAR and SPI_TX_BYTE. Add them back to the new framework

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07 15:33:21 +05:30
Vignesh R
0c6f187cdb mtd: spi: spi-nor-core: Add SFDP support
Sync Serial Flash Discoverable Parameters (SFDP) parsing support from
Linux. This allows auto detection and configuration of Flash parameters.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07 15:33:21 +05:30
Vignesh R
61059bc55a mtd: spi: spi-nor-core: Add 4 Byte addressing support
Sync changes from Linux SPI NOR framework to add 4 byte addressing
support. This is required in order to support flashes like MT35x
that no longer support legacy Bank Address Register(BAR) way of accessing
>16MB region.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07 15:33:21 +05:30
Vignesh R
492e65b29b mtd: spi: spi-nor-core: Add SPI MEM support
Many SPI controllers have special MMIO interfaces which provide
accelerated read/write access but require knowledge of flash parameters
to make use of it. Recent spi-mem layer provides a way to support such
controllers.
Therefore, add spi-mem support to spi-nor-core as a way to support SPI
controllers with MMIO interface. SPI MEM layer takes care of translating
spi_mem_ops to spi_xfer()s in case of legacy SPI controllers.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07 15:33:21 +05:30
Vignesh R
7aeedac015 mtd: spi: Port SPI NOR framework from Linux
Current U-Boot SPI NOR support (sf layer) is quite outdated as it does not
support 4 byte addressing opcodes, SFDP table parsing and different types of
quad mode enable sequences. Many newer flashes no longer support BANK
registers used by sf layer to a access >16MB of flash address space.
So, sync SPI NOR framework from Linux v4.19 that supports all the
above features. Start with basic sync up that brings in basic framework
subsequent commits will bring in more features.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07 15:33:21 +05:30
Tom Rini
9450ab2ba8 Merge branch 'master' of git://git.denx.de/u-boot-spi
- Various MTD fixes from Boris
- Zap various unused / legacy paths.
- pxa3xx NAND update from Miquel

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-12-05 15:06:24 -05:00
Boris Brezillon
08898e8b22 mtd: sf: Make sf_mtd.c more robust
SPI flash based MTD devs can be registered/unregistered at any time
through the sf probe command or the spi_flash_free() function.

This commit does not try to fix the root cause as it would probably
require rewriting most of the code and have an mtd_info object
instance per spi_flash object (not to mention that the the spi-flash
layer is likely to be replaced by a spi-nor layer ported from Linux).

Instead, we try to be as safe as can be by checking the code returned
by del_mtd_device() and complain loudly when there's nothing we can
do about the deregistration failure. When that happens we also reset
sf_mtd_info.priv to NULL, and check for NULL pointer in the mtd hooks
so that -ENODEV is returned instead of hitting a NULL pointer
dereference exception when the MTD instance is later accessed by a user.

Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Heiko Schocher <hs@denx.de>
2018-12-06 00:45:36 +05:30
Boris Brezillon
7371944a71 mtd: sf: Unregister the MTD device prior to removing the spi_flash obj
The DM implementation of spi_flash_free() does not unregister the MTD
device before removing the spi dev object. This leads to a use-after-free
bug when the MTD device is later accessed by a MTD user (observed when
attaching the device to UBI after env_sf_load() has called
spi_flash_free()).

Implement ->remove() and call spi_flash_mtd_unregister() from there.

Fixes: 9fe6d8716e ("mtd, spi: Add MTD layer driver")
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-12-06 00:45:36 +05:30
Boris Brezillon
492151b209 mtd: sf: Make sure we don't register the same device twice
spi_flash_mtd_register() can be called several times and each time it
will register the same mtd_info instance like if it was a new one.
The MTD ID allocation gets crazy when that happens, so let's track the
status of the sf_mtd_info object to avoid that.

Fixes: 9fe6d8716e ("mtd, spi: Add MTD layer driver")
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-12-06 00:45:36 +05:30
Simon Glass
a58986ca8b sf: Add a method to obtain the block-protect setting
It is useful to obtain the block-protect setting of the SPI flash, so we
know whether it is fully open or (perhaps partially) write-protected. Add
a method for this. Update the sandbox driver to process this operation and
add a test.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-20 19:14:22 -07:00
Tom Rini
e6cd05e502 Merge branch 'master' of git://git.denx.de/u-boot-spi 2018-10-12 11:54:13 -04:00
Ashish Kumar
5c391486b4 sf: Add MICRON manufacturer id
NOR flash name MT35X_QLKA and MT25Q_** used on NXP board has
manufacturer id as 0x2C, which are rather for newer flashes
after the split of Micron from ST.

So macro for this micron manufacturer id.

Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
[jagan: updated commit message]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-10-12 11:37:49 +05:30
Simon Glass
5e24a2ef8b dm: spi: Add logging of some return values
When SPI flash operations fail it is helpful to be able to see the error
codes and where they are generated. Add logging to capture this
information for read operations.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
97f57109bb sf: Avoid allocating memory on every read operation
At present spi_flash_cmd_read_ops() allocates and frees a few bytes of
memory every time it is called. It is faster to use the stack for this
and this is now supported by the minimum GCC version required by U-Boot.

Remove the allocation and use a variable-sized array instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
66613f5dd2 dm: spi: Clean up detection of sandbox SPI emulator
Now that we don't have to deal with the command-line flag we can simplify
the code for detecting the emulator. Remove the lookup based on the SPI
specification, relying just on the device tree to locate the emulator.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
c3aed5db59 sandbox: spi: Add more logging
Add logging to aid debugging features in these drivers. Also drop some
code in sandbox_spi_xfer() which is not used.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
1289e96797 sandbox: spi: Drop command-line SPI option
At present we support specifying SPI flash devices to use in the device
tree and on the command line. Drop the second option, since it is a pain
to support nicely with driver model, and unnecessary.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:26 -06:00
Stefan Roese
881e4fc206 sf: Add XMC xm25qh64a and xm25qh128a entries
This patch adds support for 2 new XMC (Wuhan Xinxin Semiconductor
Manufacturing Corp) SPI NOR chips.

This support can be enabled by selecting the SPI_FLASH_XMC Kconfig
option.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-10-04 18:21:23 +05:30
Michal Simek
13f451bf56 spi: Kconfig: Create ISSI Kconfig entry
Add ISSI to Kconfig to make it selectable via menuconfig.
Also convert all current platforms.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-08-06 08:44:35 +02:00
Clément Laigle
04d57b1d58 mtd: add spi flash id s25fl128l
Add support for SPANSION s25fl128l

Signed-off-by: Clément Laigle <c.laigle@catie.fr>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
[jagan: fixed , at the end of } ]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-08-03 11:09:53 +05:30
Ludwig Zenz
51b2411946 sf: add paired dev info for winbond w25q16jv
This commit adds paired dev info for winbond w25q16jv
(tested w25q16jvssiq with a i.mx6 board)

Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-07-16 14:17:13 +05:30
Ludwig Zenz
70cff76c38 sf: add Macronix mx25l1633e entry
Add support for the Macronix mx25l1633e nor flash. (Tested on a imx6 board)

Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-07-16 14:14:42 +05:30
Ludwig Zenz
b1360e2fc9 sf: add Gigadevice gd25q16c entry
Add support for the Gigadevice gd25q16c nor flash. (Tested on a imx6 board)

Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-07-16 14:14:42 +05:30
Hannes Schmelzer
760b75564f spi_flash: add a bunch of winbond flashes to id-table
This commit adds the following flashes to the id-table

- W25Q16JV
- W25Q32JV
- W25Q64JV
- W25Q128JV
- W25Q256JV

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-07-16 14:05:50 +05:30
Simon Glass
008dcddf99 dm: spi: Update sandbox SPI emulation driver to use ofnode
Update the parameters sandbox_sf_bind_emul to support livetree.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-07-09 09:11:00 -06:00
Marek Vasut
069b746ad9 sf: Enable FSR polling on N25Q256(A)
The N25Q256(A) datasheet clearly states that this device does have
a Flag Status Register and does update FSR PEC bit 7 during Program
and Erase cycles to indicate the cycle is in progress. Enable the
FSR PEC bit polling on this device to prevent data corruption.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Jagan Teki <jagan@openedev.com>
Cc: Tom Rini <trini@konsulko.com>
2018-06-28 19:58:40 +05:30
Ashish Kumar
51dce7d2bf mtd: spi: Correct parameters for s25fs512s flash
Change sector size to 256KiB in table spi_flash_ids.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-06-25 15:50:33 +05:30
Simon Glass
fb95283931 spi: sandbox: Fix memory leak in sandbox_sf_bind_emul()
Move the strdup() call so that it is only done when we know we will bind
the device.

Reported-by: Coverity (CID: 131216)

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-06-19 07:31:44 -04:00
Carlo Caione
b1f2b72e39 sf: Add support for gd25q32b gigadevice flash
This flash IC is used in some chromebook models
manufactured by Bitland.

Signed-off-by: Carlo Caione <carlo@endlessm.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-06-04 23:40:04 +05:30
Marek Vasut
8ff4130deb sf: Set current flash bank to 0 in clean_bar()
The clean_bar() function resets the SPI NOR BAR register to 0, but
does not set the flash->curr_bar to 0 , therefore those two can get
out of sync, which could ultimatelly result in corrupted flash content.

The simplest test case is this:

  => mw 0x10000000 0x1234abcd 0x4000
  => sf probe
  => sf erase 0x1000000 0x10000
  => sf write 0x10000000 0x1000000 0x10000

  => sf probe ; sf read 0x12000000 0 0x10000 ; md 0x12000000

That is, erase a sector above the 16 MiB boundary and write it with
random pre-configured data. What will actually happen without this
patch is the sector will be erased, but the data will be written to
BAR 0 offset 0x0 in the flash.

This is because the erase command will call write_bar()+clean_bar(),
which will leave flash->bank_curr = 1 while the hardware BAR registers
will be set to 0 through clean_bar(). The subsequent write will also
trigger write_bar()+clean_bar(), but write_bar checks if the target
bank == flash->bank_curr and if so, does NOT reconfigure the BAR in
the SPI NOR. Since flash->bank_curr is still 1 and out of sync with
the HW, the condition matches, BAR programming is skipped and write
ends up at address 0x0, thus corrupting flash content.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-06-04 23:31:37 +05:30
Marek Vasut
a2569f12f0 sf: Add Macronix MX25U25635F ID
Add ID for the Macronix MX25U25635F flash.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-29 10:05:52 +05:30
Marek Vasut
d8c16849a9 sf: Add Winbond W25Q256 ID
Add ID for the Winbond W25Q256 flash.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-29 10:05:32 +05:30
Ashish Kumar
4eaa2fa169 sf: Default page size Spansion flash "S25FS512S" is 256b
page size for JEDEC EXT starting 0x4d00 is 512b,
except JEDEC ID 0x215, 0x216 and 0x220

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
[jagan: added proper commit message]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16 18:56:49 +05:30
Kimmo Rautkoski
39b9e9bc72 sf: Add support for ISSI is25wp
Added support for is25wp032, is25wp064 and is25wp128.

Signed-off-by: Kimmo Rautkoski <ext-kimmo.rautkoski@vaisala.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16 18:50:25 +05:30
Tom Rini
83d290c56f SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 09:34:12 -04:00
Tom Rini
d024236e5a Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR
We have a large number of places where while we historically referenced
gd in the code we no longer do, as well as cases where the code added
that line "just in case" during development and never dropped it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-27 14:54:48 -04:00
Sean Nyekjaer
4d95ed39a1 sf: Add Spansion s25fl208k entry
Add entry for Spansion s25fl208k part.

Signed-off-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-04-19 16:57:19 +05:30
Eugeniy Paltsev
a19e97157c mtd: sf: add support for sst26wf016, sst26wf032, sst26wf064
This commit adds support for the SST sst26wf016, sst26wf032
and sst26wf064 flash IC.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-04-19 16:54:25 +05:30
Eugeniy Paltsev
3d4fed87a5 mtd: sf: Add support of sst26wf* flash ICs protection ops
sst26wf flash series block protection implementation differs
from other SST series, so add specific implementation
flash_lock/flash_unlock/flash_is_locked functions for sst26wf
flash ICs.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2018-04-19 16:54:01 +05:30
Liam Beguin
aa1ced7f09 spi: spi_flash: do not fail silently on bad user input
Make sure the user is notified instead of silently returning an error.

Signed-off-by: Liam Beguin <liambeguin@gmail.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2018-03-22 13:25:20 -04:00
Jagan Teki
c2a7a7ef86 arm: sunxi: Move spl spi sunxi code to mach-sunxi
This SUNXI variant SPL SPI code doesn't use either SPI or
SPL_FLASG subsystems due to size constraints and also placing
this code in drivers/mtd/spi will unnecessary build SPI_FLASH
code(if defined) which never required, hence moved to arch area.

And also renamed the file according to kconfig which resembles
proper name.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-03-13 19:50:10 +05:30
Masahiro Yamada
b08c8c4870 libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h>
Thomas reported U-Boot failed to build host tools if libfdt-devel
package is installed because tools include libfdt headers from
/usr/include/ instead of using internal ones.

This commit moves the header code:
  include/libfdt.h         -> include/linux/libfdt.h
  include/libfdt_env.h     -> include/linux/libfdt_env.h

and replaces include directives:
  #include <libfdt.h>      -> #include <linux/libfdt.h>
  #include <libfdt_env.h>  -> #include <linux/libfdt_env.h>

Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-03-05 10:16:28 -05:00
Marek Vasut
0a84925974 sf: Add ISSI IS25LP256 entry
Add entry for ISSI IS25LP256 part.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Jagan Teki <jagan@openedev.com>
2018-02-23 10:40:52 -05:00
Mario Six
36890ff0d0 sf_probe: Merge spi_flash_probe_tail into spi_flash_probe
spi_flash_probe_tail is now only called from spi_flash_probe, hence we
can merge its body into spi_flash_probe.

Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-24 12:04:08 +05:30
Mario Six
a3e32c5038 spi: sf_probe: Fix style violations
Fix two indention-related style violations.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:04:08 +05:30
Mario Six
74ea6e82f8 spi: Remove spi_flash_probe_fdt
Commit ba45756 ("dm: x86: spi: Convert ICH SPI driver to driver model")
removed the last usage of the spi_flash_probe_fdt function, rendering it
obsolete.

This patch removes the function.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-24 12:04:07 +05:30
Álvaro Fernández Rojas
6c94bd12c4 drivers: spi: consider command bytes when sending transfers
Command bytes are part of the written bytes and they should be taken into
account when sending a spi transfer.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:03:43 +05:30
Álvaro Fernández Rojas
8af74edc30 drivers: spi: allow limiting reads
For some SPI controllers it's not possible to keep the CS active between
transfers and they are limited to a known number of bytes.
This splits spi_flash reads into different iterations in order to respect
the SPI controller limits.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:03:43 +05:30
Sean Nyekjaer
065592b40b mtd/spi: fix block count for is25lq040b
This spi-nor is 4Mbit/512KB

Fixes: b4fbcbc5a5 ("mtd/spi: add support for is25lq040b")
Signed-off-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-12-19 17:33:48 +05:30
Sean Nyekjaer
b4fbcbc5a5 mtd/spi: add support for is25lq040b
Signed-off-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-11-21 19:24:47 +05:30
Andre Przywara
a722359de4 SPL: SPI: select SPL_SPI_FLASH_SUPPORT on SPL_SPI_SUNXI
The Allwinner SPI flash SPL boot support is guarded by the SPL_SPI_SUNXI
symbol. But despite its generic name, the actual only use case for this
is to provide SPI flash support to the SPL, which requires
CONFIG_SPL_SPI_FLASH_SUPPORT to be defined.
Select this symbol from the SPL_SPI_SUNXI Kconfig definition. This
avoids doing this explicitly in the defconfig, and fixes SPI booting on
the Pine64 SoPine (and -LTS version) and the OrangePi Win board (both with
SPI flash).

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-10-25 10:05:05 +02:00
Lukasz Majewski
ca1ac16da0 sf: bar: Clean BA24 Bank Address Register bit after read/write/erase operation
The content of Bank Address Register (BAR) is volatile. It is cleared
after power cycle or reset command (RESET F0h).

Some memories (like e.g. s25fl256s) use it to access memory larger than
0x1000000 (16 MiB).

The problem shows up when one:

1. Reads/writes/erases memory > 16 MiB
2. Calls "reset" u-boot command (which is not causing BAR to be cleared)

In the above scenario, the SoC ROM sends 0x000000 address to read SPL.
Unfortunately, the BA24 bit is still set and hence it receives content
from 0x1000000 (16 MiB) memory address.
As a result the SoC aborts and we hang. Only power cycle can take the
SoC out of this state.

How to reproduce/test:

sf probe; sf erase 0x1200000 0x800000; reset
sf probe; sf erase 0x1200000 0x800000; sf write 0x11000000 0x1200000 0x800000; reset
sf probe; sf read 0x11000000 0x1200000 0x800000; reset

Signed-off-by: Lukasz Majewski <lukma@denx.de>
[Fixed comment text on clean_bar function]
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-09-27 13:31:59 +05:30
Andre Przywara
ba09440131 SPL: SPI: sunxi: add SPL FIT image support
The sunxi-specific SPI load routine only knows how to load a legacy
U-Boot image.
Teach it how to handle FIT images as well, simply by providing the
existing SPL FIT loader with the right loader routine to access the SPI
NOR flash.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reported-by: Peter Kosa <kope@madnet.sk>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-09-27 12:45:32 +05:30
Vsevolod Gribov
db10809c17 Fix s25fl256s position in spi_flash_ids list
Spansion S25FS256S and S25FL256S flashes have equal JEDEC ID and ext ID.
As far as S25FL256S occures in spi_flash_ids before S25FS256S, U-Boot
incorrectly detects FS flash as FL. Thus its better to compare with
S25FS256S first.

Signed-off-by: Vsevolod Gribov <vgribov@larch-networks.com>
[Added S-o-b]
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-09-25 13:00:34 +05:30
Marek Vasut
545a438222 sf: Fix S25FL116K entry
The flash chip is 2 MiB , organized as 32 x 64 kiB sectors .
Rectify the entry to match the datasheet, reality and Linux SNOR IDs.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-09-25 12:54:10 +05:30
Yogesh Gaur
811b6be166 mtd/spi: Add MT35XU512ABA1G12 NOR flash support
Add MT35XU512ABA1G12 parameters to NOR flash parameters array.

The MT35XU512ABA1G12 only supports 1 bit mode and 8 bits. It can't support
dual and quad. Supports subsector erase with 4KB granularity, have support
of FSR(flag status register) and flash size is 64MB.

Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-09-25 12:51:20 +05:30
rick
6d3cb0fdcd nds32: mtd: add spi flash id MX25U16335E.
To support MACRONIX MX25U1635E 16M-BIT flash.

Signed-off-by: rick <rick@andestech.com>
2017-09-21 10:30:22 +08:00
Bin Meng
294f2050c4 sf: Preserve QE bit when clearing BP# bits for Macronix flash
On some flash (like Macronix), QE (quad enable) bit is in the same
status register as BP# bits, and we need preserve its original value
during a reboot cycle as this is required by some platforms (like
Intel ICH SPI controller working under descriptor mode).

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
[Refined code for readability]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-08-16 18:21:50 +05:30
Wenyou.Yang@microchip.com
8fc2faefdd mtd: spi: sf_dataflash: Add print message while erase error
Add the print message to tell us why the erase operation doesn't work.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-08-08 12:34:27 +05:30
Bin Meng
ac6777b1e3 sf: Add Macronix MX25U6435F device parameters
This adds support for Macronix flash MX25U6435F (device ID 0xc22537).

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-08-08 12:26:05 +05:30
Mike Looijmans
988390b8e1 arm: zynq: Move CONFIG_SF_DUAL_FLASH to defconfig
Move the only use of CONFIG_SF_DUAL_FLASH to defconfig. This makes the
associated topic_miamiplus.h header obsolete, so remove that as well.

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-06-20 16:42:13 +02:00
Simon Glass
a11817999f dm: sandbox: spi: Convert driver to support livetree
Update this driver to support a live device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 07:03:16 -06:00
Simon Glass
656f29d1ca dm: spi-flash: Convert uclass to livetree
Update the SPI flash uclass to support a live device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-01 07:03:16 -06:00
Tom Rini
d53ecad92f Merge branch 'master' of git://git.denx.de/u-boot-sunxi
trini: Disable CONFIG_SPL_USE_ARCH_MEMSET on orangepi_2

Signed-off-by: Tom Rini <trini@konsulko.com>
2017-04-06 20:40:24 -04:00
Andre Przywara
7b82a229e5 sunxi: prepare for sharing MACH_SUN8I_H3 config symbol
The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores.
To allow sharing the clocks, GPIO and driver code easily, create an
architecture agnostic MACH_SUNXI_H3_H5 Kconfig symbol.
Rename the existing symbol to MACH_SUNXI_H3_H5 where code is shared and
let it be selected by a new shared Kconfig option.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-05 15:03:17 +05:30
Andre Przywara
a982bbbc1f SPI: SPL: sunxi: fix 64-bit build
Addresses passed on to readl and writel are expected to be of the same
size as a pointer. Change the parameter types of sunxi_spi0_read_data()
to make the compiler happy and allow a warning-free aarch64 compile.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-04-05 15:03:17 +05:30
Stefan Roese
706865afe5 dm: core: Add flags parameter to device_remove()
This patch adds the flags parameter to device_remove() and changes all
calls to this function to provide the default value of DM_REMOVE_NORMAL
for "normal" device removal.

This is in preparation for the driver specific pre-OS (e.g. DMA
cancelling) remove support.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
2017-04-04 20:15:10 -06:00
Simon Glass
e160f7d430 dm: core: Replace of_offset with accessor
At present devices use a simple integer offset to record the device tree
node associated with the device. In preparation for supporting a live
device tree, which uses a node pointer instead, refactor existing code to
access this field through an inline function.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-02-08 06:12:14 -07:00
Priit Laes
a648936143 spl: sunxi: Fix build error with CONFIG_SPL_SPI_SUNXI
Fix typo introduced in ebc4ef61d7

Signed-off-by: Priit Laes <plaes@plaes.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-01-04 11:54:04 +01:00
Cyrille Pitchen
9bcb018870 Revert "sf: Fix quad bit set for micron devices"
This reverts commit c56ae7519f.

Once the 'Quad Enable' bit is cleared in their Enhanced Volatile
Configuration Register (EVCR), Micron memories expect ALL commands to use
the SPI 4-4-4 protocol. Commands using SPI 1-y-z protocols are no longer
accepted.

Within the reverted commit, the write_evcr() function is implemented using
the spi_flash_write_common(), which is a shortcut for the
[ spi_flash_cmd_write_enable(), spi_flash_cmd_write(),
spi_flash_cmd_wait_ready() ] sequence.

Since the internal state of the Micron memory has been changed when the
spi_flash_cmd_write() function completes, the later call of the
spi_flash_cmd_wait_ready() function fails.

Indeed the SPI controller driver is not aware of the SPI protocol switch.

Further patches will fix the support of Micron QSPI memories.

Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
[Rebase on master, use JEDEC_MFR(info) in place of idcode0]
Signed-off-by: Jagan Teki <jagan@openedev.com>
2016-12-15 18:33:16 +01:00
Phil Edworthy
db9225ba26 sf: Do not force the DT memory map size to exactly match the device
As long as the memory mapped size specifeid in the DT is the same or
bigger than the device size, it will work. So do not force the sizes
to be identical.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2016-12-15 16:57:28 +01:00