Commit graph

837 commits

Author SHA1 Message Date
Tom Rini
cc64810dc6 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sunxi
- H6 dts(i) sync (Clément)
- H6 PIO (Icenowy)
- Fix pll1 clock calculation (Stefan)
- H6 dram, half DQ (Jernej)
- A64 OLinuXino eMMC (Sunil)
2019-10-30 09:04:52 -04:00
Tom Rini
ffc379b42c - bmips: add BCRM NAND support for BCM6368, BCM6328, BCM6362 and BCM63268 SoCs
- bmips: various small fixes
 - mtmips: add new drivers for clock, reset-controller and pinctrl
 - mtmips: add support for high speed UART
 - mtmips: update/enhance drivers for SPI and ethernet
 - mtmips: add support for MMC
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiQkHUH+J02LLC9InKPlOlyTyXBgFAl2zFisACgkQKPlOlyTy
 XBgf9RAAkNwLjqUcBz3Ob1briRG5HF4D6bZCpjtkTIO8a2fanUHbSehh30TX8x2X
 z0t/9Sd4OZwAeTxfQ/AlbbVdiB9IMgEb6lJ30Vr88MRNoPhABIQ8hw5xAzFi/6x9
 88YolS/HQo6iR9rzSlaKjdIHhPTH5oQzRJ3JLqSwZzfUNy+zqINEhs3SYCnD2lyV
 gTgiIT3Y5nKrhVHPUCy+jQG+wwWej2NFgwn71vR3/PSQJwxBuasg0qqOKD9hRtpC
 XL6VErE7bf00elO8xjEObYrmB2FpffXJdkazS2HtRYNyKx0quaRNXJt7wqxEVP9L
 M6SmL+S7zBFAetc/iyrlaakPvn7ImehSZkgLYaTPc3yzO+6bgq9tLfBERn/B/s5g
 YyIzPGF66L96nuu0eVGCgSoUBjzBE8l2QTI8dho5xJxjWAUJOWSB0egqfFZzYVFu
 4X37w6Z0j6uTK2oEl7KgJdc0JsZRsAJ8ZiqgOeNeMUTl2RnjGt0Oa7E24Va3n3hM
 5vuEba9nPUFmdC5vlSd2RUK/dB587uKV93r5j54U62clpbiK+VMaRuRVX64ytZvB
 B/0fKyCu+y7bxeZe4/X27jBUOk5yCuxbNI66m+cnnvfHqEmhz5PfDCEK1Dr29oqf
 sCJLgTr7ahyuW4kEoL7KCOBEugPI85fp8/OlqC63M6/Kft0w5sA=
 =6G/J
 -----END PGP SIGNATURE-----

Merge tag 'mips-pull-2019-10-25' of git://git.denx.de/u-boot-mips

- bmips: add BCRM NAND support for BCM6368, BCM6328, BCM6362 and BCM63268 SoCs
- bmips: various small fixes
- mtmips: add new drivers for clock, reset-controller and pinctrl
- mtmips: add support for high speed UART
- mtmips: update/enhance drivers for SPI and ethernet
- mtmips: add support for MMC
2019-10-25 20:07:24 -04:00
Weijie Gao
43405e009b spi: mt7621-spi: restore default register value after each xfer
Currently this driver uses a different way to implement the spi xfer,
by modifying some fields of two registers, which is incompatible with the
MTK's original SDK linux driver. This will cause the flash data being
damaged by the SDK driver.

This patch lets the mt7621_spi_set_cs() restore the original register
fields after cs deactivated.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
54a6b8e793 spi: mt7621-spi: remove data cache and rewrite its xfer function
The mt7621 spi controller supports continuous generic half-duplex spi
transaction. There is no need to cache xfer data at all.

To achieve this goal, the OPADDR register must be used as the first data
to be sent. And follows the eight generic DIDO registers. But one thing
different between OPADDR and DIDO registers is OPADDR has a reversed byte
order.

With this patch, any amount of data can be read/written in a single xfer
function call.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Weijie Gao
f09978566b spi: mt7621-spi: use clock frequency from clk driver
This patch lets the spi driver to use clock provided by the clk driver
since the new clk-mt7628 driver provides accurate sys clock frequency.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Ley Foon Tan
e7e05fcb3e spi: designware_spi: Disable and free clock when remove driver
Disable and free clock when remove driver.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-10-25 00:48:32 +05:30
Jagan Teki
dc738248db spi: Kconfig: Enable SPI_SUNXI for SUNXI
SPI_SUNXI driver is fully dm-aware and the Allwinner
architecture kconfig would have logic to enable the
DM_SPI. So, select default spi sunxi driver for
sunxi architecture.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-10-25 00:48:31 +05:30
Bin Meng
4b06000395 dm: spi: Change cs_info op to return -EINVAL for invalid cs num
We need distinguish the following two situations in various SPI APIs:

- given chip select num is invalid
- given chip select num is valid, but no device is attached

Currently -ENODEV is returned for both cases.

For the first case, it's more reasonable to return -EINVAL instead of
-ENODEV for invalid chip select numbers.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> # SoPine
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-10-25 00:48:31 +05:30
Bin Meng
4dd520b36b dm: spi: Return 0 if driver does not implement ops->cs_info
If an SPI controller driver does not implement ops->cs_info, that
probably means any chip select number could be valid, hence let's
return 0 for spi_cs_info().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> # SoPine
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-10-25 00:48:31 +05:30
Jagan Teki
0c8e605670 spi: Kconfig: Add help text
Add detailed help text for SPI support.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-10-25 00:48:31 +05:30
Michal Simek
3a79c6052a spi: zynqmp: Remove unused platform headers
There is no reason to include clk.h and hardware.h headers.
Driver doesn't require them.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-24 13:37:02 +02:00
Thomas Fitzsimmons
640abba507 dm: spi: Do not assume first SPI bus
When CONFIG_OF_PRIOR_STAGE is enabled, this workaround was needed
before device_bind_common assigned request numbers sequentially in the
absence of aliases.

Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
2019-10-15 08:40:02 -06:00
Kursad Oney
b47f4891e5 spi: bcm63xx_hsspi: Continue init when using no reset and fixed-clock.
The Broadcom ARM implementations do not yet have a clock framework so
one can use a fixed clock as the root clock of the hsspi block. The
fixed clock does not have an "enable" routine, since it's always
enabled. So when we hit this issue, getting an ENOSYS return, do not
bail but continue initialization.

Similarly the block might already have been out of reset, say, when
we are booting from a SPI device. So if the reset signal is not configured
in the device tree, do not bail out and instead skip deasserting the reset.

Signed-off-by: Kursad Oney <kursad.oney@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-10-11 10:09:16 -04:00
Kursad Oney
3ae64e8f25 spi: bcm63xx_hsspi: switch to raw I/O functions.
Make the driver compatible with both big and little endian SOCs.
Replace big-endian calls with their raw equivalents, expect for
writing the command to FIFO. That still has to be in big-endian
format.

Signed-off-by: Kursad Oney <kursad.oney@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-10-11 10:09:16 -04:00
Kursad Oney
9a3eddd263 spi: hsspi: allow to be used on bcm6858 and bcm63158
This IP exists in both MIPS and ARM cores, so we also
allow to use this driver on bcm6858 and bcm63158.

Signed-off-by: Kursad Oney <kursad.oney@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-10-11 10:09:16 -04:00
Ye Li
9699fb4de5 spi: fsl_qspi: Add support for QSPI on iMX7ULP
Add the compatible string and driver data for iMX7ULP platform

Signed-off-by: Ye Li <ye.li@nxp.com>
2019-10-08 16:36:37 +02:00
Ye Li
ce7575a86d spi: fsl_qspi: Update to use driver data
Add the driver data for each compatible string. So we can remove the
SOC config and use driver data instead.

Signed-off-by: Ye Li <ye.li@nxp.com>
2019-10-08 16:36:37 +02:00
Ye Li
b866b9278a spi: fsl_qspi: Update write data size for page program LUT
The write data size can be overwritten by writing to the IDATSZ
field of IPCR register. Since the driver always updates the IDATSZ
in page program operation. Set the LUT data size to 0 to align
the codes with iMX.

Signed-off-by: Ye Li <ye.li@nxp.com>
2019-10-08 16:36:37 +02:00
Ye Li
7949576664 spi: fsl_qspi: Fix DDR mode setting for latest iMX platforms
On latest iMX platforms like iMX7D/iMX6UL/iMX8MQ, the QSPI controller
is updated to have TDH field in FLSHCR register. According to reference
manual, this TDH must be set to 1 when DDR_EN is set. Otherwise, the TX
DDR delay logic won't be enabled.

Another issue in DDR mode is the MCR register will be overwritten in
every read/write/erase operation. This causes DDR_EN been cleared while
TDH=1, then no clk2x output for TX data shift and all operations will
fail.

Signed-off-by: Ye Li <ye.li@nxp.com>
2019-10-08 16:36:37 +02:00
Lukasz Majewski
ec0c81f8ed spi: Add support for SPL_OF_PLATDATA to mxs_spi.c driver
After this patch the mxs_spi.c DM/DTS driver can be used at early SPL to
read payload from SPI-NOR memories.

It was necessary to adjust its name to 'fsl_imx_2{38}_spi' to match
requirements for SPL_OF_PLATDATA usage.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-10-08 16:36:36 +02:00
Lukasz Majewski
c2050e10e1 spi: fix: Call mxs_reset_block() during DM/DTS probe
Without this change the DM/DTS version of mxs_spi driver doesn't reset the
SPI IP block in probe.
As a result this driver (when used solely on U-Boot proper) relies on reset
performed by mxs spi driver in SPL.

In the use case where eMMC is used in SPL as a boot primary device, the
mxs_reset_block() is not called at all and DM/DTS aware SPI driver in
U-Boot proper is malfunctioning.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-10-08 16:36:36 +02:00
Lukasz Majewski
3c50e01566 spl: Init proper struct driver member (platdata_auto_alloc_size) for mxs_spi
This change initializes proper member of struct driver -
platdata_auto_alloc_size instead of priv_auto_alloc_size, which is setup
twice.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-10-08 16:36:36 +02:00
Jagan Teki
8473b32127 spi: Add spi_write_then_read
Add support for SPI synchronous write followed by read,
this is common interface call from spi-nor to spi drivers.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Adam Ford <aford173@gmail.com> #da850-evm
2019-09-16 08:09:22 +05:30
Lukasz Majewski
6bd6c21693 spi: Kconfig: Unmark DEPRECATED for MXS_SPI
MXS_SPI driver now partially converted into driver-model,
so unmark the DEPRECATED option for the same.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
[jagan: update the commit message]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-09-16 08:09:22 +05:30
Christophe Kerello
dfe72d081d spi: soft_spi: Fix data abort if slave is not probed
In case spi_get_bus_and_cs callback is used, spi bus is first probed
then slave devices are probed. To avoid a data abort in soft_spi probe
function, we need to check that (slave != NULL).

If slave is NULL, cs_flags and clk_flags will be initialized with
respectively GPIOD_ACTIVE_LOW and 0.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-09-16 08:09:22 +05:30
Marek Behún
07a5cb9d3b spi: mvebu_a3700_spi: Fix clock prescale computation
The prescaler value computation can yield wrong result if given 0x1f at
the beginning: the value is computed to be 0x20, but the maximum value
the register can hold 0x1f, so the actual stored value in this case is
0, which is obviously wrong.
Set the upper bound of the value to 0x1f with the min macro.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-09-16 08:09:22 +05:30
Bernhard Messerklinger
0709ddb68f x86: ich-spi: Convert driver to spi-mem ops
With the introduction of the new spi-mem model operations changed
slightly. The new spi-mem operations make things a bit easier to
handle for ich-spi flash interface. This patch converts the ich-spi
driver by using spi-mem operations.

Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

Tested on Intel CrownBay and MinnowMax
Tested-by: Bin Meng <bmeng.cn@gmail.com>

[bmeng: fix compiler warnings when building the driver for 64-bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-08-09 22:24:02 +08:00
Tom Rini
df9a7a195b u-boot-imx-20190719
- CCF for i.MX6
 - nandbcb command to write SPL into NAND
 - Switch to DM (i.MX28)
 - Boards: Toradex, engicam, DH
 - Fixes for i.MX8
 - Fixes for i.MX7ULP
 
 Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/561147504
 -----BEGIN PGP SIGNATURE-----
 
 iQHDBAABCgAtFiEEiZClFGvhzbUNsmAvKMTY0yrV63cFAl0y6dgPHHNiYWJpY0Bk
 ZW54LmRlAAoJECjE2NMq1et3iDYL/AgznVr7kSHoYpSGfBp8pH3R1UdUiQFg437+
 9/wqMJM5Txm1aK7qTW2u5I7qzIpGw0LMPZ7CDQhWJa1Z0hdNWf/1lMzCVOPvCl1v
 C0TK5hx3ufyfgpkGdkPvVXTmn0f8tdiqtS8zQOLVntPe5dIuOySS0MbD9K4Xewfm
 sVYO0p6F1q+EHbRGw33kIX3/ST8wuj7Iki0AFiZ2hAImHO7UeZP2X3k31kbhs+ZB
 /uhUit3Rn0nc5sIqiiP6Ptfjp8eq13LwWbSwJzezCQssmkTn14z6rrgwUcNuXNlh
 Vi88kJr2ObkFgwUpQCWss+sHzyJQkTX/iLz52FCWB4Ruzr6zGr/4ONLT/iDP0Ydl
 ncO3v8uqLpAeB7kdkt8JRJhq62qihdZc6mdN2YJoCYUZSlR3gxzKmXvT+drglsOi
 B78KoU/MgQ10REQ9IoTRLhQc1gwTF8LJSyfz5hjRGoMhD/Ek5WAQJaMlxDg67Ai8
 HB4lUNjkCV58HdP1+zIWJbbxrDc/lg==
 =LNOs
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-imx-20190719' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20190719

- CCF for i.MX6
- nandbcb command to write SPL into NAND
- Switch to DM (i.MX28)
- Boards: Toradex, engicam, DH
- Fixes for i.MX8
- Fixes for i.MX7ULP

Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/561147504
2019-07-27 09:35:05 -04:00
Tom Rini
222701e157 Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-spi
- fix for fsl_qspi read timeout (Thomas)
- spi-mem read data size fix (Ye Li)
- SiFive SPI driver, mmc_spi flags (Bhargav, Anup)
- Micron spi-nor parts (Ashish)
- MT7629 spi-mem driver(Weijie)
2019-07-27 09:34:07 -04:00
Weijie Gao
1f174689c1 spi: Drop obsolete mtk_qspi driver references
Since u-boot has added the spi-mem framework and replaced
the spi-nor framework, the mtk_qspi is no longer compatible
with the new spi-nor driver.

Remove this driver along with replacing config item
with new mtk spi-nor driver.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
[jagan: squash related changes and update commit message]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-25 18:52:20 +05:30
Weijie Gao
603fcd16b1 spi: add spi-mem driver for MediaTek MT7629 SoC
This patch adds spi-mem driver for MediaTek MT7629 SoC
to access SPI-NOR and SPI-NAND flashes.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
[jagan: squash MAINTAINERS file]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-25 18:52:12 +05:30
Patrice Chotard
637e288dc7 spi: stm32_qspi: Remove "st, stm32-qspi" compatible string
"st,stm32-qspi" is no more used, remove it.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-07-22 11:04:52 +02:00
Lukasz Majewski
d99b018a6e spi: mxs: Add support DM/DTS for i.MX28 mxs SPI driver (DM_SPI conversion)
This patch converts mxs_spi driver to support DM/DTS.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
2019-07-19 14:57:14 +02:00
Bhargav Shah
a2f32bfdd3 spi: Add SiFive SPI driver
This patch adds SiFive SPI driver. The driver is 100% DM driver
and it determines input clock using clk framework.

The SiFive SPI block is found on SiFive FU540 SOC and is used to
access flash and MMC devices on SiFive Unleashed board.

This driver implementation is inspired from the Linux SiFive SPI
driver available in Linux-5.2 or higher and SiFive FSBL sources.

Signed-off-by: Bhargav Shah <bhargavshah1988@gmail.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-18 17:11:16 +05:30
Thomas Schaefer
733391e84b drivers/spi: fsl_qspi: improve timeout calculation
Use readl_poll_timeout instead of explicit calculation

Signed-off-by: Thomas Schaefer <thomas.schaefer@kontron.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-18 17:11:16 +05:30
Thomas Schaefer
c6d0c5eb30 drivers/spi: fsl_qspi: fix read timeout
During QSPI reads, current is_controller_busy function sporadically
fails with -ETIMEDOUT due to fixed number of 5 test loops. Using
timer functions to wait 1000 us instead will fix this.

Signed-off-by: Thomas Schaefer <thomas.schaefer@kontron.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-18 17:11:16 +05:30
Ye Li
535b1fdb8e spi: spi-mem: Fix read data size issue
When slave drivers don't set the max_read_size, the spi-mem should directly
use data.nbytes and not limit to any size. But current logic will limit to
the max_write_size.

Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-18 17:11:16 +05:30
Tom Rini
a9a3a37f92 - syscon: add support for power off
- stm32mp1: add op-tee config
 - stm32mp1: add specific commands: stboard and stm32key
 - add stm32 mailbox driver
 - solve many stm32 warnings when building with W=1
 - update stm32 gpio driver
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJdKK2iAAoJEOKyvdngqpN1TvcH/jj1ujNdRKn994R3DqULzFtc
 Y0WGjAciTUuV0d9gZLxPZJwlWfqxLgbmUEBlPJQJe79gaM7kNN0PgAe6GNedFhGk
 UhRR7GgbA7wogorpRo8aLe3XYEqHtgPFkf1nSiNz/AHLBg8SB20VhWcY90Kha9lh
 IJ0GK+lSdCxiyaLBC2nswnI2PS/fl4NfC7KWvujtKZduIDIOHqh5q+39llpejyuw
 WOzL/bEa4ald6JKpxOii2KXNwD1gUDQGmPzADYcIdwzJtx9hft7DBSLC5Nr+ndBz
 72TjpbtfJ/qIurv8HeXYs9mtwnCO3WP+015fog0T0zjZ48BrT1A8C96ezwLOfz0=
 =W3ny
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-stm32-20190712' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm

- syscon: add support for power off
- stm32mp1: add op-tee config
- stm32mp1: add specific commands: stboard and stm32key
- add stm32 mailbox driver
- solve many stm32 warnings when building with W=1
- update stm32 gpio driver
2019-07-14 09:09:49 -04:00
Patrick Delaunay
54ef8fb86b spi: stm32: Fix warnings when compiling with W=1
This patch solves the following warnings:

drivers/spi/stm32_spi.c: In function 'stm32_spi_write_txfifo':
drivers/spi/stm32_spi.c:116:20: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
   if (priv->tx_len >= sizeof(u32) &&
                    ^~
drivers/spi/stm32_spi.c:122:27: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
   } else if (priv->tx_len >= sizeof(u16) &&
                           ^~
drivers/spi/stm32_spi.c: In function 'stm32_spi_read_rxfifo':
drivers/spi/stm32_spi.c:150:21: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
       (priv->rx_len >= sizeof(u32) || (sr & SPI_SR_RXWNE))) {
                     ^~
drivers/spi/stm32_spi.c:156:21: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
       (priv->rx_len >= sizeof(u16) ||
                     ^~
drivers/core/simple-bus.c:15:12: warning: no previous prototype for 'simple_bus_translate' [-Wmissing-prototypes]
 fdt_addr_t simple_bus_translate(struct udevice *dev, fdt_addr_t addr)
            ^~~~~~~~~~~~~~~~~~~~
drivers/spi/stm32_spi.c: In function 'stm32_spi_set_speed':
drivers/spi/stm32_spi.c:335:10: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
      div > STM32_MBR_DIV_MAX)
          ^
drivers/spi/stm32_spi.c:344:19: warning: comparison of unsigned expression < 0 is always false [-Wtype-limits]
  if ((mbrdiv - 1) < 0)
                   ^
drivers/spi/stm32_spi.c: In function 'stm32_spi_probe':
drivers/spi/stm32_spi.c:531:16: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
  for (i = 0; i < ARRAY_SIZE(priv->cs_gpios); i++) {
                ^
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12 11:50:57 +02:00
Patrick Delaunay
1ddf544e63 spi: stm32_qspi: avoid warnings when building with W=1 option
This patch solves warnings detected by setting W=1 when building.

Warnings type detected:
 - [-Wtype-limits]
 - [-Wsign-compare]

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12 11:50:57 +02:00
Tom Rini
a9758ece08 - Sandbox improvements including .dts refactor
- Minor tracing and PCI improvements
 - Various other minor fixes
 - Conversion of patman, dtoc and binman to support Python 3
 -----BEGIN PGP SIGNATURE-----
 
 iQFFBAABCgAvFiEEslwAIq+Gp8wWVbYnfxc6PpAIreYFAl0nbDoRHHNqZ0BjaHJv
 bWl1bS5vcmcACgkQfxc6PpAIreZcBQgAn+ojgq/hD89bihuhz2oEe6rhzHB9OkcC
 sHrVL8Jbmby/BuzISGe4oeeM5yVygBVtUiN/72JiiAHLmykqc4CpRjNvgOOAgKCy
 Ml8UyiBNNVNfrD6f9PxAKvPZf6S0gfLnomGOQ/psdEojpY5AvQxQ36D+QFZ0AMP5
 67/xjSfN9bNPw8UbgE/VhJ+WFbU948BP2EBt6+NBAtv7HW4AX9vT0famJfWEjwq8
 ftmcFOSNGgYcDQ5BwQWX1sFhnwb9XSfurlQsVYBsFA4cx4gj0DfUm1Ugr4wDD+lo
 91P+76hSBQ+mHp1HJ90WMd2vAaElG7/SoaicXo9pW6Rc7WIgTjk7gg==
 =SdZy
 -----END PGP SIGNATURE-----

Merge tag 'dm-pull-9jul19-take2' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm

- Sandbox improvements including .dts refactor
- Minor tracing and PCI improvements
- Various other minor fixes
- Conversion of patman, dtoc and binman to support Python 3
2019-07-11 18:10:11 -04:00
Tom Rini
68deea2308 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- SPL SATA enhancements to allow booting from RAW SATA device
  needed for Clearfog (Baruch)
- Enable SATA booting on Clearfog (Baruch)
- Misc changes to Turris Omnia (Marek)
- Enable CMD_BOOTZ and increase SYS_BOOTM_LEN on crs305-1g-4s
  (Luka)
- Enable FIT support for db-xc3-24g4xg (Chris)
- Enable DM_SPI on Keymile Kirkwood board with necessary changes
  for this (Pascal)
- Set 38x and 39x AVS on lower frequency (Baruch)
2019-07-11 18:09:38 -04:00
Pascal Linder
fd9d70d738 km/spi: remove deprecated SPI flash driver code for KM Kirkwood boards
KM Kirkwood boards now implement the driver model for its SPI flash
interface. Therefore, the old board specific claim and release functions
can be deleted. The preprocessor definition CONFIG_SYS_KW_SPI_MPP is yet
unused as well. All its appearances and dependencies are removed in the
kirkwood_spi driver, header files and finally the configuration whitelist.

Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch>
Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11 10:58:03 +02:00
Pascal Linder
f169653483 km/spi: add weak functions to kirkwood_spi driver (DM part)
The weak functions, known from the legacy code, are added to the DM part
as well. For this purpose, the release operation first needs to be
implemented. KM Kirkwood boards will overwrite those weak functions to
change the MPP configuration when claiming/releasing the bus, because the
hardware pins are shared between the SPI NOR and NAND devices.

Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch>
Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11 10:58:03 +02:00
Simon Glass
ca2abb75a0 spi: Avoid using malloc() in a critical function
In general we should avoid calling malloc() and free() repeatedly in
U-Boot lest we turn it into tianocore. In SPL this can make SPI flash
unusable since free() is often a nop and allocation space is limited.

In any case, these seems no need for malloc() since the number of bytes
is very small, perhaps less than 8.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: d13f5b254a (spi: Extend the core to ease integration of SPI
	memory controllers)
2019-07-10 16:52:58 -06:00
Simon Glass
24c2776ba9 sandbox: Correct spi flash operation
Since the SPI nor conversion, 'sf probe' does not work on sandbox. Fix
this by using the expected compatible string in the flash node.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: cd35365762 (mtd: sf_probe: remove spi-flash compatible)
2019-07-10 16:52:58 -06:00
Kunihiko Hayashi
9424ecd735 spi: Add SPI controller driver for UniPhier SoCs
Add SPI controller driver implemented in Socionext UniPhier SoCs.
This controller has the SPI master mode only.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
2019-07-10 22:37:23 +09:00
Tudor Ambarus
24c8ff4684 spi: Add Atmel QuadSPI driver
Backport the driver from linux v5.1-rc5 and adapt it for u-boot.
Tested on sama5d2_xplained Rev B with mx25l25635e spi-nor flash.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-09 09:26:43 +03:00
Tom Rini
c3f43185ee Merge branch 'master' of git://git.denx.de/u-boot-spi
- Drop zipitz2 board (Tom)
- Add DEPRECATED option (Tom)
- Mark legacy or non-dm drivers as DEPRECATED (Jagan)
2019-06-17 11:32:22 -04:00
Jagan Teki
ea73ec08d1 spi: Kconfig: Mark LPC32XX_SSP as DEPRECATED
Mark LPC32XX_SSP as DEPRECATED, this so the resulting build shows
warning for deprecated configuration enabled and associated code
will remove in v2019.07 release.

Cc: Albert ARIBAUD <albert.aribaud@3adev.fr>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Vladimir Zapolskiy <vz@mleia.com>
Acked-by: Sylvain Lemieux <slemieux@tycoint.com>
[trini: Switch to DEPRECATED]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-06-13 12:51:06 +05:30