Commit graph

18315 commits

Author SHA1 Message Date
Tom Rini
d361eafe82 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-usb
- DWC2, DWC3 fixes
2020-11-22 11:00:11 -05:00
Jaehoon Chung
05dac23261 usb: gadget: dwc2_udc_otg: return zero when reset property is not present
If reset DT property is not present, -ENOENT is returned.
But it's not really error.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2020-11-22 13:18:20 +01:00
Siva Durga Prasad Paladugu
e7f9e1fca9 usb: dwc3: Handle case where setup_phy is not needed
If CONFIG_PHY is not enabled then the dwc3_setup_phy()
returns ENOTSUPP which can be still valid and intentional
so modify error check to handle this -ENOTSUPP.

The same error handling exists in drivers/usb/host/xhci-dwc3.c already
added by commit d648a50c0a ("dwc3: move phy operation to core.c").

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-11-22 13:18:20 +01:00
Patrick Delaunay
5739ef2bcb usb: dwc2: add "u-boot,force-vbus-detection" for stm32
On some board, the ID pin is not connected so the B session must be
overridden with "u-boot,force_b_session_valid" but the VBus sensing
must continue to be handle.

To managed it, this patch adds a new DT field
"u-boot,force-vbus-detection" to use with "u-boot,force_b_session_valid"

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-11-22 13:18:20 +01:00
Lad Prabhakar
46f3282b28 pinctrl: renesas: Drop unused members from struct sh_pfc_pinctrl
Drop unused members from struct sh_pfc_pinctrl.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
2020-11-22 12:49:22 +01:00
Biju Das
2a589b7c51 pinctrl: renesas: r8a7795: Optimize pinctrl image size for R8A774E1
This driver supports both RZ/G2H and R-Car H3 SoCs.
Optimize pinctrl image size for RZ/G2H, when support for R-Car H3
(R8A7795) is not enabled

Based on the similar patch on Linux.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
2020-11-22 12:49:22 +01:00
Biju Das
8b00761c06 pinctrl: renesas: r8a77965: Optimize pinctrl image size for R8A774B1
This driver supports both RZ/G2N and R-Car M3-N SoCs.
Optimize pinctrl image size for RZ/G2N, when support for R-Car M3-N
(R8A77965) is not enabled.

Based on the simialr patch on Linux.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
2020-11-22 12:49:22 +01:00
Biju Das
fee13ae8cb pinctrl: renesas: r8a7796: Optimize pinctrl image size for R8A774A1
This driver supports both RZ/G2M and R-Car M3-W/W+ SoCs.
Optimize pinctrl image size for RZ/G2M, when support for R-Car M3-W/W+
(R8A7796[01]) is not enabled.

Based on the similar patch on Linux.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
2020-11-22 12:49:22 +01:00
Biju Das
975154bc2c pinctrl: renesas: r8a77951: Add R8A774E1 PFC support
Renesas RZ/G2H (r8a774e1) is pin compatible with R-Car H3 (r8a77951),
however it doesn't have several automotive specific peripherals. Add
a r8a77951 specific pin groups/functions along with common pin
groups/functions for supporting both r8a77951 and r8a774e1 SoC.

PFC changes are synced from mainline linux-5.9 commit
bbf5c979011a ("Linux 5.9").

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2020-11-22 12:49:22 +01:00
Biju Das
c5f3762588 pinctrl: renesas: r8a77965: Add R8A774B1 PFC support
Renesas RZ/G2N (r8a774b1) is pin compatible with R-Car M3-N (r8a77965),
however it doesn't have several automotive specific peripherals. Add
a r8a77965 specific pin groups/functions along with common pin
groups/functions for supporting both r8a77965 and r8a774b1 SoC.

PFC changes are synced from mainline linux-5.9 commit
bbf5c979011a ("Linux 5.9").

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2020-11-22 12:49:22 +01:00
Tom Rini
12e396303c Pull request for UEFI sub-system for efi-2021-01-rc3 (2)
The parameter check for UEFI service GetNextVariableName() is corrected.
 
 The dependencies of CONFIG_DFU_TFTP are simplified.
 
 The set of supported hash algorithms reported by the EFI_TCG2_PROTOCOL is
 corrected.
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Merge tag 'efi-2021-01-rc3-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2021-01-rc3 (2)

The parameter check for UEFI service GetNextVariableName() is corrected.

The dependencies of CONFIG_DFU_TFTP are simplified.

The set of supported hash algorithms reported by the EFI_TCG2_PROTOCOL is
corrected.
2020-11-21 08:04:39 -05:00
AKASHI Takahiro
c32479d1d2 dfu: simplify the dependencies of DFU_TFTP
Since CONFIG_UPDATE_COMMON always selects CONFIG_DFU_WRITE_ALT, we can
drop the latter from dependencies of CONFIG_DFU_TFTP.

Fixes: 3149e524fc ("common: update: add a generic interface for FIT
       image")
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-11-21 07:26:16 +01:00
Michal Simek
d99f163792 tpm: spi: Cleanup source code
There is no need for GD to be used and priv variable is unused.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-11-20 10:42:54 +01:00
Steven Lawrance
e04072536e drivers: led: bcm6858: set the correct led polarity register
This change sets the output (hardware) polarity register instead of the
input (software) polarity register for the bcm6858 LED controller.  The
logic was inverted (a LED configued active high behaved as active low).

Signed-off-by: Steven Lawrance <steven.lawrance@softathome.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
2020-11-19 09:45:49 -05:00
Tom Rini
e800d715e0 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv
- Enable SATA disk on QEMU RISC-V and update doc.
- k210 pinctrl updates:
  - Fix inverted IE and OE for I2C.
  - Rename power domains to match datasheet.
2020-11-17 09:52:34 -05:00
Sean Anderson
6e35c1cb12 pinctrl: k210: Rename power domains to match datasheet
This renames power domains to match the names on the k210 datasheet.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reported-by: Damien Le Moal <Damien.LeMoal@wdc.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2020-11-17 15:09:28 +08:00
Sean Anderson
82b838f8dd pinctrl: k210: Fix inverted IE and OE for I2C
I2C and SCCB previously shared defaults. However, SCCB needs OE_INV and
IE_INV set, but I2C cannot have those bits set. This adds a separate
default for SCCB.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reported-by: Damien Le Moal <Damien.LeMoal@wdc.com>
2020-11-17 15:09:28 +08:00
Icenowy Zheng
8c51c65273 sunxi: allow to use AXP20[39] attached to I2C0 on V3 series
The reference design of Allwinner V3 series uses an
AXP203 or AXP209 PMIC attached to the I2C0 bus of the SoC, although the
first community-available V3s board, Lichee Pi Zero, omitted it.

Allow to introduce support for the PMIC on boards with it.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-11-17 00:42:21 +00:00
Icenowy Zheng
6ffdc43cc5 clk: sunxi: add compatible string for V3
A new compatible string is introduced for V3 CCU, because it has a few
extra features available.

Add the compatible string to the clock driver. As the extra features are
not touched, just share the description struct now.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-11-17 00:42:21 +00:00
Icenowy Zheng
889116bde6 sunxi: gpio: introduce compatible string for V3 GPIO
A new compatible string is introduced for V3 GPIO, because it has more
pins available than V3s.

Add the compatible string to the GPIO driver.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-11-17 00:42:21 +00:00
Tom Rini
9324c9a823 Merge tag 'ti-v2021.01-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti
- Fix Nokia RX-51 boot issues
- Fix CONFIG_LOGLEVEL on K3 devices
- Add phyBOARD REGOR support
2020-11-16 13:42:29 -05:00
Tom Rini
530dcdd07c - Clock fix MMC driver for SM1 based platforms
- sync SOC Ids from Linux 5.10-rc1
 - fix potential build warning on meson_dw_hdmi and meson-g12a-usb2 phy
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Merge tag 'u-boot-amlogic-20201116' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic

- Clock fix MMC driver for SM1 based platforms
- sync SOC Ids from Linux 5.10-rc1
- fix potential build warning on meson_dw_hdmi and meson-g12a-usb2 phy
2020-11-16 10:50:32 -05:00
Tom Rini
e1fdb2045a Merge tag 'u-boot-rockchip-20201113' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- Fix USB support for rk3399 Pinebook Pro;
- Fix SPI boot for rk3399 boards other than Bob;
- Fix 32bit boards firmware build without SPL_OPTEE support;
- Fix rockchip display driver license;
2020-11-16 09:50:21 -05:00
Pali Rohár
914689a204 mtd: OneNAND: Set MTD type
onenand_probe() function is missing to set mtd->type. So set same type as
which sets onenand Linux kernel driver.

After this change 'mtd list' prints correct type instead of 'Unknown'.

Signed-off-by: Pali Rohár <pali@kernel.org>
2020-11-15 15:29:40 +05:30
Pali Rohár
4fcc084eeb power: twl4030: Add twl4030_i2c_read() function
Function twl4030_i2c_read() is like twl4030_i2c_read_u8() but instead of
single value it rather returns array of values.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2020-11-15 15:25:55 +05:30
Heinrich Schuchardt
a3e458524c cros_ec: Handling EC_CMD_GET_NEXT_EVENT
With commit 6900797678 ("cros_ec: Support keyboard scanning with
EC_CMD_GET_NEXT_EVENT") check_for_keys() tries to read keyboard
strokes using EC_CMD_GET_NEXT_EVENT. But the sandbox driver does
not understand this command. We need to reply with
-EC_RES_INVALID_COMMAND to force check_for_keys() to fall back to
use EC_CMD_MKBP_STATE. Currently the driver prints

    ** Unknown EC command 0x67

in this case. With the patch the message is suppressed.

In a future patch we should upgrade the sandbox driver to provide
EC_CMD_GET_NEXT_EVENT support.

Fixes: 6900797678 ("cros_ec: Support keyboard scanning with EC_CMD_GET_NEXT_EVENT")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-11-14 15:23:41 -07:00
Simon Glass
4cb862fe28 cros_ec: Increase command timeout for flash erase
Erasing the flash can take over a second on some devices and the EC is
not responsive during this time. Update the timeout to 5 seconds to cope
with this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-11-14 15:23:41 -07:00
Simon Glass
d237e9c7c0 cros_ec: Correct collection of EC hash
The EC now requires that the offset field be set correctly when checking
on hash status. Update the code to handle this. Use the same message
struct in both functions to reduce stack space.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-11-14 15:23:41 -07:00
Alper Nebi Yasak
a355ece8e6 video: rockchip: Restrict EDP, VOP, MIPI files to GPL-2.0
These files have a lot of code in common with their counterparts in
coreboot, especially in their earlier revisions:

                  U-Boot                  |                  coreboot
    --------------------------------------|--------------------------------------------
    drivers/video/rockchip/:              | src/soc/rockchip/:
    - rk_edp.c          (GPL-2.0+)        | - common/edp.c          (GPL-2.0-only)
       "                                  | - rk3288/display.c      (GPL-2.0-only)
       "                                  | - rk3399/display.c      (GPL-2.0-only)
    - rk_hdmi.h         (GPL-2.0+)        | (none)
    - rk_hdmi.c         (GPL-2.0+)        | - rk3288/hdmi.c         (GPL-2.0-or-later)
    - rk3288_hdmi.c     (GPL-2.0+)        | - rk3288/hdmi.c         (GPL-2.0-or-later)
    - rk3399_hdmi.c     (GPL-2.0+)        | (none)
    - rk_mipi.h         (GPL-2.0+)        | (none)
    - rk_mipi.c         (GPL-2.0+)        | - rk3399/mipi.c         (GPL-2.0-only)
    - rk3288_mipi.c     (GPL-2.0+)        | - rk3399/mipi.c         (GPL-2.0-only)
    - rk3399_mipi.c     (GPL-2.0+)        | - rk3399/mipi.c         (GPL-2.0-only)
    - rk_lvds.c         (GPL-2.0+)        | (none)
    - rk_vop.h          (GPL-2.0+)        | (none)
    - rk_vop.c          (GPL-2.0+)        | - common/vop.c          (GPL-2.0-only)
    - rk3288_vop.c      (GPL-2.0+)        | - common/vop.c          (GPL-2.0-only)
    - rk3399_vop.c      (GPL-2.0+)        | (none)
                                          |
    arch/arm/include/asm/arch-rockchip/:  | src/soc/rockchip/*/include/soc/*:
    - edp_rk3288.h      (GPL-2.0+)        | - common/.../edp.h      (GPL-2.0-only)
       "                                  | - rk3288/.../display.h  (GPL-2.0-only)
       "                                  | - rk3399/.../display.h  (GPL-2.0-only)
    - vop_rk3288.h      (GPL-2.0+)        | - common/.../vop.h      (GPL-2.0-only)

Restrict the licenses to match coreboot's so that changes from coreboot
can be imported to U-Boot as necessary. HDMI files are already 2.0+
there and rk_lvds.c has no counterpart, so keep them as is.

Cc: Simon Glass <sjg@chromium.org>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Eric Gao <eric.gao@rock-chips.com>
Cc: Jacob Chen <jacob-chen@iotwrt.com>
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2020-11-13 18:16:11 +08:00
Alper Nebi Yasak
eb89025013 rockchip: rk3399: Init clocks in U-Boot proper if SPL was not run
It's possible to chainload U-Boot proper from the vendor firmware in
rk3399 chromebooks, but the way the vendor firmware sets up clocks is
somehow different than what U-Boot expects. This causes the display to
stay devoid of content even though vidconsole claims to work (with
patches in process of being upstreamed).

This is meant to be a rk3399 version of commit d3cb46aa8c ("rockchip:
Init clocks again when chain-loading") which can detect the discrepancy,
but this patch instead checks whether SPL (and therefore the clock init)
was run via the handoff functionality and runs the init if it was not.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2020-11-13 18:15:08 +08:00
Neil Armstrong
0dbb54eb32 mmc: meson-gx: change clock phase value on SM1 SoCs
Amlogic SM1 SoCs doesn't work over 50MHz. When phase sets to 270', it's
working fine over 50MHz on Amlogic SM1 SoCs.
Since Other Amlogic SoCs doens't report an issue, phase value is using
to 180' by default.

To distinguish which value is used adds an u-boot only sm1 compatible.

In future, it needs to find what value is a proper about each SoCs.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
2020-11-12 14:31:29 +01:00
Neil Armstrong
77863d43eb mmc: meson-gx: move arch header to local header
Move the asm/arch-meson/sd_emmc.h to a local meson_gx_mmc.h,
remove the useless if/then and fix the meson_gx_mmc.c include.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-11-12 14:31:29 +01:00
Jaehoon Chung
fe76c4207e video: meson: meson_dw_hdmi: fix the potential build warning
Fix the potential build warning.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-11-12 14:27:38 +01:00
Jaehoon Chung
85c9a7ba8c phy: meson-g12a-usb2: fix the potential build warning
Fix the potential build warning.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-11-12 14:27:38 +01:00
Tom Rini
b3f4873438 Pull request for UEFI sub-system for efi-2021-01-rc2 (2)
The following bugs are fixed:
 
 * The conitrace command failed to build.
 * Non-volatile UEFI variables were not delete form the file store.
 
 The following features are added:
 
 * Support for the FN1 - FN10 keys on crosswire keyboards is added.
 * An EFI binary is provided to dump the binary device tree.
 
 tpm2_get_capability() is adjusted in preparation of the implementation
 of the EFI_TCG2_PROTOCOL.
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Merge tag 'efi-2021-01-rc2-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2021-01-rc2 (2)

The following bugs are fixed:

* The conitrace command failed to build.
* Non-volatile UEFI variables were not delete form the file store.

The following features are added:

* Support for the FN1 - FN10 keys on crosswire keyboards is added.
* An EFI binary is provided to dump the binary device tree.

tpm2_get_capability() is adjusted in preparation of the implementation
of the EFI_TCG2_PROTOCOL.
2020-11-09 15:48:50 -05:00
Marek Vasut
68cbc63da0 net: ks8851: Implement EEPROM MAC address readout
In case there is an EEPROM attached to the KS8851 MAC and the EEPROM
contains a valid MAC address, the MAC address is loaded into the NIC
registers on power on. Read the MAC address out of the NIC registers
and provide it to U-Boot.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2020-11-09 14:18:09 -05:00
Heinrich Schuchardt
b055a05b98 input: add support for FN1 - FN10 on crosswire kbd
Chromebooks and the sandbox use a crosswire keyboard with function keys
FN1 - FN10. These keys are needed when running UEFI applications like GRUB
or the UEFI SCT.

Add support for these keys when translating from key codes to
ECMA-48 (or withdrawn ANSI 3.64) escape sequences.

All escape sequences start with 0x1b. So we should not repeat this
byte in the kbd_to_ansi364 table.

For testing use:

sandbox_defconfig + CONFIG_EFI_SELFTEST=y

$ ./u-boot -D -l

=> setenv efi_selftest extended text input
=> bootefi selftest

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-11-09 17:28:17 +01:00
Tom Rini
22ad69b798 patman status subcommand to collect tags from Patchwork
patman showing email replies from Patchwork
 sandbox poweroff command
 minor fixes in binman, tests
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Merge tag 'dm-pull5nov20' of git://git.denx.de/u-boot-dm

patman status subcommand to collect tags from Patchwork
patman showing email replies from Patchwork
sandbox poweroff command
minor fixes in binman, tests
2020-11-06 11:27:14 -05:00
Tom Rini
d062c1344c Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- Add a new SMBIOS parser and enable it when booting from coreboot
- Fix up various driver names to avoid dtoc warnings
- Fully enable ACPI support on Google Chromebook Coral
- Add a way to set SMBIOS properties using the devicetree
- Update existing boards to use devicetree for SMBIOS using a new
  default sysinfo driver
2020-11-06 09:46:43 -05:00
Simon Glass
44c74bdd58 sysinfo: Provide a default driver to set SMBIOS values
Some boards want to specify the manufacturer or product name but do not
need to have their own sysinfo driver.

Add a default driver which provides a way to specify this SMBIOS
information in the devicetree, without needing any board-specific
functionality.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 10:18:20 +08:00
Simon Glass
3a8ee3df83 board: Rename uclass to sysinfo
This uclass is intended to provide a way to obtain information about a
U-Boot board. But the concept of a U-Boot 'board' is the whole system,
not just one circuit board, meaning that 'board' is something of a
misnomer for this uclass.

In addition, the name 'board' is a bit overused in U-Boot and we want to
use the same uclass to provide SMBIOS information.

The obvious name is 'system' but that is so vague as to be meaningless.
Use 'sysinfo' instead, since this uclass is aimed at providing information
on the system.

Rename everything accordingly.

Note: Due to the patch delta caused by the symbol renames, this patch
shows some renamed files as being deleted in one place and created in
another.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 10:18:20 +08:00
Simon Glass
dd27cd6dab x86: pinctrl: Silence the warning when a pin is not found
This does not necessarily indicate a problem, since some pins are
optional. Let the caller show an error if necessary.
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-11-06 09:51:33 +08:00
Simon Glass
18434aec1b acpi: Don't reset the tables with every new generation
At present if SSDT and DSDT code is created, only the latter is retained
for examination by the 'acpi items' command. Fix this by only resetting
the list when explicitly requested.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 09:51:31 +08:00
Simon Glass
dd30c5bb57 x86: sound: Correct error handling
A few functions have changed to return pin numbers or I2C addresses. The
error checking for some of the callers is therefore wrong. Fix them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 09:51:29 +08:00
Tom Rini
7716c328c8 u-boot-imx for 2021.1
---------------------
 
 - new boards : GE (new B1x5v2), phytec phyCORE-i.MX8MM
 - converted doc to reST
 - fixes for verdin-imx8mm (Toradex)
 - fixes for i.MX thermal driver
 - mx7ulp: Align the PLL_USB frequency
 - mx53: primary/secondary bmode
 
 Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/741465284
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Merge tag 'u-boot-imx-20201105' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx for 2021.1
---------------------

- new boards : GE (new B1x5v2), phytec phyCORE-i.MX8MM
- converted doc to reST
- fixes for verdin-imx8mm (Toradex)
- fixes for i.MX thermal driver
- mx7ulp: Align the PLL_USB frequency
- mx53: primary/secondary bmode

Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/741465284
2020-11-05 11:57:50 -05:00
Alper Nebi Yasak
6900797678 cros_ec: Support keyboard scanning with EC_CMD_GET_NEXT_EVENT
The cros_ec_keyb driver currently uses EC_CMD_MKBP_STATE to scan the
keyboard, but this host command was superseded by EC_CMD_GET_NEXT_EVENT
and unavailable on more recent devices (including gru-kevin), as it was
removed in cros-ec commit 87a071941b89 ("mkbp: Add support for buttons
and switches.") dated 2016-07-06.

The EC_CMD_GET_NEXT_EVENT has been available since cros-ec commit
d1ed75815efe ("MKBP event signalling implementation") dated 2014-10-20,
but it looks like it isn't included in firmware-* branches for at least
link, nyan-big, samus, snow, spring, panther and peach-pit which have
defconfigs in U-Boot. So this patch falls back to the old method if the
EC doesn't recognize the newer command.

The implementation is mostly adapted from Depthcharge commit
f88af26b44fc ("cros_ec: Change keyboard scanning method.").

On a gru-kevin, the current driver before this patch fails to read the
pressed keys with:

    out: cmd=0x60: 03 9d 60 00 00 00 00 00
    in-header: 03 fc 01 00 00 00 00 00
    in-data:
    ec_command_inptr: len=-1, din=0000000000000000
    check_for_keys: keyboard scan failed

However the keyboard works fine with the newer command:

    out: cmd=0x67: 03 96 67 00 00 00 00 00
    in-header: 03 ef 00 00 0e 00 00 00
    in-data: 00 00 00 00 00 00 00 00 00 00 00 00 00 00
    ec_command_inptr: len=14, din=00000000f412df30
    key_matrix_decode: num_keys = 0
      0 valid keycodes found
    out: cmd=0x67: 03 96 67 00 00 00 00 00
    in-header: 03 df 00 00 0e 00 00 00
    in-data: 00 00 00 00 00 00 00 00 00 00 00 00 10 00
    ec_command_inptr: len=14, din=00000000f412df30
    key_matrix_decode: num_keys = 1
      valid=1, row=4, col=11
        keycode=28
      1 valid keycodes found
     {0d}

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-11-05 09:11:31 -07:00
Heinrich Schuchardt
329dccc067 sandbox: implement reset
Up to now the sandbox would shutdown upon a cold reset request. Instead it
should be reset.

In our coding we use static variables like LIST_HEAD(efi_obj_list). A reset
can occur at any time, e.g. via an UEFI binary calling the reset service.
The only safe way to return to an initial state is to relaunch the U-Boot
binary.

The reset implementation uses execv() to relaunch U-Boot.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-11-05 09:11:30 -07:00
Simon Glass
9d20db0483 x86: Fix up driver names to avoid dtoc warnings
At present there are a lot of dtoc warnings reported when building
chromebook_coral, of the form:

   WARNING: the driver intel_apl_lpc was not found in the driver list

Correct these by using driver names that matches their compatible string.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-05 14:58:45 +08:00
Simon Glass
ed0f868d50 cros_ec: Fix up driver names to avoid dtoc warnings
Fix the dtoc warning in these file by using a driver name that matches the
compatible string.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-05 14:58:45 +08:00
Tom Rini
41cab8edbc Pull request for UEFI sub-system for efi-2021-01-rc2 (2)
The series contains the following enhancements
 
 * preparatory patches for UEFI capsule updates
 * initialization of the emulated RTC using an environment variable
 
 and a bug fix
 
 * If DisconnectController() is called for a child controller that is the
   only child of the driver, the driver must be disconnected.
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Merge tag 'efi-2020-01-rc2-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2021-01-rc2 (2)

The series contains the following enhancements

* preparatory patches for UEFI capsule updates
* initialization of the emulated RTC using an environment variable

and a bug fix

* If DisconnectController() is called for a child controller that is the
  only child of the driver, the driver must be disconnected.
2020-11-01 10:56:37 -05:00