Commit graph

10 commits

Author SHA1 Message Date
Tom Rini
c9542eae0b configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-07 20:37:13 -04:00
Andre Przywara
341c058654 sunxi: move CONFIG_SYS_TEXT_BASE out of defconfigs
Commit 278b90ce78 ("configs: Migrate CONFIG_SYS_TEXT_BASE") made
CONFIG_SYS_TEXT_BASE a proper Kconfig variable, with the consequence
of moving the common definition shared by almost every sunxi board
into 123 individual defconfig files. But the U-Boot start address
for Allwinner boards is a platform decision which has been around for
ages, so defining it in each *board* config file seems a bit over the
top.
Define the standard values (160MB into DRAM for most SoCs, with two
SoC exceptions) if ARCH_SUNXI is selected, and delete the lines from
the individual defconfigs.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-03-14 10:45:37 +05:30
Tom Rini
278b90ce78 configs: Migrate CONFIG_SYS_TEXT_BASE
On the NIOS2 and Xtensa architectures, we do not have
CONFIG_SYS_TEXT_BASE set.  This is a strict migration of the current
values into the defconfig and removing them from the headers.

I did not attempt to add more default values in and for now will leave
that to maintainers.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-11 09:30:09 -05:00
Tuomas Tynkkynen
a4fa811463 cmd: Make CONFIG_CMD_FPGA depend on CONFIG_FPGA
cmd/Makefile has:

ifdef CONFIG_FPGA
obj-$(CONFIG_CMD_FPGA) += fpga.o
endif

which means that if CONFIG_FPGA is not set, CONFIG_CMD_FPGA silently
does nothing. Let's remove that Makefile conditional and instead express
this equivalent dependency in Kconfig, so a lot of redundant

 # CONFIG_CMD_FPGA is not set

can be removed from board defconfigs that don't actually have an FPGA.

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-05 20:58:11 -05:00
Tom Rini
308e066566 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2017-10-16 21:35:43 -04:00
Tuomas Tynkkynen
ad12dc1844 cmd: Toggle the default value of CONFIG_CMD_IMLS
Having this as a 'default y' is rather annoying because it doesn't
actually compile unless other options are defined in the board header:

../cmd/bootm.c: In function 'do_imls_nor':
../cmd/bootm.c:330:7: error: 'CONFIG_SYS_MAX_FLASH_BANKS' undeclared (first use in this function); did you mean 'CONFIG_SYS_MAX_FLASH_SECT'?
   i < CONFIG_SYS_MAX_FLASH_BANKS; ++i, ++info) {

Make it 'default n' so people who develop new boards that start from a
blank defconfig have one less compilation failure to debug.

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
2017-10-10 17:51:04 -04:00
Icenowy Zheng
d4aac530c6 sunxi: defaultly enable SPL for Lichee Pi Zero
As we have already DRAM initialization code for V3s SoC, we can
defaultly enable SPL now on Lichee Pi Zero.

Add CONFIG_SPL in Lichee Pi Zero defconfig.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-10-03 19:12:06 +02:00
Tom Rini
ecad7051b0 configs: Migrate all of the existing USB symbols, except fastboot
This syncs all of the currently Kconfig'd symbols out of the headers and
into the defconfig files.  This has two exceptions, first am335x_evm
needs to be converted to DM in SPL and then it can stop undef'ing
CONFIG_DM_USB.  Leaving this as-is results in a build failure, and
without work, run time failure.  The other case is am43xx_evm.h and in
turn am43xx_evm_usbhost_boot.  The problem here is that we need DWC3 USB
host mode in SPL, but still desire to have gadget mode in U-Boot proper.

Signed-off-by: Tom Rini <trini@konsulko.com>
2017-09-01 16:18:20 -04:00
Tom Rini
2681e78a5e configs: Re-sync
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-05-01 11:44:12 -04:00
Icenowy Zheng
f02abb0608 sunxi: add support for Lichee Pi Zero
Lichee Pi Zero is a development board with a V3s SoC, which features
64MiB DRAM co-packaged within the SoC, a TF slot, a SPI NOR slot (not
soldered in production batch), a 40-pin RGB LCD connector and some extra
pins available as 2.54mm pins or stamp holes.

Add support for it.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-21 09:29:35 +02:00