mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-10 07:04:28 +00:00
configs: Migrate CONFIG_SYS_TEXT_BASE
On the NIOS2 and Xtensa architectures, we do not have CONFIG_SYS_TEXT_BASE set. This is a strict migration of the current values into the defconfig and removing them from the headers. I did not attempt to add more default values in and for now will leave that to maintainers. Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
parent
7c8f00e484
commit
278b90ce78
1327 changed files with 1082 additions and 709 deletions
8
Kconfig
8
Kconfig
|
@ -378,15 +378,13 @@ config SYS_EXTRA_OPTIONS
|
|||
new boards should not use this option.
|
||||
|
||||
config SYS_TEXT_BASE
|
||||
depends on ARC || X86 || ARCH_UNIPHIER || ARCH_ZYNQMP || \
|
||||
(M68K && !TARGET_ASTRO_MCF5373L) || MICROBLAZE || MIPS || \
|
||||
ARCH_ZYNQ || ARCH_KEYSTONE || ARCH_OMAP2PLUS
|
||||
depends on !NIOS2 && !XTENSA
|
||||
depends on !EFI_APP
|
||||
default 0x80800000 if ARCH_OMAP2PLUS
|
||||
hex "Text Base"
|
||||
help
|
||||
TODO: Move CONFIG_SYS_TEXT_BASE for all the architecture
|
||||
The address in memory that U-Boot will be running from, initially.
|
||||
|
||||
default 0x80800000 if ARCH_OMAP2PLUS
|
||||
|
||||
|
||||
config SYS_CLK_FREQ
|
||||
|
|
|
@ -14,7 +14,6 @@
|
|||
#define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
|
||||
|
||||
/* Memory Info */
|
||||
#define CONFIG_SYS_TEXT_BASE 0x61000000
|
||||
#define CONFIG_SYS_SDRAM_BASE 0x61000000
|
||||
|
||||
#endif /* __IPROC_COMMON_CONFIGS_H */
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SUNXI=y
|
||||
CONFIG_SYS_TEXT_BASE=0x4a000000
|
||||
CONFIG_MACH_SUN4I=y
|
||||
CONFIG_DRAM_CLK=480
|
||||
CONFIG_DRAM_EMR1=4
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SUNXI=y
|
||||
CONFIG_SYS_TEXT_BASE=0x4a000000
|
||||
CONFIG_MACH_SUN5I=y
|
||||
CONFIG_DRAM_CLK=432
|
||||
CONFIG_MMC0_CD_PIN="PG1"
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SUNXI=y
|
||||
CONFIG_SYS_TEXT_BASE=0x4a000000
|
||||
CONFIG_MACH_SUN5I=y
|
||||
CONFIG_DRAM_CLK=408
|
||||
CONFIG_DRAM_EMR1=0
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SUNXI=y
|
||||
CONFIG_SYS_TEXT_BASE=0x4a000000
|
||||
CONFIG_MACH_SUN5I=y
|
||||
CONFIG_DRAM_CLK=408
|
||||
CONFIG_DRAM_EMR1=0
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SUNXI=y
|
||||
CONFIG_SYS_TEXT_BASE=0x4a000000
|
||||
CONFIG_MACH_SUN7I=y
|
||||
CONFIG_DRAM_CLK=384
|
||||
CONFIG_MMC0_CD_PIN="PH1"
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SUNXI=y
|
||||
CONFIG_SYS_TEXT_BASE=0x4a000000
|
||||
CONFIG_MACH_SUN7I=y
|
||||
CONFIG_DRAM_CLK=384
|
||||
CONFIG_MMC0_CD_PIN="PH1"
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SUNXI=y
|
||||
CONFIG_SYS_TEXT_BASE=0x4a000000
|
||||
CONFIG_MACH_SUN7I=y
|
||||
CONFIG_DRAM_CLK=384
|
||||
CONFIG_MMC0_CD_PIN="PH1"
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SUNXI=y
|
||||
CONFIG_SYS_TEXT_BASE=0x4a000000
|
||||
CONFIG_MACH_SUN7I=y
|
||||
CONFIG_DRAM_CLK=384
|
||||
CONFIG_MMC0_CD_PIN="PH1"
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SUNXI=y
|
||||
CONFIG_SYS_TEXT_BASE=0x4a000000
|
||||
CONFIG_MACH_SUN7I=y
|
||||
CONFIG_DRAM_CLK=384
|
||||
CONFIG_MMC0_CD_PIN="PH1"
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SUNXI=y
|
||||
CONFIG_SYS_TEXT_BASE=0x4a000000
|
||||
CONFIG_MACH_SUN7I=y
|
||||
CONFIG_DRAM_CLK=384
|
||||
CONFIG_MMC0_CD_PIN="PH1"
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SUNXI=y
|
||||
CONFIG_SYS_TEXT_BASE=0x4a000000
|
||||
CONFIG_CONS_INDEX=1
|
||||
CONFIG_MACH_SUN8I_A33=y
|
||||
CONFIG_DRAM_CLK=432
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SUNXI=y
|
||||
CONFIG_SYS_TEXT_BASE=0x4a000000
|
||||
CONFIG_MACH_SUN7I=y
|
||||
CONFIG_DRAM_CLK=432
|
||||
CONFIG_DRAM_ZQ=123
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SUNXI=y
|
||||
CONFIG_SYS_TEXT_BASE=0x4a000000
|
||||
CONFIG_MACH_SUN5I=y
|
||||
CONFIG_DRAM_CLK=432
|
||||
CONFIG_MMC0_CD_PIN="PG0"
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SUNXI=y
|
||||
CONFIG_SYS_TEXT_BASE=0x4a000000
|
||||
CONFIG_MACH_SUN5I=y
|
||||
CONFIG_DRAM_CLK=408
|
||||
CONFIG_DRAM_EMR1=0
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SUNXI=y
|
||||
CONFIG_SYS_TEXT_BASE=0x4a000000
|
||||
CONFIG_MACH_SUN5I=y
|
||||
CONFIG_DRAM_CLK=432
|
||||
CONFIG_USB1_VBUS_PIN="PG13"
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0x00201000
|
||||
CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
||||
CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
||||
CONFIG_SPL_SERIAL_SUPPORT=y
|
||||
|
|
|
@ -1,11 +1,12 @@
|
|||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFFF40000
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_B4420QDS=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000"
|
||||
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH"
|
||||
CONFIG_BOOTDELAY=10
|
||||
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
|
||||
CONFIG_HUSH_PARSER=y
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xEFF40000
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_B4420QDS=y
|
||||
CONFIG_FIT=y
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0x00201000
|
||||
CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
||||
CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
||||
CONFIG_SPL_SERIAL_SUPPORT=y
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xEFF40000
|
||||
CONFIG_SECURE_BOOT=y
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_B4860QDS=y
|
||||
|
|
|
@ -1,11 +1,12 @@
|
|||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFFF40000
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_B4860QDS=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000"
|
||||
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH"
|
||||
CONFIG_BOOTDELAY=10
|
||||
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
|
||||
CONFIG_HUSH_PARSER=y
|
||||
|
|
|
@ -1,11 +1,12 @@
|
|||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFFF40000
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_B4860QDS=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_OF_STDOUT_VIA_ALIAS=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000"
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SRIO_PCIE_BOOT_SLAVE"
|
||||
CONFIG_BOOTDELAY=10
|
||||
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
|
||||
CONFIG_HUSH_PARSER=y
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xEFF40000
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_B4860QDS=y
|
||||
CONFIG_FIT=y
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0x00201000
|
||||
CONFIG_SPL_SERIAL_SUPPORT=y
|
||||
CONFIG_SPL_NAND_SUPPORT=y
|
||||
CONFIG_MPC85xx=y
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0x00201000
|
||||
CONFIG_SPL_SERIAL_SUPPORT=y
|
||||
CONFIG_SPL_NAND_SUPPORT=y
|
||||
CONFIG_MPC85xx=y
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0x11000000
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_BSC9131RDB=y
|
||||
CONFIG_FIT=y
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0x11000000
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_BSC9131RDB=y
|
||||
CONFIG_FIT=y
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0x11000000
|
||||
CONFIG_SECURE_BOOT=y
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_BSC9132QDS=y
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0x00201000
|
||||
CONFIG_SPL_SERIAL_SUPPORT=y
|
||||
CONFIG_SPL_NAND_SUPPORT=y
|
||||
CONFIG_MPC85xx=y
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0x11000000
|
||||
CONFIG_SECURE_BOOT=y
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_BSC9132QDS=y
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0x00201000
|
||||
CONFIG_SPL_SERIAL_SUPPORT=y
|
||||
CONFIG_SPL_NAND_SUPPORT=y
|
||||
CONFIG_MPC85xx=y
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0x8FF40000
|
||||
CONFIG_SECURE_BOOT=y
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_BSC9132QDS=y
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0x8FF40000
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_BSC9132QDS=y
|
||||
CONFIG_FIT=y
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0x8FF40000
|
||||
CONFIG_SECURE_BOOT=y
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_BSC9132QDS=y
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0x8FF40000
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_BSC9132QDS=y
|
||||
CONFIG_FIT=y
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0x11000000
|
||||
CONFIG_SECURE_BOOT=y
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_BSC9132QDS=y
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0x11000000
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_BSC9132QDS=y
|
||||
CONFIG_FIT=y
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0x11000000
|
||||
CONFIG_SECURE_BOOT=y
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_BSC9132QDS=y
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0x11000000
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_BSC9132QDS=y
|
||||
CONFIG_FIT=y
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0x11000000
|
||||
CONFIG_SECURE_BOOT=y
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_BSC9132QDS=y
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0x11000000
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_BSC9132QDS=y
|
||||
CONFIG_FIT=y
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0x11000000
|
||||
CONFIG_SECURE_BOOT=y
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_BSC9132QDS=y
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0x11000000
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_BSC9132QDS=y
|
||||
CONFIG_FIT=y
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SUNXI=y
|
||||
CONFIG_SYS_TEXT_BASE=0x4a000000
|
||||
CONFIG_MACH_SUN8I_R40=y
|
||||
CONFIG_DRAM_CLK=576
|
||||
CONFIG_DRAM_ZQ=3881979
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SUNXI=y
|
||||
CONFIG_SYS_TEXT_BASE=0x4a000000
|
||||
CONFIG_MACH_SUN7I=y
|
||||
CONFIG_DRAM_CLK=432
|
||||
CONFIG_MACPWR="PH23"
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SUNXI=y
|
||||
CONFIG_SYS_TEXT_BASE=0x4a000000
|
||||
CONFIG_CONS_INDEX=1
|
||||
CONFIG_MACH_SUN8I_A33=y
|
||||
CONFIG_DRAM_CLK=600
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SUNXI=y
|
||||
CONFIG_SYS_TEXT_BASE=0x4a000000
|
||||
CONFIG_MACH_SUN7I=y
|
||||
CONFIG_DRAM_CLK=432
|
||||
CONFIG_MACPWR="PH23"
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0x11001000
|
||||
CONFIG_SPL_SERIAL_SUPPORT=y
|
||||
CONFIG_TPL_LIBCOMMON_SUPPORT=y
|
||||
CONFIG_TPL_LIBGENERIC_SUPPORT=y
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xEFF40000
|
||||
CONFIG_SECURE_BOOT=y
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_C29XPCIE=y
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0x11000000
|
||||
CONFIG_SECURE_BOOT=y
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_C29XPCIE=y
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0x11000000
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_C29XPCIE=y
|
||||
CONFIG_FIT=y
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xEFF40000
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_C29XPCIE=y
|
||||
CONFIG_FIT=y
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SUNXI=y
|
||||
CONFIG_SYS_TEXT_BASE=0x4a000000
|
||||
CONFIG_MACH_SUN5I=y
|
||||
CONFIG_DRAM_TIMINGS_DDR3_800E_1066G_1333J=y
|
||||
CONFIG_USB0_VBUS_PIN="PB10"
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SUNXI=y
|
||||
CONFIG_SYS_TEXT_BASE=0x4a000000
|
||||
CONFIG_SPL_NAND_SUPPORT=y
|
||||
CONFIG_MACH_SUN5I=y
|
||||
CONFIG_DRAM_TIMINGS_DDR3_800E_1066G_1333J=y
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SUNXI=y
|
||||
CONFIG_SYS_TEXT_BASE=0x4a000000
|
||||
CONFIG_MACH_SUN6I=y
|
||||
CONFIG_DRAM_CLK=432
|
||||
CONFIG_USB1_VBUS_PIN=""
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SUNXI=y
|
||||
CONFIG_SYS_TEXT_BASE=0x4a000000
|
||||
CONFIG_MACH_SUN4I=y
|
||||
CONFIG_DRAM_CLK=408
|
||||
CONFIG_DRAM_EMR1=4
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SUNXI=y
|
||||
CONFIG_SYS_TEXT_BASE=0x4a000000
|
||||
CONFIG_MACH_SUN6I=y
|
||||
CONFIG_DRAM_CLK=240
|
||||
CONFIG_DRAM_ZQ=251
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SUNXI=y
|
||||
CONFIG_SYS_TEXT_BASE=0x4a000000
|
||||
CONFIG_MACH_SUN7I=y
|
||||
CONFIG_DRAM_CLK=480
|
||||
CONFIG_MMC0_CD_PIN="PH1"
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SUNXI=y
|
||||
CONFIG_SYS_TEXT_BASE=0x2a000000
|
||||
CONFIG_MACH_SUN9I=y
|
||||
CONFIG_DRAM_CLK=672
|
||||
CONFIG_MMC0_CD_PIN="PH18"
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SUNXI=y
|
||||
CONFIG_SYS_TEXT_BASE=0x4a000000
|
||||
CONFIG_MACH_SUN4I=y
|
||||
CONFIG_DRAM_CLK=480
|
||||
CONFIG_MMC0_CD_PIN="PH1"
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SUNXI=y
|
||||
CONFIG_SYS_TEXT_BASE=0x4a000000
|
||||
CONFIG_MACH_SUN7I=y
|
||||
CONFIG_DRAM_CLK=432
|
||||
CONFIG_MMC0_CD_PIN="PH1"
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SUNXI=y
|
||||
CONFIG_SYS_TEXT_BASE=0x4a000000
|
||||
CONFIG_MACH_SUN8I_A83T=y
|
||||
CONFIG_DRAM_CLK=672
|
||||
CONFIG_DRAM_ZQ=15355
|
||||
|
|
|
@ -1,11 +1,12 @@
|
|||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFFF40000
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_CYRUS_P5020=y
|
||||
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SYS_TEXT_BASE=0xFFF40000"
|
||||
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL"
|
||||
CONFIG_BOOTDELAY=10
|
||||
CONFIG_CONSOLE_MUX=y
|
||||
CONFIG_BOARD_EARLY_INIT_F=y
|
||||
|
|
|
@ -1,11 +1,12 @@
|
|||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFFF40000
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_TARGET_CYRUS_P5040=y
|
||||
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SYS_TEXT_BASE=0xFFF40000"
|
||||
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL"
|
||||
CONFIG_BOOTDELAY=10
|
||||
CONFIG_CONSOLE_MUX=y
|
||||
CONFIG_BOARD_EARLY_INIT_F=y
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SUNXI=y
|
||||
CONFIG_SYS_TEXT_BASE=0x4a000000
|
||||
CONFIG_MACH_SUN5I=y
|
||||
CONFIG_DRAM_CLK=432
|
||||
CONFIG_DRAM_EMR1=0
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SUNXI=y
|
||||
CONFIG_SYS_TEXT_BASE=0x4a000000
|
||||
CONFIG_MACH_SUN5I=y
|
||||
CONFIG_DRAM_CLK=408
|
||||
CONFIG_MMC0_CD_PIN="PG0"
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SUNXI=y
|
||||
CONFIG_SYS_TEXT_BASE=0x4a000000
|
||||
CONFIG_MACH_SUN6I=y
|
||||
CONFIG_DRAM_ZQ=251
|
||||
CONFIG_USB1_VBUS_PIN="PH24"
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SUNXI=y
|
||||
CONFIG_SYS_TEXT_BASE=0x4a000000
|
||||
CONFIG_MACH_SUN4I=y
|
||||
CONFIG_DRAM_EMR1=4
|
||||
CONFIG_USB0_VBUS_PIN="PB09"
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SUNXI=y
|
||||
CONFIG_SYS_TEXT_BASE=0x4a000000
|
||||
CONFIG_MACH_SUN7I=y
|
||||
CONFIG_DRAM_CLK=480
|
||||
CONFIG_MMC0_CD_PIN="PH1"
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SUNXI=y
|
||||
CONFIG_SYS_TEXT_BASE=0x4a000000
|
||||
CONFIG_MACH_SUN7I=y
|
||||
CONFIG_DRAM_CLK=432
|
||||
CONFIG_MACPWR="PH23"
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SUNXI=y
|
||||
CONFIG_SYS_TEXT_BASE=0x42e00000
|
||||
CONFIG_MACH_SUN8I_V3S=y
|
||||
CONFIG_DRAM_CLK=360
|
||||
CONFIG_DRAM_ZQ=14779
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SUNXI=y
|
||||
CONFIG_SYS_TEXT_BASE=0x4a000000
|
||||
CONFIG_MACH_SUN7I=y
|
||||
CONFIG_DRAM_CLK=408
|
||||
CONFIG_DRAM_ZQ=122
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SUNXI=y
|
||||
CONFIG_SYS_TEXT_BASE=0x4a000000
|
||||
CONFIG_MACH_SUN7I=y
|
||||
CONFIG_DRAM_CLK=480
|
||||
CONFIG_DRAM_ZQ=122
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SUNXI=y
|
||||
CONFIG_SYS_TEXT_BASE=0x4a000000
|
||||
CONFIG_MACH_SUN4I=y
|
||||
CONFIG_USB1_VBUS_PIN=""
|
||||
CONFIG_USB2_VBUS_PIN=""
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0x00000000
|
||||
CONFIG_SYS_TEXT_BASE=0x0
|
||||
CONFIG_TARGET_M5208EVBE=y
|
||||
CONFIG_BOOTDELAY=1
|
||||
# CONFIG_DISPLAY_BOARDINFO is not set
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0x00000000
|
||||
CONFIG_SYS_TEXT_BASE=0x0
|
||||
CONFIG_TARGET_M52277EVB=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SYS_SPANSION_BOOT"
|
||||
CONFIG_BOOTDELAY=3
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0xffe00000
|
||||
CONFIG_SYS_TEXT_BASE=0xFFE00000
|
||||
CONFIG_TARGET_M5249EVB=y
|
||||
CONFIG_SYS_CONSOLE_INFO_QUIET=y
|
||||
# CONFIG_DISPLAY_BOARDINFO is not set
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0xffe00000
|
||||
CONFIG_SYS_TEXT_BASE=0xFFE00000
|
||||
CONFIG_TARGET_M5272C3=y
|
||||
CONFIG_BOOTDELAY=5
|
||||
# CONFIG_DISPLAY_BOARDINFO is not set
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0xffe00000
|
||||
CONFIG_SYS_TEXT_BASE=0xFFE00000
|
||||
CONFIG_TARGET_M5275EVB=y
|
||||
CONFIG_BOOTDELAY=5
|
||||
# CONFIG_DISPLAY_BOARDINFO is not set
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0x00000000
|
||||
CONFIG_SYS_TEXT_BASE=0x0
|
||||
CONFIG_TARGET_M53017EVB=y
|
||||
CONFIG_BOOTDELAY=1
|
||||
CONFIG_USE_BOOTARGS=y
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0x00000000
|
||||
CONFIG_SYS_TEXT_BASE=0x0
|
||||
CONFIG_TARGET_M5329EVB=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="NANDFLASH_SIZE=0"
|
||||
CONFIG_BOOTDELAY=1
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0x00000000
|
||||
CONFIG_SYS_TEXT_BASE=0x0
|
||||
CONFIG_TARGET_M5329EVB=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="NANDFLASH_SIZE=16"
|
||||
CONFIG_BOOTDELAY=1
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0x00000000
|
||||
CONFIG_SYS_TEXT_BASE=0x0
|
||||
CONFIG_TARGET_M5373EVB=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="NANDFLASH_SIZE=16"
|
||||
CONFIG_BOOTDELAY=1
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0x00000000
|
||||
CONFIG_SYS_TEXT_BASE=0x0
|
||||
CONFIG_TARGET_M54451EVB=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SYS_INPUT_CLKSRC=24000000"
|
||||
CONFIG_BOOTDELAY=1
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0x47e00000
|
||||
CONFIG_SYS_TEXT_BASE=0x47E00000
|
||||
CONFIG_TARGET_M54451EVB=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_STMICRO_BOOT,SYS_INPUT_CLKSRC=24000000"
|
||||
CONFIG_BOOTDELAY=1
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0x04000000
|
||||
CONFIG_SYS_TEXT_BASE=0x4000000
|
||||
CONFIG_TARGET_M54455EVB=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SYS_ATMEL_BOOT,SYS_INPUT_CLKSRC=66666666"
|
||||
CONFIG_BOOTDELAY=1
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0x04000000
|
||||
CONFIG_SYS_TEXT_BASE=0x4000000
|
||||
CONFIG_TARGET_M54455EVB=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SYS_ATMEL_BOOT,SYS_INPUT_CLKSRC=33333333"
|
||||
CONFIG_BOOTDELAY=1
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0x00000000
|
||||
CONFIG_SYS_TEXT_BASE=0x0
|
||||
CONFIG_TARGET_M54455EVB=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SYS_INTEL_BOOT,SYS_INPUT_CLKSRC=66666666"
|
||||
CONFIG_BOOTDELAY=1
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
CONFIG_M68K=y
|
||||
CONFIG_SYS_TEXT_BASE=0x00000000
|
||||
CONFIG_SYS_TEXT_BASE=0x0
|
||||
CONFIG_TARGET_M54455EVB=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SYS_INTEL_BOOT,SYS_INPUT_CLKSRC=33333333"
|
||||
CONFIG_BOOTDELAY=1
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0x4000000
|
||||
CONFIG_8xx=y
|
||||
CONFIG_TARGET_MCR3000=y
|
||||
CONFIG_8xx_GCLK_FREQ=132000000
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_SUNXI=y
|
||||
CONFIG_SYS_TEXT_BASE=0x4a000000
|
||||
CONFIG_MACH_SUN7I=y
|
||||
CONFIG_DRAM_CLK=384
|
||||
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-mk808c"
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFE000000
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_TARGET_MPC8308RDB=y
|
||||
CONFIG_FIT=y
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFE000000
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_TARGET_MPC8313ERDB=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFE000000
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_TARGET_MPC8313ERDB=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0x00100000
|
||||
CONFIG_SPL_SERIAL_SUPPORT=y
|
||||
CONFIG_SPL_NAND_SUPPORT=y
|
||||
CONFIG_MPC83xx=y
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0x00100000
|
||||
CONFIG_SPL_SERIAL_SUPPORT=y
|
||||
CONFIG_SPL_NAND_SUPPORT=y
|
||||
CONFIG_MPC83xx=y
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFE000000
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_TARGET_MPC8315ERDB=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
CONFIG_PPC=y
|
||||
CONFIG_SYS_TEXT_BASE=0xFE000000
|
||||
CONFIG_MPC83xx=y
|
||||
CONFIG_TARGET_MPC8323ERDB=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue