Commit graph

11 commits

Author SHA1 Message Date
Tom Rini
9ae0d55074 OMAP3 SPL: Rework memory initalization and devkit8000 support
This changes to making the board be responsible for providing the
memory initialization timings in SPL and converts the devkit8000
to this framework.  In SPL we try and initialize both CS0 and CS1.

Cc: Frederik Kriewitz <frederik@kriewitz.eu>
Signed-off-by: Tom Rini <trini@ti.com>
2011-12-06 23:59:38 +01:00
Tom Rini
2a04e85870 OMAP3: Add a helper function to set timings in SDRC
Since we go through the sequence to setup the SDRC timings more than
once, break this logic out into its own function and have that function
call mem_ok() to make sure the memory is usable.

Signed-off-by: Tom Rini <trini@ti.com>
2011-12-06 23:59:38 +01:00
Tom Rini
5f862b7179 OMAP3: Update SDRC dram_init to always call make_cs1_contiguous()
We update the comment in make_cs1_contiguous() to be a little bit
more clear (it's been copy/pasted from other silicons) and then
explain in dram_init() why we need to always try this.

Note that in the previous behavior we were always calling this on
boards that never had cs1 populated anyhow so making sure we do
this always is fine and will correct things like omap3evm detecting
an invalid amount of memory (384MB).

Signed-off-by: Tom Rini <trini@ti.com>
2011-12-06 23:59:37 +01:00
Simon Schwarz
b88e42560b omap3: Configure RAM bank 0 if in SPL
OMAP3 relied on the memory config done by X-loader or Configuration Header. This
has to be reworked for the implementation of a SPL. This patch configures RAM
bank 0 if CONFIG_SPL_BUILD is set. Settings for Micron-RAM used by devkit8000
are added to mem.h

Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-30 22:00:54 +02:00
Nishanth Menon
ee3894c681 omap3: emif|sdrc: use a single global data define
DECLARE_GLOBAL_DATA_PTR declarations in functions are inherently
troublesome with various compilers (e.g. gcc 4.5)

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-12-11 11:41:42 -05:00
Heiko Schocher
0fc43a417c armv7, beagle: Second SDRAM bank don;t work
since commit 3667cbeed5
on beagle board the second sdram bank didn;t longer
work. Since this patch sdram settings just get copied
from bank a, but CMD_NOP, CMD_PRECHARGE, CMD_AUTOREFRESH
are not executed and after that mr register is also
not updated. This patch adds this for the bank b.

Signed-off-by: Heiko Schocher <hs@denx.de>
cc: Steve Sakoman <steve@sakoman.com>
cc: Sandeep Paulraj <s-paulraj@ti.com>
cc: Wolfgang Denk <wd@denx.de>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-11-04 16:05:25 -04:00
Wolfgang Denk
a9aa392629 Drop support for CONFIG_SYS_ARM_WITHOUT_RELOC
When this define was introduced, the idea was to provide a soft
migration path for ARM boards to get adapted to the new relocation
support.  However, other recent changes led to a different
implementation (ELF relocation), where this no longer works.  By now
CONFIG_SYS_ARM_WITHOUT_RELOC does not only not help any more, but it
actually hurts because it obfuscates the actual code by sprinkling it
with lots of dead and non-working debris.

So let's make a clean cut and drop CONFIG_SYS_ARM_WITHOUT_RELOC.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
Tested-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2010-10-29 21:39:59 +02:00
Steve Sakoman
136c69ad79 ARMV7: OMAP3: Fix bug in get_sdr_cs_offset()
This patch fixes a typo in the routine to calculate the cs offset
based upon the contents of the SDRC cs_cfg register.  This function
mistakenly shifts the CS1STARTLOW field 17 bits right instead of
17 bits left.

This hasn't been an issue to date because all OMAP3 boards currently
are configured to have zeros in this field.

Reported-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Steve Sakoman <steve.sakoman@linaro.org>
2010-10-17 20:14:28 +02:00
Heiko Schocher
561142af20 ARM: implement relocation for ARM V7 (OMAP)
Change the implementation for ARM V7 to relocate the code to an
arbitrary address in RAM.

Adapt the Beagle board (Cortex A8) to test the changes.

Portions of this work were supported by funding from
the CE Linux Forum.

Signed-off-by: Heiko Schocher <hs@denx.de>
2010-09-19 19:29:53 +02:00
Steve Sakoman
3667cbeed5 ARMV7: OMAP3: Remove erroneous hard coded sdram setup for 128MB/bank
Upcoming Beagle and Overo revisions use POP memory with 256MB or 512MB
per bank.  This patches uses the SDRC settings from x-load or the config
header to set up timing properly.

Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-09-08 14:51:24 -04:00
Steve Sakoman
f56348af5d ARM: Rename arch/arm/cpu/arm_cortexa8 to armv7
The purpose of this patch is to prepare for adding the OMAP4 architecture, which is Cortex A9

Cortex A8 and A9 both belong to the armv7 architecture, hence the name change.

The two architectures are similar enough that substantial code can be shared.

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-07-05 19:59:55 -04:00
Renamed from arch/arm/cpu/arm_cortexa8/omap3/sdrc.c (Browse further)