Commit graph

5775 commits

Author SHA1 Message Date
Khoronzhuk, Ivan
3fe93623cc net: keystone_net: register eth PHYs on MDIO bus
As MDIO bus has been added we can register PHYs with it.
After registration, the PHY driver will be probed according to the
hardware on board.

Startup PHY at the ethernet open.

Use phy_startup() instead of keystone_get_link_status() when eth open,
as it verifies PHY link inside and SGMII link is checked before.

For K2HK evm PHY configuration at init was absent, so don't enable
phy config at init for k2hk evm.

Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
2014-10-23 11:27:28 -04:00
Khoronzhuk, Ivan
550c5ce6f5 net: keystone_net: register MDIO bus
Currently MDIO framework is not used to configure Ethernet PHY.
As result some of already implemented functions are duplicated.
So register MDIO bus in order to use it. On that stage it's just
registered, it'll be used as we start to use PHY framework.

Use mdio bus read/write/reset functions in the driver.

Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
2014-10-23 11:27:28 -04:00
Khoronzhuk, Ivan
1920e905ef net: keystone_net: use mdio_reset function
Don't use mdio_enable twice while eth open. Also rename it to
keystone2_mdio_reset as more appropriate name.

Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
2014-10-23 11:27:28 -04:00
Khoronzhuk, Ivan
adc9a79f3f net: phy: print a number of phy that is not found
In case when several Ethernet ports are supported it's
convenient to see the number of phy that is not found.

Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
2014-10-23 11:27:28 -04:00
Khoronzhuk, Ivan
496191c7ab soc: keystone_serdes: generalize configuration mechanism
The cmu, comlane, lane configuration mechanism are similar for sub
systems as well such as PCI or sRIO, but they have different values
based on input clock and output bus rate. According to this compact
driver to simplify adding different configuration settings based
on clock and rate.

Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
2014-10-23 11:27:28 -04:00
Hao Zhang
92a16c81f5 soc: keystone_serdes: generalize to be used by other sub systems
SerDes driver is used by other sub systems like PCI, sRIO etc.
So modify it to be more general. The SerDes driver provides common
API's that can also be extended for other peripherals SerDes
configurations.

Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
2014-10-23 11:27:28 -04:00
Hao Zhang
95f74dad91 soc: keystone_serdes: enhance to use cmu/comlane/lane specific configurations
Enhance the driver to use cmu/comlane/lane specific configurations
instead of 1 big array of configuration.

Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
2014-10-23 11:27:28 -04:00
Khoronzhuk, Ivan
a43febde44 soc: keystone_serdes: create a separate SGMII SerDes driver
This patch split the Keystone II SGMII SerDes related code from
Ethernet driver and create a separate SGMII SerDes driver.
The SerDes driver can be used by others keystone subsystems
like PCI, sRIO, so move it to driver/soc/keystone directory.

Add soc specific drivers directory like in the Linux kernel.
It is going to be used by keysotone soc specific drivers.

Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
2014-10-23 11:27:28 -04:00
Khoronzhuk, Ivan
497e9e0321 net: keystone_net: remove redundant code from keystone_net.c
Remove unused tx_send_loop variable.

Removes duplicated get_link_status() call from the
keystone2_eth_send_packet().

The emac_gigabit_enable() is called at opening Ethernet and there is no
need to enable it on sending each packet. So remove that call
from keystone2_eth_send_packet() as well.

The calling of power/clock up functions are mostly the responsibility
of SoC/board code, so move these functions to appropriate place.

Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
2014-10-23 11:27:05 -04:00
Khoronzhuk, Ivan
0935cac685 net: keystone_net: move header file from arch to ti-common
The header file for the driver should be in correct place.
So move it to "arch/arm/include/asm/ti-common/keystone_net.h"
and correct driver's external dependencies. At the same time
align and correct some definitions.

Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
2014-10-23 11:27:05 -04:00
Hao Zhang
b2cfe32278 net: keystone_net: remove SoC specific emac_regs structure
This patch removes K2HK SOC specifc emac_regs structure, it uses
soc specific register offset to keep the network driver common across
all the Keystone II EVMs.

Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
2014-10-23 11:27:05 -04:00
WingMan Kwok
bc0e8d7c5d keystone: usb: add support of usb xhci
Add support of usb xhci. xHCI controls all USB speeds of the Host
mode, that is, the SS through the SS PHY, as well as the HS, FS, and
LS through the USB2 PHY. xHCI replaces and supersedes all previous
host HCIs (HS-only EHCI, FS/LS OHCI and UHCI), and is therefore not
backwards compatible with any of them. The USB3SS’s USB Controller is
fully compliant with xHC.

Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: WingMan Kwok <w-kwok2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
2014-10-23 11:27:04 -04:00
Khoronzhuk, Ivan
9ea9021ac4 dma: keystone_nav: generalize driver usage
The keystone_nav driver is general driver intended to be used for
working with queue manager and pktdma for different IPs like NETCP,
AIF, FFTC, etc. So the it's API shouldn't be named like it works only
with one of them, it should be general names. The names with prefix
like netcp_* rather do for drivers/net/keystone_net.c driver. So it's
good to generalize this driver to be used for different IP's and
delete confusion with real NETCP driver.

The current netcp_* functions of keystone navigator can be used for
other settings of pktdma, not only for NETCP. The API of this driver
is used by the keystone_net driver to work with NETCP, so net driver
also should be corrected. For convenience collect pkdma
configurations in drivers/dma/keystone_nav_cfg.c.

Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
2014-10-23 11:27:04 -04:00
Khoronzhuk, Ivan
ef4547176d dma: keystone_nav: move keystone_nav driver to driver/dma/
The keystone_nav is used by drivers/net/keystone_net.c driver to
send and receive packets, but currently it's placed at keystone
arch sources. So it should be in the drivers directory also.
It's separate driver that can be used for sending and receiving
pktdma packets by others drivers also.

This patch just move this driver to appropriate directory and
doesn't add any functional changes.

Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
2014-10-23 11:27:04 -04:00
Stefan Roese
6d5fe560a5 i2c: mvtwsi: Add support for Marvell Armada XP
To support the Armada XP SoC, we just need to include the correct header.

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
Tested-by: Luka Perkov <luka@openwrt.org>
2014-10-23 09:59:21 -04:00
Stefan Roese
19fc2eae6d net: mvneta.c: Add support for the ethernet controller of the Marvell Armada XP SoC
This patch adds support for the NETA ethernet controller which is integrated
in the Marvell Armada XP SoC's. This port is based on the Linux driver which
has been stripped of the in U-Boot unused portions.

Tested on the Marvell MV78460 eval board db-78460-bp.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Tested-by: Luka Perkov <luka@openwrt.org>
2014-10-23 09:59:21 -04:00
Stefan Roese
4fd7717e8e spi: kirkwood_spi.c: Change KW_SPI_BASE to MVEBU_SPI_BASE
This makes is possible to use this SPI driver from other MVEBU SoC's as well.
As the upcoming Armada XP support will do.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Tested-by: Luka Perkov <luka@openwrt.org>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
2014-10-23 09:59:21 -04:00
Stefan Roese
4aceea2088 spi: kirkwood_spi.c: Compile MPP (pin-mux) only for kirkwood SoC's
Compile the pin multiplexing only on Kirkwood platforms. As the
Armada XP doesn't need it.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Tested-by: Luka Perkov <luka@openwrt.org>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
2014-10-23 09:59:21 -04:00
Stefan Roese
3e972cb9ba arm: marvell: Move arch-kirkwood/spi.h to arch-mvebu/spi.h
This move makes it possible to use this kirkwood SPI driver from other
MVEBU platforms as well. This will be used by the upcoming Armada XP
support.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Tested-by: Luka Perkov <luka@openwrt.org>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
2014-10-23 09:59:20 -04:00
Stefan Roese
3dc23f7852 arm: marvell: Move arch/kirkwood.h to arch/soc.h
This move makes is possible to use this header not only from kirkwood
platforms but from all Marvell mvebu platforms.

Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Luka Perkov <luka@openwrt.org>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
2014-10-23 09:59:20 -04:00
Tom Rini
dee8abcd80 Merge git://git.denx.de/u-boot-x86 2014-10-23 06:54:03 -04:00
Simon Glass
f1269925f9 x86: cros_ec: Update LPC driver for new cros_ec header
There was a minor rename of one of the defines, so update the driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-10-22 21:50:32 -06:00
Oleksandr Tymoshenko
6e9e06260d usb: dwc2: Add driver for Synopsis DWC2 USB IP block
This is the USB host controller used on the Altera SoCFPGA and Raspbery Pi.

This code has three checkpatch warnings, but to make sure it stays at least
readable and clear, these are not fixed. These bugs are in the USB request
handling combinatorial logic, so any abstracting of those is out of question.

Tested on DENX MCV (Altera SoCFPGA 5CSFXC6C6U23C8N) and RPi B+ (BCM2835).

Signed-off-by: Oleksandr Tymoshenko <gonzo@bluezbox.com>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Pavel Machek <pavel@denx.de>
Cc: Vince Bridgers <vbridger@altera.com>
Tested-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2014-10-22 22:01:58 +02:00
Alexandre Courbot
a7f2472224 net: asix: Add support for AX88772B
This USB device works as-is on this driver.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2014-10-22 22:01:58 +02:00
Simon Glass
8a9cd5ad6f dm: serial: Support driver model in pl01x driver
Add driver model support in this driver, using platform data provided by
the board.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
2014-10-22 10:36:57 -06:00
Simon Glass
aed2fbef5e dm: serial: Tidy up the pl01x driver
Adjust the driver so that leaf functions take a pointer to the serial port
register base. Put all the global configuration in the init function, and
use the same settings from then on.

This makes it much easier to move to driver model without duplicating the
code, since with driver model we use platform data rather than global
settings.

The driver is compiled with either the CONFIG_PL010_SERIAL or
CONFIG_PL011_SERIAL option and this determines the uart type. With driver
model this needs to come in from platform data, so create a new
CONFIG_PL01X_SERIAL config which brings in the driver, and adjust the
driver to support both peripheral variants.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
2014-10-22 10:36:57 -06:00
Simon Glass
41e98e011d dm: rpi: Convert GPIO driver to driver model
Convert the BCM2835 GPIO driver to use driver model, and switch over
Raspberry Pi to use this, since it is the only board.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
2014-10-22 10:36:57 -06:00
Simon Glass
da802b9e27 dm: core: Add support for simple-bus
Add a driver for the simple-bus nodes, which allows devices within these
nodes to be bound.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-10-22 10:36:56 -06:00
Simon Glass
a8ba569cba dm: imx: serial: Support driver model in the MXC serial driver
Add driver model support with this driver. Boards which use this driver
should define platform data in their board files.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-10-22 10:36:56 -06:00
Simon Glass
441d0cfff1 dm: imx: gpio: Support driver model in MXC gpio driver
Add driver model support with this driver. In this case the platform data
is in the driver. It would be better to put this into an SOC-specific file,
but this is best attempted when more boards are moved over to use driver
model.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
2014-10-22 10:36:56 -06:00
Simon Glass
b8893327e9 dm: serial: Put common code into separate functions
Avoid duplicating the code which deals with getc() and putc(). It is fairly
simple, but may expand later.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-10-22 10:36:54 -06:00
Simon Glass
ea0ebc8662 dm: exynos: cros_ec: Move cros_ec_spi to driver model
Adjust this driver to use driver model and move smdk5420 boards over to
use it.

Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2014-10-22 10:36:53 -06:00
Simon Glass
be995a8545 dm: sandbox: cros_ec: Move sandbox cros_ec to driver module
Adjust the sandbox cros_ec emulation driver to work with driver model, and
switch over to driver model for sandbox cros_ec.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-10-22 10:36:53 -06:00
Simon Glass
84d6cbd302 dm: cros_ec: Add support for driver model
Add support for driver model if enabled. This involves minimal changes
to the code, mostly just plumbing around the edges.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-10-22 10:36:53 -06:00
Simon Glass
fda6fac39b dm: tegra: spi: Convert to driver model
This converts the Tegra SPI drivers to use driver model. This is tested
on:

- Tegra20 - trimslice
- Tegra30 - beaver
- Tegra124 - dalmore

(not tested on Tegra124)

Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2014-10-22 10:36:52 -06:00
Simon Glass
b6c2956def dm: sf: sandbox: Convert SPI flash driver to driver model
Convert sandbox's spi flash emulation driver to use driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-10-22 10:36:51 -06:00
Simon Glass
fbb099183e dm: Convert spi_flash_probe() and 'sf probe' to use driver model
We want the SPI flash probing feature to operate as a standard driver.
Add a driver for the basic probing feature used by most boards. This
will be activated by device_probe() as with any other driver.

The 'sf probe' command currently keeps track of the SPI slave that it
last used. This doesn't work with driver model, since some other driver
or system may have probed the device and have access to it too. On the
other hand, if we try to probe a device twice the second probe is a nop
with driver model.

Fix this by searching for the matching device, removing it, and then
probing it again. This should work as expected regardless of other device
activity.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-10-22 10:36:50 -06:00
Simon Glass
4c2dbefde5 dm: sf: Add a uclass for SPI flash
Add a driver model uclass for SPI flash which supports the common
operations (read, write, erase). Since we must keep support for the
non-dm interface, some modification of the spi_flash header is required.

CONFIG_DM_SPI_FLASH is used to enable driver model for SPI flash.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-10-22 10:36:50 -06:00
Simon Glass
ae242cbfd0 spi: Use error return value in sf_ops
Adjust spi_flash_probe_slave() to return an error value instead of a
pointer so we get the correct error return.

Have the caller allocate memory for spi_flash to simplify error handling,
and also so that driver model can use its existing allocated memory.

Add a spi.h include in the sf_params file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-10-22 10:36:50 -06:00
Simon Glass
ff0960f9a0 sf: Tidy up public and private header files
Since spi_flash.h is supposed to be the public API for SPI flash, move
private things to sf_internal.h. Also tidy up a few comment nits.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-10-22 10:36:50 -06:00
Simon Glass
73186c9460 dm: exynos: Convert SPI to driver model
Move the exynos SPI driver over to driver model. This removes quite a bit
of boilerplate from the driver, although it adds some for driver model.

A few device tree additions are needed to make the SPI flash available.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-10-22 10:36:49 -06:00
Simon Glass
623b638607 dm: spi: Add soft_spi implementation
Add a new implementation of soft_spi that uses device tree to specify the
GPIOs. This will replace soft_spi_legacy for boards which use driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-10-22 10:36:48 -06:00
Simon Glass
44ba6b0ecc dm: spi: Remove SPI_INIT feature
This feature provides for init of a single SPI port for the soft SPI
feature. It is not really compatible with driver model since it assumes a
single SPI port. Also, inserting SPI init into the driver by means of
a #define is not very nice.

This feature is not used by any active boards, so let's remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-10-22 10:36:48 -06:00
Simon Glass
a666f39e4e dm: spi: Rename soft_spi.c to soft_spi_legacy.c
Reserve the 'normal' name for use by driver model, and rename the old
driver so that it is clear that it is for 'legacy' drivers only.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-10-22 10:36:48 -06:00
Simon Glass
49b5d6e6e2 dm: sandbox: spi: Move to driver model
Adjust the sandbox SPI driver to support driver model and move sandbox over
to driver model for SPI.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-10-22 10:36:48 -06:00
Simon Glass
843c9e8796 dm: Add spi.h header to a few files
Some files are using SPI functions but not explitly including the SPI
header file. Fix this, since driver model needs it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-10-22 10:36:47 -06:00
Simon Glass
c60e1f2547 dm: sandbox: Add a SPI emulation uclass
U-Boot includes a SPI emulation driver already but it is not explicit, and
is hidden in the SPI flash code.

Conceptually with sandbox's SPI implementation we have a layer which
creates SPI bus transitions and a layer which interprets them, currently
only for SPI flash. The latter is actually an emulation, and it should be
possible to add more than one emulation - not just SPI flash.

Add a SPI emulation uclass so that other emulations can be plugged in to
support different types of emulated devices on difference buses/chip
selects.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-10-22 10:36:46 -06:00
Simon Glass
d7af6a4851 dm: spi: Add a uclass for SPI
Add a uclass which provides access to SPI buses and includes operations
required by SPI.

For a time driver model will need to co-exist with the legacy SPI interface
so some parts of the header file are changed depending on which is in use.
The exports are adjusted also since some functions are not available with
driver model.

Boards must define CONFIG_DM_SPI to use driver model for SPI.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
(Discussed some follow-up comments which will address in future add-ons)
2014-10-22 10:36:46 -06:00
Simon Glass
accd4b19b3 dm: core: Allow parents to pass data to children during probe
Buses sometimes want to pass data to their children when they are probed.
For example, a SPI bus may want to tell the slave device about the chip
select it is connected to.

Add a new function to permit the parent data to be supplied to the child.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-10-22 10:36:46 -06:00
Simon Glass
a8981d4f80 dm: core: Add functions for iterating through device children
Buses need to iterate through their children in some situations. Add a few
functions to make this easy.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-10-22 10:36:45 -06:00