Commit graph

40 commits

Author SHA1 Message Date
Ingo van Lil
3eb90bad65 Generic udelay() with watchdog support
According to the PPC reference implementation the udelay() function is
responsible for resetting the watchdog timer as frequently as needed.
Most other architectures do not meet that requirement, so long-running
operations might result in a watchdog reset.

This patch adds a generic udelay() function which takes care of
resetting the watchdog before calling an architecture-specific
__udelay().

Signed-off-by: Ingo van Lil <inguin@gmx.de>
2009-12-05 01:08:53 +01:00
Tom Rix
23b80982a0 Add support for Eukrea CPU9260/CPU9G20 SBC
these boards are built around Atmel's AT91SAM9260/9G20 and have
up to 64MB of NOR flash, up to 128MB of SDRAM, up to 2GB of NAND
and include a 10/100 Ethernet PHY in RMII mode.

Signed-off-by: Eric Benard <eric@eukrea.com>
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
2009-10-13 06:17:35 -05:00
Albin Tonnerre
9453967e28 Add support for the Calao SBC35-A9G20 board
The Calao SBC35-A9G20 board is manufactured and sold by Calao Systems
<http://www.calao-systems.com>. It is built around an AT91SAM9G20 ARM SoC
running at 400MHz. It features an Ethernet port, an SPI RTC backed by an onboard
battery , an SD/MMC slot, a CompactFlash slot, 64Mo of SDRAM, 256Mo of NAND
flash, two USB host ports, and an USB device port. More informations can be
found at <http://www.calao-systems.com/articles.php?lng=en&pg=5936>

Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>
2009-09-01 22:13:37 +02:00
Eric Benard
3c448e6482 Add AT91SAM9260 to at91's lowlevel_init.S
Needed for AT91SAM9260 NOR Boot on Eukrea's CPU9260.

Signed-off-by: Eric Benard <eric@eukrea.com>
2009-08-01 11:45:05 +02:00
Sedji Gaouaou
5ccc2d99d6 at91: Introduction of at91sam9g10 SOC.
AT91sam9g10 is an ARM 926ej-s SOC. It is an evolution of the at91sam9261 with a
faster clock speed: 266/133MHz.

Signed-off-by: Sedji Gaouaou <sedji.gaouaou@atmel.com>
2009-07-12 17:56:11 +02:00
Sedji Gaouaou
22ee647380 at91: Introduction of at91sam9g45 SOC.
AT91sam9g45 series is an ARM 926ej-s SOC family clocked at 400/133MHz.
It embeds USB high speed host and device, LCD, DDR2 RAM, and a full set of
peripherals.

The first board that embeds at91sam9g45 chip is the AT91SAM9G45-EKES.
On the board you can find 2 USART, USB high speed,
a 480*272 LG lcd, ethernet, gpio/joystick/buttons.

Signed-off-by: Sedji Gaouaou <sedji.gaouaou@atmel.com>
2009-07-12 17:43:34 +02:00
Daniel Gorsulowski
45627fce18 at91: Add CAN init function
To enable CAN init, CONFIG_CAN has to be defined in the board config file
and at91_can_hw_init() has to be called in the board specific code.

CAN is available on AT91SAM9263 and AT91CAP9 SoC.

Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
2009-07-06 21:52:43 +02:00
Jean-Christophe PLAGNIOL-VILLARD
8096c51fd4 at91: unify nor boot support
the lowlevel init sequence is the same so unify it

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-21 16:18:12 +02:00
Jean-Christophe PLAGNIOL-VILLARD
b2403589b4 at91: move cpu info print to cpu
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-12 20:45:46 +02:00
Jean-Christophe PLAGNIOL-VILLARD
5bb59b3c90 at91: extract reset from timer
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-12 20:39:53 +02:00
Jean-Christophe PLAGNIOL-VILLARD
10a451cd57 arm: unify linker script
all arm boards except a few use the same cpu linker script
so move it to cpu/$(CPU)

that could be overwrite in following order
SOC
BOARD
via the corresponding config.mk

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-12 20:39:52 +02:00
Jean-Christophe PLAGNIOL-VILLARD
9475c63c78 afeb9260: fix macb device init
uses PA10, PA11 for ETX2 and ETX3.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-12 20:39:52 +02:00
Jean-Christophe PLAGNIOL-VILLARD
1699da6297 at91: regroup IP hw init in one file per soc
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-12 20:39:51 +02:00
Jean-Christophe PLAGNIOL-VILLARD
a53c997dd7 at91/cpu.c: add missing Copyright & GPL header
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-10 01:29:29 +02:00
Detlev Zundel
792a09eb9d Fix e-mail address of Gary Jennejohn.
Signed-off-by: Detlev Zundel <dzu@denx.de>
2009-05-15 22:11:59 +02:00
Sergey Lapin
c63254ef56 AFEB9260 network fix
AFEB9260 uses PA10, PA11 for ETX2 and ETX3.
Also, due to extarnal pull-up on IRQ line, Micrel PHY ID is 1 after reset sequence,
not 0.

Signed-off-by: Sergey Lapin <slapin@ossfans.org>
2009-05-13 01:17:17 +02:00
Jean-Christophe PLAGNIOL-VILLARD
6b2beb5626 at91: remove lowlevel_init.S
lowlevel_init.S is not used any more so remove it.
As consequence, we also don't have to generate u-boot.lds
but can use a static version as before.

This also fixes the out-of-tree build problem introduced
with commit f0a2c7b4 "at91: add support for the PM9263 board"

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-05-01 21:24:41 +02:00
Wolfgang Denk
0ee7a31047 Update CHANGELOG; minor coding style cleanup.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-05-01 00:16:11 +02:00
Daniel Gorsulowski
a1e5f93185 at91: fixed plla calc when no USB support is active
Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-04-29 21:42:34 +02:00
Jean-Christophe PLAGNIOL-VILLARD
6ebff365eb at91sam9/at91cap: fix CONFIG_SYS_HZ to 1000
The timer has been rewrote with a precision at ~0,18%

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Tested-by: Sergey Lapin <slapin@ossfans.org>
Tested-by: Eric BENARD <ebenard@free.fr>
2009-04-16 21:30:48 +02:00
Ilko Iliev
f0a2c7b4b6 at91: add support for the PM9263 board of Ronetix GmbH
The PM9263 board is based on the AT91SAM9263-EK board.

Here is the page on Ronetix website:
http://www.ronetix.at/starter_kit_9263.html

Signed-off-by: Ilko Iliev <iliev@ronetix.at>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-04-16 21:30:48 +02:00
Jean-Christophe PLAGNIOL-VILLARD
dc39ae9513 at91sam9/at91cap: improve clock framework
calculate dynamically the clock rate and pllb setting for usb

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-04-16 21:30:44 +02:00
Jean-Christophe PLAGNIOL-VILLARD
4758ebdd53 at91: move dataflash spi driver to drivers/spi
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-04-04 20:42:22 +02:00
Jean-Christophe PLAGNIOL-VILLARD
2b7178afce at91: move usb driver to drivers/usb
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-04-04 20:42:21 +02:00
Jean-Christophe PLAGNIOL-VILLARD
90a92a708d at91: rename DATAFLASH_MMC_SELECT to CONFIG_DATAFLASH_MMC_SELECT
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-04-04 20:42:19 +02:00
Jean-Christophe PLAGNIOL-VILLARD
a47492ac60 at91sam9/at91cap: spi init add hardware chip select support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-04-04 20:42:17 +02:00
Nicolas Ferre
df486b1fa3 at91: Support for the at91sam9g20 : Atmel 400Mhz ARM 926ej-s SOC.
AT91sam9g20 is an evolution of the at91sam9260 with a faster clock speed.

The AT91SAM9G20-EK board is an updated revision of the AT91SAM9260-EK board.
It is essentially the same, with a few minor differences.

Here is the chip page on Atmel website:
http://www.atmel.com/dyn/products/product_card.asp?part_id=4337

Signed-off-by: Justin Waters <justin.waters@timesys.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-03-22 14:48:16 +01:00
Jean-Christophe PLAGNIOL-VILLARD
e2c0476f95 at91sam9/at91cap: move common macb initialisation to cpu
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-03-22 13:22:14 +01:00
Jean-Christophe PLAGNIOL-VILLARD
f3f91f886b at91sam9/at91cap: move common usb host initialisation to cpu
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-03-22 13:22:11 +01:00
Jean-Christophe PLAGNIOL-VILLARD
a484b00b86 at91sam9/at91cap: move common led management to cpu
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-03-22 13:22:08 +01:00
Jean-Christophe PLAGNIOL-VILLARD
7ebafb7ec1 at91sam9/at91cap: move common spi initialisation to cpu
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-03-22 13:22:06 +01:00
Jean-Christophe PLAGNIOL-VILLARD
1332a2a069 at91sam9/at91cap: move common serial initialisation to cpu
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-03-22 13:22:03 +01:00
Trent Piepho
f62fb99941 Fix all linker script to handle all rodata sections
A recent gcc added a new unaligned rodata section called '.rodata.str1.1',
which needs to be added the the linker script.  Instead of just adding this
one section, we use a wildcard ".rodata*" to get all rodata linker section
gcc has now and might add in the future.

However, '*(.rodata*)' by itself will result in sub-optimal section
ordering.  The sections will be sorted by object file, which causes extra
padding between the unaligned rodata.str.1.1 of one object file and the
aligned rodata of the next object file.  This is easy to fix by using the
SORT_BY_ALIGNMENT command.

This patch has not be tested one most of the boards modified.  Some boards
have a linker script that looks something like this:

*(.text)
. = ALIGN(16);
*(.rodata)
*(.rodata.str1.4)
*(.eh_frame)

I change this to:

*(.text)
. = ALIGN(16);
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))

This means the start of rodata will no longer be 16 bytes aligned.
However, the boundary between text and rodata/eh_frame is still aligned to
16 bytes, which is what I think the real purpose of the ALIGN call is.

Signed-off-by: Trent Piepho <xyzzy@speakeasy.org>
2009-03-20 22:39:12 +01:00
Jean-Christophe PLAGNIOL-VILLARD
3aed3aa2c1 Fix new found CFG_
Also fix some minor typos.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-12-14 10:55:30 +01:00
Remy Bohmer
83ad179e2f Remove redundant armv4 flag from arm926ejs compile flags
Currently the arm926ejs tree has the armv4 option set during compilation.
This flag does not belong here because a arm926 CPU is always a armv5 CPU.

Signed-off-by: Remy Bohmer <linux@bohmer.net>
2008-12-06 20:34:12 +01:00
Stelian Pop
3e0cda071a AT91: Enable PLLB for USB
At least some (old ?) versions of the AT91Bootstrap do not set up the
PLLB correctly to 48 MHz in order to make USB host function correctly.

This patch sets up the PLLB to the same values Linux uses, and makes USB
work ok on the following CPUs:
	- AT91CAP9
	- AT91SAM9260
	- AT91SAM9263

This patch also defines CONFIG_USB_STORAGE and CONFIG_CMD_FAT for all
the relevant AT91CAP9/AT91SAM9 atmel boards.

Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-11-21 01:41:14 +01:00
Selvamuthukumar
9b827cf172 Align end of bss by 4 bytes
Most of the bss initialization loop increments 4 bytes
at a time. And the loop end is checked for an 'equal'
condition. Make the bss end address aligned by 4, so
that the loop will end as expected.

Signed-off-by: Selvamuthukumar <selva.muthukumar@e-coninfotech.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-11-18 23:13:16 +01:00
Jean-Christophe PLAGNIOL-VILLARD
6d0f6bcf33 rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-10-18 21:54:03 +02:00
Ben Warren
3ae071e442 Moved initialization of Ethernet controllers on Atmel AT91 to board_eth_init()
Removed at91sam9_eth_initialize() from net/eth.c

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-09-02 21:18:16 -07:00
Jean-Christophe PLAGNIOL-VILLARD
8ed2f5f950 at91: move arch-at91sam9 to arch-at91
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-08-12 18:41:42 +02:00