Commit graph

75047 commits

Author SHA1 Message Date
Tom Rini
1c02fd4686 Merge https://source.denx.de/u-boot/custodians/u-boot-riscv 2021-09-07 07:58:56 -04:00
Zong Li
30fa33dc80 riscv: lib: modify the indent
We usually use a space in function declaration, rather than a tab.

Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2021-09-07 10:34:29 +08:00
Zong Li
835210a125 board: sifive: use ccache driver instead of helper function
Invokes the common cache_init function to initialize ccache.

Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2021-09-07 10:34:29 +08:00
Zong Li
213ed175b0 riscv: lib: implement enable_caches for sifive cache
The enable_caches is a generic hook for architecture-implemented, we
define this function to enable composable cache of sifive platforms.

In sifive_cache, it invokes the generic cache_enable interface of cache
uclass to execute the relative implementation in SiFive ccache driver.

Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2021-09-07 10:34:29 +08:00
Zong Li
4d4222d074 common: board_r: support enable_caches for RISC-V
The enable_caches is a generic hook for architecture-implemented, we
leverage this function to enable caches for RISC-V

Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2021-09-07 10:34:29 +08:00
Zong Li
43a2183928 cache: add sifive composable cache driver
This driver is currently responsible for enabling all ccache ways.
Composable cache could be configure as RAM or cache, we will use it as
RAM at the beginning to put the u-boot SPL there. In u-boot proper
phrase, we will use the composable cache as cache, and try to enable the
cache ways.

Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2021-09-07 10:34:29 +08:00
Thomas Skibo
9d84795fc5 riscv: Add missing sentinel in ocores_i2c.c
The ocores_i2c.c driver is missing a sentinel at the end of
the compatible strings list.  This causes the "dm compat" command
to spew garbage.

Signed-off-by: Thomas Skibo <thomas-git@skibo.net>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-09-07 10:34:29 +08:00
Heinrich Schuchardt
f6431e8fb3 riscv: show code leading to exception
To make analyzing exceptions easier output the code that leads to it.
We already do the same on the ARM platform.

Here is an example:

    => exception ebreak
    Unhandled exception: Breakpoint
    EPC: 000000008ff5d50e RA: 000000008ff5d62c TVAL: 0000000000000000
    EPC: 000000008020b50e RA: 000000008020b62c reloc adjusted

    Code: 2785 0693 07a0 dce3 fef6 47a5 d563 00e7 (9002)

To disassemble the code we can use the decodecode script:

    $ echo 'Code: 2785 0693 07a0 dce3 fef6 47a5 d563 00e7 (9002)' | \
      CROSS_COMPILE=riscv64-linux-gnu- scripts/decodecode

    Code: 2785 0693 07a0 dce3 fef6 47a5 d563 00e7 (9002)
    All code
    ========
       0:   2785                    addiw   a5,a5,1
       2:   07a00693                li      a3,122
       6:   fef6dce3                bge     a3,a5,0xfffffffffffffffe
       a:   47a5                    li      a5,9
       c:   00e7d563                bge     a5,a4,0x16
      10:*  9002                    ebreak         <-- trapping instruction
            ...

    Code starting with the faulting instruction
    ===========================================
       0:   9002                    ebreak
            ...

As it is not always clear if the first 16 bits are at the start or in the
middle of a 32bit instruction it may become necessary to strip the first
u16 from the output before calling decodecode to get the correct
disassembled code.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
2021-09-07 10:34:29 +08:00
Heinrich Schuchardt
5b2d359d9a configs: qemu-riscvXX_spl_defconfig enable CMD_SBI
Both for 64bit and 32bit at least on one board we should compile the sbi
command. Enabling it on QEMU will allow to write a test for it.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-09-07 10:34:29 +08:00
Heinrich Schuchardt
7383432fa1 riscv: enable booting HiFive Unmatched from SATA
On the HiFive Unmatched a PCI to SATA adapter may be used to install a SATA
drive. Enable booting from it.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
2021-09-07 10:34:28 +08:00
Tom Rini
ad320c237b - fix EFI boot with OP-TEE for STM32MP15 boards
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Merge tag 'u-boot-stm32-20210906' of https://source.denx.de/u-boot/custodians/u-boot-stm

- fix EFI boot with OP-TEE for STM32MP15 boards
2021-09-06 10:31:56 -04:00
Patrice Chotard
c8510e397f stm32mp: Fix board_get_usable_ram_top()
When booting in EFI, lib/efi_loader/efi_memory.c calls
board_get_usable_ram_top(0) which returns by default
gd->ram_base + gd->ram_size which is the top of DDR.

In case of OPTEE boot, the top of DDR is currently reserved by OPTEE,
board_get_usable_ram_top(0) must return an address outside OPTEE
reserved memory.

gd->ram_top matches this constraint as it has already been initialized
by substracting all DT reserved-memory (included OPTEE memory area).

Fixes: 92b611e8b0 ("stm32mp: correctly handle board_get_usable_ram_top(0)")

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-09-06 10:00:11 +02:00
Tom Rini
5e893897c6 Pull request for efi-2021-10-rc4
Documentation:
 
     Remove invalid reference to configuration variable in UEFI doc
 
 UEFI:
 
     Parameter checks for the EFI_TCG2_PROTOCOL
     Improve support of preseeding UEFI variables.
     Correct the calculation of the size of loaded images.
     Allow for UEFI images with zero VirtualSize
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Merge tag 'efi-2021-10-rc4' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2021-10-rc4

Documentation:

    Remove invalid reference to configuration variable in UEFI doc

UEFI:

    Parameter checks for the EFI_TCG2_PROTOCOL
    Improve support of preseeding UEFI variables.
    Correct the calculation of the size of loaded images.
    Allow for UEFI images with zero VirtualSize
2021-09-04 15:59:00 -04:00
Masahisa Kojima
538c0f2d37 efi_loader: fix efi_tcg2_hash_log_extend_event() parameter check
TCG EFI Protocol Specification defines that PCRIndex parameter
passed from caller must be 0 to 23.
TPM2_MAX_PCRS is currently used to check the range of PCRIndex,
but TPM2_MAX_PCRS is tpm2 device dependent and may have larger value.
This commit newly adds EFI_TCG2_MAX_PCR_INDEX macro, it is used to
check the range of PCRIndex parameter.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-09-04 12:03:57 +02:00
Masahisa Kojima
db3ed2cf9c efi_loader: fix boot_service_capability_min calculation
TCG EFI Protocol Specification requires to the input
ProtocolCapability.Size < size of the EFI_TCG2_BOOT_SERVICE_CAPABILITY
up to and including the vendor ID field.
Current implementation does different calculation, let's fix it.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-09-04 12:03:57 +02:00
Masahisa Kojima
580d7242b1 efi_loader: add missing parameter check for EFI_TCG2_PROTOCOL api
TCG EFI Protocol Specification defines the required parameter
checking and return value for each API.
This commit adds the missing parameter check and
fixes the wrong return value to comply the specification.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-09-04 12:03:57 +02:00
Heinrich Schuchardt
7219856dae efi_loader: correct determination of secure boot state
When U-Boot is started we have to use the existing variables to determine
in which secure boot state we are.

* If a platform key PK is present and DeployedMode=1, we are in deployed
  mode.
* If no platform key PK is present and AuditMode=1, we are in audit mode.
* Otherwise if a platform key is present, we are in user mode.
* Otherwise if no platform key is present, we are in setup mode.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-09-04 12:03:57 +02:00
Heinrich Schuchardt
b191aa429e efi_loader: efi_auth_var_type for AuditMode, DeployedMode
Writing variables AuditMode and DeployedMode serves to switch between
Secure Boot modes. Provide a separate value for these in efi_auth_var_type.

With this patch the variables will not be read from from file even if they
are marked as non-volatile by mistake.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-09-04 12:03:57 +02:00
Heinrich Schuchardt
9ef82e2947 efi_loader: don't load signature database from file
The UEFI specification requires that the signature database may only be
stored in tamper-resistant storage. So these variable may not be read
from an unsigned file.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-09-04 12:03:57 +02:00
Heinrich Schuchardt
f3a343d733 efi_loader: rounding of image size
We should not first allocate memory and then report a rounded up value as
image size. Instead first round up according to section allocation and then
allocate the memory.

Fixes: 82786754b9 ("efi_loader: ImageSize must be multiple of SectionAlignment")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-09-04 12:03:57 +02:00
Heinrich Schuchardt
1ea133acd6 efi_loader: sections with zero VirtualSize
In a section header VirtualSize may be zero. This is for instance seen in
the .sbat section of shim. In this case use SizeOfRawData as section size.

Fixes: 9d30a941cc ("efi_loader: don't load beyond VirtualSize")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Asherah Connor <ashe@kivikakk.ee>
2021-09-04 12:03:57 +02:00
Michal Simek
d6136c63ca doc: Remove information about CAPSULE_FMP_HEADER
This Kconfig symbol was never added to U-Boot but it was mentioned in the
origin commit c35df7c9e4 ("qemu: arm64: Add documentation for capsule
update"). That's why remove it from documentation to be accurate.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-09-04 12:03:56 +02:00
Tom Rini
ecd6e0ce5a Xilinx changes for v2021.10-rc4
doc:
 - Fix uefi documentation
 
 spi:
 - Fix gqspi driver for single configuration
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Merge tag 'xilinx-for-v2021.10-rc4' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2021.10-rc4

doc:
- Fix uefi documentation

spi:
- Fix gqspi driver for single configuration
2021-09-03 13:17:43 -04:00
Ashok Reddy Soma
020b353be9 spi: zynqmp_gqspi: Fix dma alignment issue
DMA is aligned to ARCH_DMA_MINALIGN(64 bytes), but as per spec, alignment
required is 4bytes only. Change DMA alignment from ARCH_DMA_MINALIGN to
GQSPI_DMA_ALIGN. Remove alignment of data length in non-exponential case.

Some minor improvements in the initialization to initialize gen_fifo
threshold and disable qspi controller while setting config register.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-09-03 09:15:01 +02:00
Ashok Reddy Soma
72022a5b2e spi: zynqmp_gqspi: Switch genfifo start to manual mode
Current implementation uses auto mode for starting generic FIFO.
The recommendation from IP designers is to use manual mode, hence
change to manual start mode.

In fill genfifo first write to genfio and then trigger manual start.

Also enable and check for genfifo empty interrupt status in place of
genfifo not full interrupt.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-09-03 09:14:58 +02:00
Michal Simek
acbbd98313 doc: Remove information about CAPSULE_FMP_HEADER
This Kconfig symbol was never added to U-Boot but it was mentioned in the
origin commit c35df7c9e4 ("qemu: arm64: Add documentation for capsule
update"). That's why remove it from documentation to be accurate.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-09-03 09:09:16 +02:00
Matwey V. Kornilov
94509b79b1 btrfs: Use default subvolume as filesystem root
BTRFS volume consists of a number of subvolumes which can be mounted separately
from each other. The top-level subvolume always exists even if no subvolumes
were created manually. A subvolume can be denoted as the default subvolume i.e.
the subvolume which is mounted by default.

The default "default subvolume" is the top-level one, but this is far from the
common practices used in the wild. For instance, openSUSE provides an OS
snapshot/rollback feature based on BTRFS. To achieve this, the actual OS root
filesystem is located into a separate subvolume which is "default" but not
"top-level". That means that the /boot/dtb/ directory is also located inside
this default subvolume instead of top-level one.

However, the existing btrfs u-boot driver always uses the top-level subvolume
as the filesystem root. This behaviour 1) is inconsistent with

    mount /dev/sda1 /target

command, which mount the default subvolume 2) leads to the issues when
/boot/dtb cannot be found properly (see the reference).

This patch uses the default subvolume as the filesystem root to overcome
mentioned issues.

Reference: https://bugzilla.suse.com/show_bug.cgi?id=1185656
Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Fixes: f06bfcf54d ("fs: btrfs: Crossport open_ctree_fs_info() from btrfs-progs")
Reviewed-by: Qu Wenruo <wqu@suse.com>
2021-09-01 10:11:24 -04:00
Tom Rini
48cf96fbdf Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- mvebu: a38x: Define supported UART baudrates (Pali)
- kwbimage: Misc improvements (Pali)
- espressobin/turris_mox/turris_omnia: Enable some more devices
  like SATA via PCIe, SATA & NVMe (Pali)
- a37xx: Remove unused CONFIG_DEBUG_UART_SHIFT options (Pali)
- turris_omnia: Disable MCU watchdog in SPL when booting over
  UART (Marek)
- kwbimage: Fix some Coverity issue (Heinrich)
2021-09-01 10:11:21 -04:00
Pali Rohár
4116a0f38a tools: kwbimage: Remove comment about unimplemented register headers in v1 images
Support for register headers in v1 images was implemented in commit
02ba70ad68 ("tools: kwbimage: Add support for DATA command also for v1
images"). So remove old comment.

Signed-off-by: Pali Rohár <pali@kernel.org>
Fixes: 02ba70ad68 ("tools: kwbimage: Add support for DATA command also for v1 images")
Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-01 08:09:24 +02:00
Heinrich Schuchardt
f0317d7882 kwbimage: check return value of image_get_csk_index
image_get_csk_index() may return -1 in case of an error. Don't use this
value as index.

This resolves Coverity CID 338488
Memory - illegal accesses  (NEGATIVE_RETURNS)

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Pali Rohár <pali@kernel.org>
2021-09-01 08:09:24 +02:00
Heinrich Schuchardt
f858bb2e6c kwbimage: check fopen() return value
Always check the return value of fopen().

This resolves Coverity CID 338491:
Null pointer dereferences (NULL_RETURNS)

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Pali Rohár <pali@kernel.org>
2021-09-01 08:09:24 +02:00
Marek Behún
e23162c805 arm: mvebu: turris_omnia: disable MCU watchdog in board_late_init()
Disable MCU watchdog in board_late_init() instead of board_init(), so
that it is disabled after U-Boot enables SOC watchdog instead of before.
This way there is no window when the board is vulnerable.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-01 08:09:24 +02:00
Marek Behún
aeb0ca64db arm: mvebu: turris_omnia: disable MCU watchdog in SPL when booting over UART
When booting over UART, sending U-Boot proper may take too much time and
MCU watchdog will reset the board before U-Boot proper is loaded.

Better disable MCU watchdog in SPL when booting over UART.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-01 08:09:24 +02:00
Marek Behún
008a069b89 arm: mvebu: turris_omnia: don't guard by CONFIG_SPL_BUILD macro
We do not need to guard code in board_init() and board_late_init()
functions with the CONFIG_SPL_BUILD macro, since these functions are not
called in SPL.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-01 08:09:24 +02:00
Marek Behún
dc595e3e45 arm: mvebu: Move get_boot_device() to cpu.c and make visible
Move the function get_boot_device() from spl.c to cpu.c.

Make it visible, so that it may be used from other files.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-01 08:09:24 +02:00
Pali Rohár
167689897b serial: a37xx: Remove CONFIG_DEBUG_UART_SHIFT options
Armada 37xx serial driver does not use CONFIG_DEBUG_UART_SHIFT.

So do not define any bogus value for CONFIG_DEBUG_UART_SHIFT option in any
Armada 37xx defconfig file.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-01 08:07:04 +02:00
Pali Rohár
1b713f1550 arm: mvebu: turris_omnia: Enable NVMe support
PCIe-based NVMe SSD disks in M.2 2230/2242/2260 form-factor can be
connected to Turris Omnia mPCIe slot via passive M.2 <--> mPCIe adapter.

So enable PCIe NVMe drivers.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-01 08:07:04 +02:00
Pali Rohár
be575083c9 arm: mvebu: turris_mox: Enable SATA support
SATA disks could be connected via mPCIe add-in card with PCIe-SATA
controller into Mox-B or Mox-G module.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-01 08:07:04 +02:00
Pali Rohár
8e7fe46305 arm: mvebu: espressobin: Enable also SATA support via PCIe
Espressobin has one on-board SATA port which is connected directly to CPU.

More SATA disks can be connected via mPCIe add-in card with PCIe-SATA
controller.

So enable required SATA AHCI PCIe drivers in defconfig file.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-01 08:07:04 +02:00
Pali Rohár
3404aa4646 arm: mvebu: axp: Properly check for Armada XP in mach/soc.h
File mach/soc.h is included also in 64-bit mvebu processors, so define
Armada XP related macros only when compiling for Armada XP.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-01 08:07:04 +02:00
Pali Rohár
e515a33040 tools: kwbimage: Use IBR_HDR_* constants instead of raw numbers
There are already IBR_HDR_* constants for these numbers, so use them.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-01 08:07:04 +02:00
Pali Rohár
a008dbaa8c tools: kwbimage: Verify size of image data
Part of image data is 4 byte checksum, so every image must contain at least
4 bytes. Verify it to prevent memory corruptions.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-01 08:07:04 +02:00
Pali Rohár
33a0af2d80 tools: kwbimage: Verify size of v0 image header
Check that extended image header size is not larger than file size.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-01 08:07:04 +02:00
Pali Rohár
b984056fa6 tools: kwbimage: Verify supported image version
Only image versions 0 and 1 are supported. Verify it in
kwbimage_verify_header() function.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-01 08:07:04 +02:00
Pali Rohár
ead4864fa6 arm: mvebu: a38x: Define supported UART baudrates
Define all standard baudrates plus 3 non-standard high speed:
3125000 4000000 5150000

3125000 matches divisor 5 with 250 MHz TCLK and divisor 4 with 200 MHz TCLK.
4000000 is the rounded value for divisor 4 with 250 MHz TCLK (3906250) and
divisor 3 with 200 MHz TCLK (4166666).

5150000 is the rounded value (5208333) for divisor 3 with 250 MHz TCLK.
Testing showed that rounded value is more stable then exactly calculated.
And it is the highest possible baudrate which is stable on A38x platform.

Any other baudrate values above 2500000 are unstable, which is reason why
e.g. standard value 3000000 is not defined, and it is needed to use
non-standard value 3125000.

Tested all defined UART baudrates on Turris Omnia (A38x with 250 MHz TCLK).

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-01 08:07:04 +02:00
Tom Rini
b15a17be0c Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sh 2021-08-31 18:37:25 -04:00
Tom Rini
9b0583a839 Prepare v2021.10-rc3
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30 12:45:46 -04:00
Tom Rini
18f528535d configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30 12:40:24 -04:00
Tom Rini
b9cb74a5aa Xilinx changes for v2021.10-rc3
xilinx:
 - Disable CONFIG_ARCH_FIXUP_FDT_MEMORY
 - Print information about cpu via soc drivers and enable DISPLAY_CPUINFO
 - Wire infrastructure for DTB_RESELECT and MULTI_DTB_FIT
 
 zynq:
 - Wire single QSPI
 - Use power-source instead of io-standard properties
 - Enable nor on zc770-xm012
 
 zynqmp:
 - Change handling around multi_boot()
 - Setup offset for u-boot.itb in spi
 - Generate run time dfu_alt_info for capsule update
 - Use explicit values for enums (zynqmp_firmware.h)
 - Enable RTC/SHA1/BUTTON/BUTTON_GPIO command
 - Disable WDT driver by default
 - Bind usb/scsi via preboot because of EFI
 - DT updates/fixes
 - Add soc driver
 - Fix SPL SPI boot mode
 
 versal:
 - Add soc driver
 
 sdhci:
 - Update tap delay programming for zynq_sdhci driver
 
 cmd:
 - Fix RTC uclass handling in date command
 - Update pwm help message
 - Update reset help message
 
 watchdog:
 - Fix wwdt compilation
 
 rtc:
 - Deal with seq alias in rtc uclass
 - Add zynqmp RTC driver
 
 fdt:
 - Add kernel-doc for fdt_fixup_memory_banks()
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Merge tag 'xilinx-for-v2021.10-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2021.10-rc3

xilinx:
- Disable CONFIG_ARCH_FIXUP_FDT_MEMORY
- Print information about cpu via soc drivers and enable DISPLAY_CPUINFO
- Wire infrastructure for DTB_RESELECT and MULTI_DTB_FIT

zynq:
- Wire single QSPI
- Use power-source instead of io-standard properties
- Enable nor on zc770-xm012

zynqmp:
- Change handling around multi_boot()
- Setup offset for u-boot.itb in spi
- Generate run time dfu_alt_info for capsule update
- Use explicit values for enums (zynqmp_firmware.h)
- Enable RTC/SHA1/BUTTON/BUTTON_GPIO command
- Disable WDT driver by default
- Bind usb/scsi via preboot because of EFI
- DT updates/fixes
- Add soc driver
- Fix SPL SPI boot mode

versal:
- Add soc driver

sdhci:
- Update tap delay programming for zynq_sdhci driver

cmd:
- Fix RTC uclass handling in date command
- Update pwm help message
- Update reset help message

watchdog:
- Fix wwdt compilation

rtc:
- Deal with seq alias in rtc uclass
- Add zynqmp RTC driver

fdt:
- Add kernel-doc for fdt_fixup_memory_banks()
2021-08-27 08:33:02 -04:00
Michal Simek
229cb5c6ba xilinx: zynqmp: Enable stack relocation to DDR
There is no space in OCM for SPL stack because the space in OCM is occupied
by TF-A. That's why move relocate stack to DDR to 0x18000000 address
and also enable SPL_SIZE_LIMIT not to be more then 0xfffea000 which is
default address for TFA.

It is good to summarize current DDR usage in SPL flow.
0-0x80000 is used for BSS
 (CONFIG_SPL_BSS_START_ADDR, CONFIG_SPL_BSS_MAX_SIZE)
0x100000 is used for DTB passing address
 (CONFIG_XILINX_OF_BOARD_DTB_ADDR)
0x17fffe70 - CONFIG_SPL_STACK_R_ADDR - is used for GD
0x18000000 is used for SPL stack
 (CONFIG_SPL_STACK_R_ADDR)
0x20000000-0x21000000 is used for SPL malloc area
 (CONFIG_SYS_SPL_MALLOC_START, CONFIG_SYS_SPL_MALLOC_SIZE)

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26 08:14:43 +02:00