Commit graph

47949 commits

Author SHA1 Message Date
Siva Durga Prasad Paladugu
cacb8a029f nand: arasan_nfc: Add support for ondie ecc
This patch adds support for ondie ecc. As of now
this adds support for micron parts which supports
ondie ecc.
Didn't found any better way to detect ondie ecc
support by a device except sorting out with
manufacture and device id's.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:07 +01:00
Siva Durga Prasad Paladugu
b08fc34f3f nand: arasan_nfc: Move common ecc struct initialization init routine
Move common part of ecc structure initialization to
arasan_nand_init() routine.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:07 +01:00
Siva Durga Prasad Paladugu
2678059ec8 xilinx: zynqmp: Add new target with only emmc enabled
This patch adds new target which is called as mini configuration
with only emmc functionality and other required basic features enabled.
This will be used to run in system with small footprint and needs
emmc support.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:07 +01:00
Siva Durga Prasad Paladugu
c8a6bade5b xilinx: zynqmp: Add new target with only nand enabled
This patch adds new target which is called as mini configuration
with only nand functionality and other required basic features enabled.
This will be used to run in system with small footprint and needs
nand support.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:07 +01:00
Siva Durga Prasad Paladugu
3b644a3c2f arm64: zynqmp: Provide a config to not map DDR region in MMU table
DDR less systems are possible for configuration like mini qspi
and making DDR region as normal memory may cause speculative
access which results u-boot hang if DDR is absent. So, this
patch fixes the issue by not making DDR memory region
entry into MMU table.

Future solution is to prepare MMU table per memory node in dts instead
of hard code DDR addresses.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:03 +01:00
Michal Simek
f32e79f159 arm64: zynqmp: Propagate error value from psu_init()
psu_init() returns int which wasn't declared and checked.
The patch is fixing function declarations and code to handle return
values properly.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:59 +01:00
Michal Simek
7109930a70 arm64: zynqmp: Remove whitespaces in psu_init() comment
Remove additional spaces before comment.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:58 +01:00
Michal Simek
427d568c31 arm: zynq: Fix pmu register description coding style
Drop the space before/after '<' and '>'; and
separate the entries to be a bit more readable.

Reported-by: Julia Cartwright <julia@ni.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:54 +01:00
Michal Simek
a587051f5d arm: zynq: Enable distro defaults setting
BOOTCOMMAND is composed with distro_bootcmd but this variable is not
present. Enabling distro defaults setting is fixing it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:50 +01:00
Michal Simek
83144cd336 arm: zynq: Move bootcommand to defconfig
It will cleanup generic config and enable option to change it for every
board.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:45 +01:00
Michal Simek
93561a327b arm: zynq: Enable DM_GPIO when needed
There are two reasons for doing this change.
There is still !DM driver for xilinx soft gpio IP and especially it is
saving some space for memory constrained boards like cse (almost ~400B).

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:44 +01:00
Michal Simek
c4a142f4a6 arm: zynq: Enable DM_ETH and DM_MMC only if subsystem is enabled
Do not enable DM_ETH/MMC if subsystems are not enabled.
This saves memory for memory constrained boards like cse.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:44 +01:00
Michal Simek
099b9ae7b7 arm: zynq: Enable BLK when needed
There is no reason to enable BLK by default for all boards which is just
increasing memory footprint for memory contrained boards like cse.
zc770s are also saving some space.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:44 +01:00
Michal Simek
92dde1a7cc arm: zynq: Disable networking for zc770 xm011
Ethernet cable is not connected for xm011 that's why disable all
ethernet related configurations.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:44 +01:00
Michal Simek
df7810863f arm: zynq: Enable debug console for zc770 xm011
Wire debug console which is useful for early debugging.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:44 +01:00
Michal Simek
0732d7cd86 arm: zynq: Add identification string to Xilinx boards
It is good to see this string to make sure that u-boot which runs on the
board is the same which should run there.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:44 +01:00
Anders Hedlund
501fbc6744 armv8: zynqmp: Map PCIe High as device memory
Set the 8GB PCIe High area as device memory.
Also extend the DDR High area to cover the full 32GB range.

Signed-off-by: Anders Hedlund <anders.j.hedlund@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:40 +01:00
Siva Durga Prasad Paladugu
01c42d3d74 xilinx: zynqmp: Use strlen only if env_get doesn't return null
Add check if boot_targets exists in environment and then
generate new_targets env accordingly. Performing strlen on
null address causes it to fail with exception if isolation
is enabled with DDR address zero as secure. It works with out
isolation enabled as zero is valid address but it may lead to
junk values in boot_targets.
This patch fixes the issue by checking return value of env_get
so that it generate boot_targets properly.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:35 +01:00
Masahiro Yamada
3c0e607c31 ARM: zynq: remove unused CONFIG_ZC770_XM01* options
These are defined, but not referenced at all.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:34 +01:00
Michal Simek
5a60a548f7 arm: zynq: Fix types in ps7_spl_init
The patch is fixing the following Warning:
arch/arm/mach-zynq/ps7_spl_init.c:133:24: warning: comparison between
signed and unsigned integer expressions [-Wsign-compare]
    while (ioread(addr) < delay)
                        ^

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:31 +01:00
Michal Simek
77cbd9536e arm: zynq: Add support for zc770-xm011-x16 configuration
zc770-xm011 is x8 width configuration. This FMC card has also x16
variant which requires different ps7_init configuration. This patch adds
it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:25 +01:00
Michal Simek
b9b2724111 arm: zynq: Add zc770-xm013 spl configuration
Simplify ps7_init* initialization.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:24 +01:00
Michal Simek
7f6a0d4688 arm: zynq: Add zc770-xm012 spl configuration
Simplify ps7_init* initialization.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:24 +01:00
Michal Simek
7ad2a5b8fb arm: zynq: Add zc770-xm011 spl configuration
Simplify ps7_init* initialization.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:24 +01:00
Michal Simek
ecd69c3e36 arm: zynq: Add zc770-xm010 spl configuration
Simplify ps7_init* initialization.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:24 +01:00
Michal Simek
546a496ffd doc: zynq: Describe status of zc770-xm011
zc770-xm011 is also added and supported. Reflect this in README.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:19 +01:00
Ezequiel Garcia
fe3dfb2324 doc: Update the zynq u-boot status
NAND and QSPI devices are now supported, so mark
them as such.

Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-24 11:45:06 +01:00
Ezequiel Garcia
578d95e99f arm: zynq: Enable SPL_CLK only if SPL is enabled
Setup proper dependency in Kconfig for SPL_CLK.
If SPL is not enabled, SPL_CLK shouldn't be selected.

Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-24 11:45:06 +01:00
Tom Rini
3759df0c08 tools: Update python "help" tests to cope with "more" oddities
In some cases when "more" is told to page a given file it will prepend
the output with:
::::::::::::::
/PATH/TO/THE/FILE
::::::::::::::

And when this happens the output will not match the expected length.
Further, if we use a different pager we will instead fail the coverage
tests as we will not have 100% coverage.  Update the help test to remove
the string in question.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-16 16:15:25 -05:00
Tom Rini
23b4cf32b7 Merge git://git.denx.de/u-boot-i2c 2018-01-16 10:13:38 -05:00
Tom Rini
da54e7e5a9 Merge git://git.denx.de/u-boot-dm 2018-01-16 10:12:40 -05:00
Peng Fan
fb0128736b i2c: mxc_i2c: Use or operation
The operation should be OR, not BIT OR.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2018-01-16 06:59:39 +01:00
Peng Fan
34b0af8390 imx: mx7ulp: modify lpi2c seq number
Modify the lpi2c alias seq number to align with device.
Then no need to add 4 to get the device index.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-01-16 06:59:15 +01:00
Peng Fan
0074d4bf2d i2c: lpi2c: do not add 4 for bus seq
The number 4 is dedicated on i.MX7ULP, but lpi2c will be reused on i.MX8,
4 is not valid. The seq number could be configured by alias node.

The following patch will use i2c4 as the begin for i.MX7ULP.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-01-16 06:58:59 +01:00
Simon Glass
ed772fe79b test: Set the DTC environment variable
Set this to our own device-tree compiler since we know it is new enough to
run the tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-01-15 18:29:21 -07:00
Simon Glass
3ed0de31b4 dtoc: Allow DTC environment variable to provide path to dtc
The system device-tree compiler may not be new enough to run the tests we
use in U-Boot (e.g. with binman). Allow use of a DTC environment variable
to point to the correct dtc. If not defined, the dtc on the default PATH
is used.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-01-15 18:29:21 -07:00
Andre Przywara
4d4db83d18 armv8: secure firmware: fix incorrect unit address in node name
The DT spec demands a unit-address in a node name to match the "reg"
property in that node. Newer dtc versions will throw warnings if this is
not the case.
Remove the unit address from the config node name when U-Boot deals with
secure firmware FIT images.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2018-01-15 18:29:21 -07:00
Andre Przywara
2eda8e9aad tools: fix incorrect usage of DT node unit address
The DT spec demands a unit-address in a node name to match the "reg"
property in that node. Newer dtc versions will throw warnings if this is
not the case.
Correct the generated unit names when U-Boot's mkimage creates a FIT
image.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2018-01-15 18:29:21 -07:00
Andre Przywara
8837af154c sunxi: arm64: correct usage of DT node address in FIT generation
The DT spec demands a unit-address in a node name to match the "reg"
property in that node. Newer dtc versions will throw warnings if this is
not the case.
Adjust the FIT build script for 64-bit Allwinner boards to remove the
bogus addresses from the node names and avoid the warnings.
This avoids a warning with recent versions of the dtc tool.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2018-01-15 18:29:21 -07:00
Andre Przywara
b2267e8a22 fix incorrect usage of DT node unit address in comments
The DT spec demands a unit-address in a node name to match the "reg"
property in that node. Newer dtc versions will throw warnings if this is
not the case.
Fix all occurences in the tree where node names were mentioned in
comments, to not give bad examples to the reader.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2018-01-15 18:29:21 -07:00
Andre Przywara
971a54193c doc: fix incorrect usage of DT node unit address
The DT spec demands a unit-address in a node name to match the "reg"
property in that node. Newer dtc versions will throw warnings if this is
not the case.
Fix all occurences in various documentation files where this was not
observed, to not give bad examples to the reader.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2018-01-15 18:29:21 -07:00
Andre Przywara
b8790ebeec doc: FIT image: fix incorrect examples of DT node unit address
The DT spec demands a unit-address of a node name to match the "reg"
property in that node. Newer dtc versions will throw warnings if this is
not the case.
Fix all occurences in the FIT image example files where this was not
observed, to not give bad examples to the reader.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2018-01-15 18:29:21 -07:00
Andre Przywara
838404054e doc: FIT image: fix incorrect description of DT node unit address
The DT spec demands a unit-address in a node name to match the "reg"
property in that node. Newer dtc versions will throw warnings if this is
not the case.
Fix all occurences in the FIT image documentation files where this was not
observed, to not give bad examples to the reader.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2018-01-15 18:29:21 -07:00
Simon Glass
30d704c645 binman: Run code coverage tests
Binman has 100% test coverage for the code as it is at present. To
encourage it to stay that way, run the code-coverage test as part of the
normal U-Boot tests.

This is RFC because it requires the Python code coverage tools to be
available.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-01-15 18:29:21 -07:00
Simon Glass
f2d0778885 travis.yml: Run tests for tools
Run tests for the Python tools used by U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-01-15 18:29:21 -07:00
Simon Glass
00f6c800b5 test: Run dtoc tests
Update the test script to run the dtoc tests also.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-01-15 18:29:21 -07:00
Simon Glass
34ba7d777d test: Run buildman tests
Update the test script to run the buildman tests also.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-01-15 18:29:21 -07:00
Simon Glass
adb5b61612 test: Run patman tests
Update the test script to run the patman tests also.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-01-15 18:29:21 -07:00
Simon Glass
72d8172be0 test: Run binman tests
Update the test script to run the binman tests also.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-01-15 18:29:21 -07:00
Tom Rini
fdb6c3232f Merge git://git.denx.de/u-boot-net 2018-01-15 19:01:23 -05:00