Commit 2b42c9317d ("ahci: support LBA48 data reads for 2+TB drives")
introduced conditional code which triggers a warning when compiled
with DEBUG enabled:
In file included from common/cmd_scsi.c:12:0:
common/cmd_scsi.c: In function 'scsi_read':
include/common.h:109:4: warning: 'smallblks' may be used uninitialized in this function [-Wmaybe-uninitialized]
...
Since this is for debug only, take the easy way and initialize the
variable explicitly on declaration to avoid the warning.
(Fix a nearby whitespace error on the way.)
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Andre Przywara <osp@andrep.de>
Since commit 09c3280754 (mtd, nand: Move common functions from
cmd_nand.c to common place), NAND commands would not work at all
on large devices.
=> nand read 80000000 10000 10000
NAND read: Offset exceeds device limit
=> nand erase 100000 100000
NAND erase: Offset exceeds device limit
The type of the "size" of "struct mtd_info" is uint64_t, while
mtd_arg_off_size() and mtd_arg_off() treat chipsize as int type.
The chipsize is wrapped around if the argument is given with 2GB
or larger.
Acked-by: Heiko Schocher <hs@denx.de>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This patch enabled the USB/EHCI support for the Marvell
DB-88F6820-GP eval board.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
This patch adds USB EHCI host support for the common mvebu platform.
Including the Armada 38x.
Tested on DB-88F6280-GP eval board.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Configure and enable the SATA/SCSI (AHCI) support for the Marvell
DB-88F6820-GP eval board.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
This patch adds support for the common AHCI controller on the Marvell
Armada 38x.
Tested on the Marvell DB-88F6820-GP eval board.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
This patch changes the initialization of the AHCI controller to not
enable the default interrupts (DEF_PORT_IRQ). As interrupts are
not used in U-Boot in general, this should not break the common AHCI
driver operation.
This change is needed to support the Marvell Armada 38x AHCI
controller. With interrupts enabled, this results in timeouts in
ahci_device_data_io(). Not enabling these interrupts fixes this
problem and the common AHCI driver works fine.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Luka Perkov <luka.perkov@sartura.hr>
This patch adds MMC/SDIO support to the Marvell DB-88F6820-GP board
configuration. Including support for the common partitions and
filesystems.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Armada A38x implements an SDHCI compatible SDIO controller. This patch
enables the Marvell driver to support this SoC. And enables the
SDIO controller if selected by the board configuration.
Tested on Marvell DB-88F6820-GP board.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Luka Perkov <luka.perkov@sartura.hr>
While implementing SDIO/MMC SPL booting for the Marvell Armada 38x, the
following problem occured. The SPL runs in internal SRAM which is
the L2 cache locked to memory. When the MMC buffers now are located
on the stack (or bss), the SDIO controller (SDHCI) can't write into
this L2 cache memory.
This patch introduces a method to use a fixed buffer that will be
used for all transfers by defining CONFIG_FIXED_SDHCI_ALIGNED_BUFFER.
This way, the board can use this buffer address located in SDRAM
for all transfers. This solves this SPL problem on the A38x and
should only be used in the SPL U-Boot version.
Tested for SPL booting on Marvell Armada 38x DB-88F6820-GP board.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Luka Perkov <luka.perkov@sartura.hr>
The loop counter based timeout detection does not work on the Armada
38x based board (DB-88F6820-GP). At least with dcache enabled a
timeout is detected. Without dcache enabled, the timeout does not
occur. Increasing the loop counter solves this issue. But a better
solution is to use a timer based timeout detection instead. This
patch now implements this timer based detection.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Luka Perkov <luka.perkov@sartura.hr>
When driver model is not used the current code does not correctly select
the pinmux for the I2C bus. This bug was introduced by this commit:
8dfcbaa dm: i2c: s3c24x0: adjust to dm-i2c api
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Przemyslaw Marczak <p.marczak@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
When compling under 64bit platforms, there are lots of warnings,
like:
drivers/block/ahci.c:114:18: warning: cast to pointer from integer
of different size [-Wint-to-pointer-cast]
u8 *port_mmio = (u8 *)probe_ent->port[port].port_mmio;
^
drivers/block/ahci.c: In function ?.hci_host_init?.
drivers/block/ahci.c:218:49: warning: cast from pointer to integer
of different size [-Wpointer-to-int-cast]
probe_ent->port[i].port_mmio = ahci_port_base((u32) mmio, i);
......
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Baltos has USB0 connected to a USB hub and thus is host-only. USB1
is connected to microUSB connector and thus should use OTG mode.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Because it is possible for the MTD number to change, causing a
filesystem mount failure, we should use the volume name instead
of the MTD number and let Linux resolve the correct one.
Signed-off-by: Mike Scherban <m-scherban@ti.com>
On STM32F429 gpio PC6/PC7 can be allocated for USART6, as
reported in the comment.
But current code in
drivers/serial/serial_stm32.c
uses a different gpio mapping (PG14/PG9) for USART6.
Fix the comment to match current code in the driver.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
To: u-boot@lists.denx.de
To: Kamil Lulko <rev13@wp.pl>
Cc: Tom Rini <trini@konsulko.com>
When "scripts/get_maintainer.pl" parses "board/.../MAINTAINERS",
it uses the line containing board name as delimiter.
Without this line, the script happily mixes the lines from current
board MAINTAINERS file with lines from another file.
Fix it by adding a reasonable board name.
Tested by comparing output of:
cat board/st/stm32f429-discovery/MAINTAINERS
./scripts/get_maintainer.pl -f board/st/stm32f429-discovery
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
To: u-boot@lists.denx.de
To: Kamil Lulko <rev13@wp.pl>
Cc: Tom Rini <trini@konsulko.com>
Use one mtd partition for rootfs and configuration by
means of ubi volumes and get rid of configuration partition.
We can use partition layout for both 256MB and 512MB flash.
Signed-off-by: Samuel Egli <samuel.egli@siemens.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Roger Meier <r.meier@siemens.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Heiko Schocher <hs@denx.de>
Specify proper U-Boot offset, enable prefetch mode,
increase bootm size and add FIT fallback, if board_name
is not present in kernel-fit.itb image.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
This action is need to make I2C communication with PMIC
stable for low temperature. Print current I2C speed in
SPL for visual control.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
If board is booted with transitions happening on DCAN1 pins then
the following warning is seen in the kernel at boot when the
hwmod layer initializes.
"omap_hwmod: dcan1: _wait_target_disable failed"
This is because DCAN1 module's SWAKEUP mechanism is broken
and it fails to correctly turn OFF if it sees a transition on the
DCAN1 pins. Suggested workaround is to keep DCAN1 pins in safe mode
while enabling/disabling DCAN1 module.
The hwmod layer enables and disables all modules at boot
and we have no opportunity to put the DCAN1 pins in safe mode
at that point.
DCAN1 is not used by u-boot so it doesn't matter to it if these
pins are in safe mode. The kernel driver correctly configures
the right mode when DCAN1 is active.
Signed-off-by: Roger Quadros <rogerq@ti.com>
[trini: s/PULLUP/PULL_UP/ based on DRA7xx EVM version of this patch]
Signed-off-by: Tom Rini <trini@konsulko.com>
If board is booted with transitions happening on DCAN1 pins then
the following warning is seen in the kernel at boot when the
hwmod layer initializes.
"omap_hwmod: dcan1: _wait_target_disable failed"
This is because DCAN1 module's SWAKEUP mechanism is broken
and it fails to correctly turn OFF if it sees a transition on the
DCAN1 pins. Suggested workaround is to keep DCAN1 pins in safe mode
while enabling/disabling DCAN1 module.
The hwmod layer enables and disables all modules at boot
and we have no opportunity to put the DCAN1 pins in safe mode
at that point.
DCAN1 is not used by u-boot so it doesn't matter to it if these
pins are in safe mode. The kernel driver correctly configures
the right mode when DCAN1 is active.
Signed-off-by: Roger Quadros <rogerq@ti.com>
-fdelete-null-pointer-checks flag controls global dataflow analyses and
eliminate useless checks for null pointers; It assume that if a pointer is
checked after it has already been dereferenced, it cannot be null.
This flag is enabled by default.
gcc v4.9 has more optimizations added to this option. Hence it is very
aggressive with GCC v4.9 series. Add -fno-delete-null-pointer-checks to
disable the optimization
Signed-off-by: Rohit Dharmakan <rohitarulraj@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
This also came from Linux - according to this thread it has a GPL v2
license like arch/arm/mach-omap2/mux.h:
http://lists.denx.de/pipermail/u-boot/2015-June/217827.html
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Ingrid Viitanen <ingrid.viitanen@nokia.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The word "partition" is doubled. Keep decent forms for the
following lines.
Also, fix some other typos while we are here.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
bf533-stamp, bf538f-ezkit, and cm-bf548 are very space limited.
This was introduced by:
6e0d26c050 (net: Handle ethaddr changes as an env callback)
by enabling CONFIG_REGEX, which is too big for these boards.
This patch disables CONFIG_REGEX at the expense of working with more
than the first ethaddr.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Instead of selecting REGEX when NET is enabled, make it the default, but
allow boards that are tiny to disable it and lose functionality on all
but the first Ethernet adapter.
cm-bf548, bf538f-ezkit, and bf533-stamp need this. None appear to have
more than one Ethernet interface.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
commit f566c99 "net: Update hardware MAC address if it changes in env"
removes writing MAC address to designware controller after soft reset.
This makes designware ethernet port fail to work. Actually the MAC
address should always be programmed after soft reset.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
sun8i-a33-ippo-q8h-v1.2-lcd1024x600.dts has been merged into the upstream
Linux kernel as sun8i-a33-ippo-q8h-v1.2.dts, adjust u-boot to follow.
Note we've never shipped a final u-boot version with the old name, so this
is safe todo.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
we currently use in-development IODelay values for DRA72x which are
proposed in the data sheet, however, DRA72x EVM uses DP83865 ethernet
Phy over RGMII. The PHY characteristics and routing choices made on
the EVM, make the current iodelay values fail ethernet communication.
Instead, we need to choose custom values for DRA72x-evm specifically
designed for the PHY and routing on the platform for ethernet to
function.
Cc: Nishanth Menon <nm@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Tested-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
We have not supported the private library for ARM 64bit.
Prohibit ARM64 boards from enabling it until we make things ready.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
am43xx_evm_ethboot/usbhost_boot_defconfig entries are
missing in MAINTAINER file. Adding entries for them.
Reported-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
This removes the following two warnings from buildman:
WARNING: no status info for 'cairo'
WARNING: no maintainers for 'cairo'
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
Added UART DCC support for armv8
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The root cause of this problem should now be fixed.
This reverts commit a6a4c542d3.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Pavel Machek <pavel@denx.de>
Tested-by: Pavel Machek <pavel@denx.de>
When CONFIG_SYS_THUMB_BUILD is defined these functions may be called from
Thumb code. Add the required ENTRY and ENDPROC bracketing so that BLX is
used to call these ARM functions, instead of plain BL, which will fail.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Pavel Machek <pavel@denx.de>
The LPC32XX GPIO driver platdata currently contains GPIO state information,
which should go into priv_data. Thus rename lpc32xx_gpio_platdata to
lpc32xx_gpio_priv and convert to use dev_get_priv() instead.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Tested-by: Albert ARIBAUD <albert.aribaud@3adev.fr>
