Commit graph

116 commits

Author SHA1 Message Date
Rayagonda Kokatanur
2ba1bd1e11 driver: spi: add bcm iproc qspi support
IPROC qspi driver supports both BSPI and MSPI modes.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Signed-off-by: Bharat Gooty <bharat.gooty@broadcom.com>
Acked-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>

Signed-off-by: Roman Bacik <roman.bacik@broadcom.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-02-24 13:42:50 +05:30
Mark Kettenis
7184e2997e spi: apple: Add driver for Apple SPI controller
Add a driver for the SPI controller integrated on Apple SoCs.
This is necessary to support the keyboard on Apple Silicon laopts
since their keyboard uses an Apple-specific HID over SPI protocol.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested on: Macbook Air M1
Tested-by: Simon Glass <sjg@chromium.org>
2022-02-10 16:44:23 -05:00
Chris Morgan
3fb08a2138 spi: rockchip_sfc: add support for Rockchip SFC
This patch adds support for the Rockchip serial flash controller
found on the PX30 SoC. It should work for versions 3-5 of the SFC
IP, however I am only able to test it on v3.

This is adapted from the WIP SPI-MEM driver for the SFC on mainline
Linux. Note that the main difference between this and earlier versions
of the driver is that this one does not support DMA. In testing
the performance difference (performing a dual mode read on a 128Mb
chip) is negligible. DMA, if used, must also be disabled in SPL
mode when using A-TF anyway.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-08-12 09:34:11 +08:00
Frieder Schrempf
6b86554865 spi: fsl_qspi: Build driver only if DM_SPI is available
The driver depends on DM_SPI and if it's not available (e. g. in SPL),
then we should not try to build it as this will fail.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
2021-07-10 16:53:34 +02:00
Jassi Brar
971a344285 spi: synquacer: Add HSSPI SPI controller driver for SynQuacer
This is a driver for the HSSPI SPI controller on SynQuacer SoC.
The HSSPI has command sequence mode (memory mapped) and
direct mode (FIFO access). The driver will operate it under
the direct mode. And before booting OS, it switch back to the
command sequence mode since that is compatible with default
EDK2 behavior.

Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
2021-07-06 14:07:36 -04:00
Zhengxun
0d7066bce2 spi: Add MXIC controller driver
Add a driver for Macronix SPI controller IP.

This patch referred from linux spi-mxic.c. The difference from the
linux version is described here.

1. To adapt uboot spi framework, modify some functions naming.

2. Remove the incompatible functions of Uboot.

3. Add dummy byte recalculattion function to support dummy buswidth
   not align data buswidth operation.(ex: 1-1-4, 1-1-8)

4. Add Octal mode support.

Signed-off-by: Zhengxun <zhengxunli.mxic@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
[jagan: fixed file permission, comment line, kconfig]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2021-06-25 20:59:45 +05:30
SkyLake.Huang
7a49d61742 spi: mtk_snor: add support for MTK SPI NOR controller
This patch adds support for MTK SPI NOR controller, which you
can see on mt7622 & mt7629.

1. This controller is designed only for SPI NOR. We can't adjust
its bus clock dynamically. Set clock in dts instead.
2. This controller only supports 1-1-1 write mode.
3. Remove mtk_snor_match_read() since upper SPI-MEM layer already
handles command.
4. sf read/write/update commands are tested with this driver.

Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
2021-01-29 10:35:14 -05:00
Weijie Gao
2db6fba051 spi: add spi controller support for MediaTek MT7620 SoC
This patch adds spi controller support for MediaTek MT7620 SoC.

The SPI controller supports two chip selects. These two chip selects are
implemented as two separate register groups, but they share the same bus
(DI/DO/CLK), only CS pins are dedicated for each register group.
Appearently these two register groups cannot operates simulataneously so
they are implemented as one controller.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:26 +01:00
Pengpeng Chen
24f2794232 spi: ca_sflash: Add CAxxxx SPI Flash Controller
Add SPI Flash controller driver for Cortina Access
CAxxxx SoCs

Signed-off-by: Pengpeng Chen <pengpeng.chen@cortina-access.com>
Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
CC: Vignesh R <vigneshr@ti.com>
CC: Tom Rini <trini@konsulko.com>
[jagan: rebase on master]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-12-18 16:16:37 +05:30
Robert Marko
367ea426a5 spi: Add Qualcomm QUP SPI controller driver
This patch adds support for the Qualcomm QUP SPI controller that is commonly found in most of Qualcomm SoC-s.

Driver currently supports v1.1.1, v2.1.1 and v2.2.1 HW.
FIFO and Block modes are supported, no support for DMA mode is planned.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2020-10-22 09:54:54 -04:00
Suneel Garapati
7853cc0598 drivers: spi: Add SPI controller driver for Octeon
Adds support for SPI controllers found on Octeon II/III and Octeon TX
TX2 SoC platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-08-03 21:14:48 +02:00
Tom Rini
582b4f7f39 Convert CONFIG_CADENCE_QSPI to Kconfig
This converts the following to Kconfig:
   CONFIG_CADENCE_QSPI

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-29 13:34:43 -04:00
Lukasz Majewski
56c4046038 spi: Convert CONFIG_DM_SPI* to CONFIG_$(SPL_TPL_)DM_SPI*
This change allows more fine tuning of driver model based SPI support in
SPL and TPL. It is now possible to explicitly enable/disable the DM_SPI
support in SPL and TPL via Kconfig option.

Before this change it was necessary to use:
    /* SPI Flash Configs */
    #if defined(CONFIG_SPL_BUILD)
    #undef CONFIG_DM_SPI
    #undef CONFIG_DM_SPI_FLASH
    #undef CONFIG_SPI_FLASH_MTD
    #endif

in the ./include/configs/<board>.h, which is error prone and shall be
avoided when we strive to switch to Kconfig.

The goal of this patch:

Provide distinction for DM_SPI support in both U-Boot proper and SPL (TPL).
Valid use case is when U-Boot proper wants to use DM_SPI, but SPL must
still support non DM driver.

Another use case is the conversion of non DM/DTS SPI driver to support
DM/DTS. When such driver needs to work in both SPL and U-Boot proper, the
distinction is needed in Kconfig (also if SPL version of the driver
supports OF_PLATDATA).

In the end of the day one would have to support following use cases (in
single driver file - e.g. mxs_spi.c):

- U-Boot proper driver supporting DT/DTS
- U-Boot proper driver without DT/DTS support (deprecated)
- SPL driver without DT/DTS support
- SPL (and TPL) driver with DT/DTS (when the SoC has enough resources to
  run full blown DT/DTS)
- SPL driver with DT/DTS and SPL_OF_PLATDATA (when one have constrained
  environment with no fitImage and OF_LIBFDT support).

Some boards do require SPI support (with DM) in SPL (TPL) and some only
have DM_SPI{_FLASH} defined to allow compiling SPL.

This patch converts #ifdef CONFIG_DM_SPI* to #if CONFIG_IS_ENABLED(DM_SPI)
and provides corresponding defines in Kconfig.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Tested-by: Adam Ford <aford173@gmail.com> #da850-evm
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
[trini: Fixup a few platforms]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-29 13:34:43 -04:00
Jagan Teki
726c0343a8 spi: Zap SOFT_SPI (non-dm)
- Deadline for DM migration already passed by months.
- Sent couple of zap patches and
- No response on dm conversation
hence removed the driver.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-06-11 15:14:04 +05:30
Jagan Teki
84673b4550 spi: Zap sh_spi driver
sh_spi driver is deprecated, no active updates and
no board user, hence dropped the same.

Cc: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-01 17:55:24 +05:30
Jagan Teki
d0847ecc9f spi: Zap lpc32xx_ssp driver-related code
lpc32xx_ssp driver is deprecated, no active updates
and no board user, hence dropped the same.

Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Albert ARIBAUD <albert.aribaud@3adev.fr>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-05-11 01:30:49 +05:30
Michael Walle
383fded70c spi: nxp_fspi: new driver for the FlexSPI controller
This is a port of the kernel's spi-nxp-fspi driver. It uses the new
spi-mem interface and does not expose the more generic spi-xfer
interface. The source was taken from the v5.3-rc3 tag.

The port was straightforward:
 - remove the interrupt handling and the completion by busy polling the
   controller
 - remove locks
 - move the setup of the memory windows into claim_bus()
 - move the setup of the speed into set_speed()
 - port the device tree bindings from the original fspi_probe() to
   ofdata_to_platdata()

There were only some style change fixes, no change in any logic. For
example, there are busy loops where the return code is not handled
correctly, eg. only prints a warning with WARN_ON(). This port
intentionally left most functions unchanged to ease future bugfixes.

This was tested on a custom LS1028A board. Because the LS1028A doesn't
have proper clock framework support, changing the clock speed was not
tested. This also means that it is not possible to change the SPI
speed on LS1028A for now (neither is it possible in the linux driver).

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Kuldeep Singh <kuldeep.singh@nxp.com>
2020-01-27 22:27:21 +05:30
Weijie Gao
1f174689c1 spi: Drop obsolete mtk_qspi driver references
Since u-boot has added the spi-mem framework and replaced
the spi-nor framework, the mtk_qspi is no longer compatible
with the new spi-nor driver.

Remove this driver along with replacing config item
with new mtk spi-nor driver.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
[jagan: squash related changes and update commit message]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-25 18:52:20 +05:30
Weijie Gao
603fcd16b1 spi: add spi-mem driver for MediaTek MT7629 SoC
This patch adds spi-mem driver for MediaTek MT7629 SoC
to access SPI-NOR and SPI-NAND flashes.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
[jagan: squash MAINTAINERS file]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-25 18:52:12 +05:30
Bhargav Shah
a2f32bfdd3 spi: Add SiFive SPI driver
This patch adds SiFive SPI driver. The driver is 100% DM driver
and it determines input clock using clk framework.

The SiFive SPI block is found on SiFive FU540 SOC and is used to
access flash and MMC devices on SiFive Unleashed board.

This driver implementation is inspired from the Linux SiFive SPI
driver available in Linux-5.2 or higher and SiFive FSBL sources.

Signed-off-by: Bhargav Shah <bhargavshah1988@gmail.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-18 17:11:16 +05:30
Kunihiko Hayashi
9424ecd735 spi: Add SPI controller driver for UniPhier SoCs
Add SPI controller driver implemented in Socionext UniPhier SoCs.
This controller has the SPI master mode only.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
2019-07-10 22:37:23 +09:00
Tudor Ambarus
24c8ff4684 spi: Add Atmel QuadSPI driver
Backport the driver from linux v5.1-rc5 and adapt it for u-boot.
Tested on sama5d2_xplained Rev B with mx25l25635e spi-nor flash.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-09 09:26:43 +03:00
Patrice Chotard
a2a89b2e21 spi: stm32: Add Serial Peripheral Interface driver for STM32MP
Add SPI driver support for STM32MP SoCs family.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-06-06 17:40:17 +02:00
Vignesh Raghavendra
61ae9782ef spi: ti_qspi: Drop non DM code
Now that all boards using TI QSPI have moved to DM and DT, drop non DM
code completely.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
[jagan: update MIGRATION.txt, rebase config_whitelist.txt]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-17 17:43:19 +05:30
Jagan Teki
a51cd54eff spi: Rename sun4i_spi.c into spi-sunxi.c
Now the same SPI controller driver is reusable in all Allwinner
SoC variants, so rename the existing sun4i_spi.c into spi-sunxi.c
which eventually look like a common sunxi driver.

Also update the function, variable, structure names in driver from
sun4i into sunxi.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-03-04 18:08:56 +05:30
Vignesh R
6430eea639 spi: Add non DM version of SPI_MEM
Add non DM version of SPI_MEM to support easy migration to new SPI NOR
framework. This can be removed once DM_SPI conversion is complete.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07 15:33:21 +05:30
Lars Povlsen
fd6e0b0525 mips: spi: mscc: Add fast bitbang SPI driver
This patch add a new SPI driver for MSCC SOCs that does not sport the
designware SPI hardware controller.

Performance gain: 7.664 seconds vs. 17.633 for 1 Mbyte write.

Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-01-16 13:56:43 +01:00
Guochun Mao
052cafd2a5 spi: mtk_qspi: add qspi driver for MT7629 SoC
This patch adds MT7629 qspi driver for accessing SPI NOR flash.

Signed-off-by: Guochun Mao <guochun.mao@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-11-24 14:41:12 +05:30
Neil Armstrong
9d26506a9c spi: Add Amlogic Meson SPI Flash Controller driver
The Amlogic Meson SoCs embeds a Flash oriented SPI Controller name SPIFC.
This driver, ported from the Linux meson-spi-spifc driver, add support
for this controller on the Amlogic Meson GX SoCs in U-Boot.

Tested-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-11-24 14:41:12 +05:30
Stefan Roese
5eee9dee41 spi: Add SPI driver for MT76xx SoCs
This patch adds the SPI driver for the MediaTek MT7688 SoC (and
derivates). Its been tested on the LinkIt Smart 7688 and the Gardena
Smart Gateway with and SPI NOR on CS0 and on the Gardena Smart
Gateway additionally with an SPI NAND on CS1.

Note that the SPI controller only supports a max transfer size of 32
bytes. This driver implementes a workaround to enable bigger xfer
sizes to speed up the transfer especially for the SPI NAND support.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Jagan Teki <jagan@openedev.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Piotr Dymacz <pepe2k@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-10-04 18:27:28 +05:30
Tom Rini
592cd5defd Merge branch 'master' of git://git.denx.de/u-boot-spi
This is the PR for SPI-NAND changes along with few spi changes.

[trini: Re-sync changes for ls1012afrwy_qspi*_defconfig]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-10-02 17:01:46 -04:00
Quentin Schulz
8a4791fa08 spi: add support for ARM PL022 SPI controller
This adds support for the ARM PL022 SPI controller for the standard
variant (0x00041022) which has a 16bit wide and 8 locations deep TX/RX
FIFO.

A few parts were borrowed from the Linux kernel driver.

Cc: Armando Visconti <armando.visconti@st.com>
Cc: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
2018-09-25 21:49:18 -04:00
Boris Brezillon
d13f5b254a spi: Extend the core to ease integration of SPI memory controllers
Some controllers are exposing high-level interfaces to access various
kind of SPI memories. Unfortunately they do not fit in the current
spi_controller model and usually have drivers placed in
drivers/mtd/spi-nor which are only supporting SPI NORs and not SPI
memories in general.

This is an attempt at defining a SPI memory interface which works for
all kinds of SPI memories (NORs, NANDs, SRAMs).

Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
2018-09-20 20:10:49 +05:30
Stefan Mavrodiev
7f25d81797 arm: sunxi: Allwinner A10 SPI driver
Add spi driver for sun4i, sun5i and sun7i SoCs. The driver is
adapted from mailine kernel.

Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-08-03 11:14:08 +05:30
Siva Durga Prasad Paladugu
22cca1730e spi: zynqmp_gqspi: Add support for ZynqMP qspi driver
This patch adds qspi driver support for ZynqMP SoC. This
driver is responsible for communicating with qspi flash
devices.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
[jagan: removed GQSPI_MIO_NUM_ macros]
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-07-16 14:01:47 +05:30
Thomas Fitzsimmons
894c3ad27f board: arm: Add support for Broadcom BCM7445
Add support for loading U-Boot on the Broadcom 7445 SoC.  This port
assumes Broadcom's BOLT bootloader is acting as the second stage
bootloader, and U-Boot is acting as the third stage bootloader, loaded
as an ELF program by BOLT.

Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org>
Cc: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
2018-07-10 16:55:57 -04:00
Tom Rini
83d290c56f SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 09:34:12 -04:00
Marek Vasut
fbebea27e1 mtd: spi: Add Renesas RPC SPI-flash driver
Add driver for the RPC block in SPI-flash mode. This driver allows
access to a SPI NOR flash attached to the RPC block and does not
support RPC in Hyperflash mode. Note that this block is extremely
selective when communicating with the SPI NOR.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-04-11 23:12:01 +02:00
Álvaro Fernández Rojas
29cc4368ad dm: spi: add BCM63xx HSSPI driver
This driver is a simplified version of linux/drivers/spi/spi-bcm63xx-hsspi.c

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:04:06 +05:30
Álvaro Fernández Rojas
5ac07d2969 dm: spi: add BCM63xx SPI driver
This driver is a simplified version of linux/drivers/spi/spi-bcm63xx.c

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:03:43 +05:30
Rick Chen
41bbb8b333 spi: nds_ae3xx: Rename nds_ae3xx_spi as atcspi200_spi
atcspi200 is Andestech spi ip which is embedded in
AE3XX and AE250 platforms. So rename as atcspi200
will be more reasonable to be used in different
platforms.

Signed-off-by: Rick Chen <rick@andestech.com>
2017-11-30 09:44:09 +08:00
Tuomas Tynkkynen
95688de311 spi: Drop CONFIG_ATMEL_DATAFLASH_SPI
Last user of this option went away in commit:

fdc7718999 ("board: usb_a9263: Update to support DT and DM")

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Acked-by: Wenyou Yang <wenyou.yang@microchip.com>
2017-10-16 09:42:51 -04:00
rick
7155cd2e6e nds32: spi: Support spi dm driver.
Support spi driver and can detect MX25U1635E flash on AE3XX board.

Verification:

sf probe 0:0 50000000 0
spi_flash_std_probe(sf_Probr.c)
	spi_flash_probe_slave(sf_Probr.c)
	SF: Detected mx25u1635e with page size 256 Bytes, erase size 4 KiB, total 2 MiB
	NDS32 # sf test 0x100000 0x1000
	SPI flash test:
	0 erase: 34 ticks, 117 KiB/s 0.936 Mbps
	1 check: 15 ticks, 266 KiB/s 2.128 Mbps
	2 write: 21 ticks, 190 KiB/s 1.520 Mbps
	3 read: 11 ticks, 363 KiB/s 2.904 Mbps
	Test passed
	0 erase: 34 ticks, 117 KiB/s 0.936 Mbps
	1 check: 15 ticks, 266 KiB/s 2.128 Mbps
	2 write: 21 ticks, 190 KiB/s 1.520 Mbps
	3 read: 11 ticks, 363 KiB/s 2.904 Mbps

Signed-off-by: rick <rick@andestech.com>
2017-09-21 10:30:22 +08:00
Christophe Leroy
f88c431b8a powerpc, 8xx: move SPI driver to drivers/spi/
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2017-07-08 15:56:03 -04:00
Tom Rini
ea3310e8aa Blackfin: Remove
The architecture is currently unmaintained, remove.

Cc: Benjamin Matthews <mben12@gmail.com>
Cc: Chong Huang <chuang@ucrobotics.com>
Cc: Dimitar Penev <dpn@switchfin.org>
Cc: Haitao Zhang <hzhang@ucrobotics.com>
Cc: I-SYST Micromodule <support@i-syst.com>
Cc: M.Hasewinkel (MHA) <info@ssv-embedded.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Martin Strubel <strubel@section5.ch>
Cc: Peter Meerwald <devel@bct-electronic.com>
Cc: Sonic Zhang <sonic.adi@gmail.com>
Cc: Valentin Yakovenkov <yakovenkov@niistt.ru>
Cc: Wojtek Skulski <info@skutek.com>
Cc: Wojtek Skulski <skulski@pas.rochester.edu>
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-04-05 13:52:01 -04:00
Michael Kurz
d4363baada ARM: SPI: stm32: add stm32f746 qspi driver
This patch adds support for the QSPI IP found in stm32f7 devices.

Signed-off-by: Michael Kurz <michi.kurz@gmail.com>
2017-01-28 14:04:50 -05:00
Jagan Teki
68e7999ba9 spi: Zap cf_qspi driver and related code
Dropped becuase
- driver not used any board.
- no dm conversion.

Cc: Angelo Dureghello <angelo@sysam.it>
Cc: Richard Retanubun <richardretanubun@ruggedcom.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Acked-by: Angelo Dureghello <angelo@sysam.it>
2017-01-15 18:29:04 +01:00
Jagan Teki
ee86e0d2fe spi: Zap ep93xx_spi driver and related code
Dropped becuase
- driver and related configs not used any board.
- no dm conversion.

Cc: Heiko Schocher <hs@denx.de>
Cc: Sergey Kostanbaev <sergey.kostanbaev@gmail.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
2017-01-13 22:47:14 +01:00
Jagan Teki
cb71c6d854 spi: Zap armada100_spi.c and env
armada100_spi.c and related env is zapping becuase
of "no DM conversion".

Cc: Ajay Bhargav <ajay.bhargav@einfochips.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
2016-12-21 12:18:47 +01:00
Jagan Teki
353f6a770f spi: Zap mpc52xx_spi.c, config and related code
armada100_spi.c, related config options and related codes
are zapping becuase of "no DM conversion".

Cc: Werner Pfister <Pfister_Werner@intercontrol.de>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-12-21 12:14:37 +01:00