Commit graph

50845 commits

Author SHA1 Message Date
Alexander Graf
e4679489c3 efi_loader: Convert runtime reset from switch to if statements
We currently handle the UEFI runtime reset / power off case handling via
a switch statement. Compilers (gcc in my case) may opt to handle these via
jump tables which they may conveniently put into .rodata which is not part
of the runtime section, so it will be unreachable when executed.

Fix this by just converting the switch statement into an if/else statement.
It produces smaller code that is faster and also correct because we no
longer refer .rodata from efi runtime code.

Reported-by: Andreas Färber <aferber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-14 10:52:14 +02:00
Alexander Graf
de452c04c3 riscv: Add support for HI20 PE relocations
The PE standard allows for HI20/LOW12 relocations. Within the efi_loader
target we always know that our relocation target is 4k aligned, so we
don't need to worry about the LOW12 part.

This patch adds support for the respective relocations. With this and a
few grub patches I have cooking in parallel I'm able to run grub on RISC-V.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-06-14 10:52:14 +02:00
Michal Simek
5b2c9a6ce3 net: gem: Check return value from memalign/malloc
Functions can return NULL in case of error that's why checking return
value is needed.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13 13:59:04 -05:00
Michal Simek
7674b64d78 net: zynq_gem: Initialize phyreg variable
In case of phyread()/phy_setup_op() timeout code is working with
uninitialized phyreg variable. Initialize this variable to make sure
that code it not working with random value.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13 13:54:18 -05:00
Michal Simek
b33d4a5fc7 net: zynq_gem: Fix return type for phy...()
wait_for_bit_le32 returns negative value on failure. Fix phy...() to
handle these failures properly.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13 13:54:17 -05:00
Chris Packham
5194ed7edc net: mvgbe: extract common code for SMI wait
Combine repeated code from smi_reg_read/smi_reg_write into a common
function smi_wait_ready.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13 13:54:17 -05:00
Quentin Schulz
c61221948c net: designware: set the PS bit when resetting DMA bus in MII configuration
On the SPEAr600 SoC, which has the dwmac1000 variant of the IP block,
the DMA reset never succeeds when a MII PHY is used (no problem with a
GMII PHY). The designware_eth_init() function sets the
DMAMAC_SRST bit in the DMA_BUS_MODE register, and then
polls until this bit clears. When a MII PHY is used, with the current
driver, this bit never clears and the driver therefore doesn't work.

The reason is that the PS bit of the GMAC_CONTROL register should be
correctly configured for the DMA reset to work. When the PS bit is 0,
it tells the MAC we have a GMII PHY, when the PS bit is 1, it tells
the MAC we have a MII PHY.

Doing a DMA reset clears all registers, so the PS bit is cleared as
well. This makes the DMA reset work fine with a GMII PHY. However,
with MII PHY, the PS bit should be set.

We have identified this issue thanks to two SPEAr600 platform:

- One equipped with a GMII PHY, with which the existing driver was
working fine.

- One equipped with a MII PHY, where the current driver fails because
the DMA reset times out.

Note: Taken from https://www.spinics.net/lists/netdev/msg432578.html

Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13 13:54:17 -05:00
Chris Packham
3cb51dad0d net: phy: mv88e61xx: Force CPU port link up
When connecting to from a CPU direct to a 88e6097 typically RGMII is
used. In order for traffic to actually pass we need to force the link up
so the CPU MAC on the other end will see the link.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13 13:54:17 -05:00
Jon Nettleton
199b27bb70 mvebu: neta: align DMA buffers
This makes sure the DMA buffers are properly aligned for the
hardware.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Jon Nettleton <jon@solid-run.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13 13:54:17 -05:00
Kunihiko Hayashi
a8927795ef net: add Socionext AVE ethernet driver support
Add driver for Socionext AVE ethernet controller that includes MAC and
MDIO bus supporting RGMII/RMII modes.
The driver behaves the ethernet driver model (DM_ETH) with devicetree.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13 13:54:17 -05:00
Kunihiko Hayashi
ff114e0f76 net: include/phy.h: add new mode for internal phy
Add the new mode to indicate a built-in PHY.
This will be used by UniPhier AVE ethernet driver.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13 13:54:16 -05:00
Radu Bulie
98017a1fb5 drivers/net/vsc9953: Initialize action RAM in VCAP complex
VCAP tables must be initialized even if no advanced classification
is used. If no initialization is performed, then ECC error will
be observed by the user when the first packet enters the l2switch.
The error is marked in MPIC_EISR0 -bit 29 which means - Internal RAM
multi-bit ECC error.
This patch fixes the aforementioned ECC error by performing the
initialization of VCAP tables.

Signed-off-by: Radu Bulie <radu-andrei.bulie@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13 13:54:16 -05:00
Vasily Khoruzhick
d48d40a091 net: nfs: don't fail when nfs_read_reply returns -NFS_RPC_DROP
That can happen if duplicate UDP packet arrived, and that's not uncommon.
Anyway, we ignore packets with rpc_id lower than last we sent for other
requests, so it makes sense to do that for read request as well.

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13 13:54:16 -05:00
Alex Kiernan
286bea2e85 net: cpsw: ti: Reap completed packets before stopping interface
If you send a final packet just before stopping the interface (e.g. a final
ACK as part of the UDP fastboot protocol), then that packet isn't reliably
delivered onto the wire.

Reap packets prior to stopping the interface to ensure any which are
in-flight make it out. Also remove buffer and len from the call to
cpdma_process() as we weren't using them on their return.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13 13:54:16 -05:00
Leonid Iziumtsev
60177b2617 net: Protect net_state from reentrant net_loop()
Global variable "net_state" is used in net_loop() state-machine.
But it happens that some times the net_loop() can be called
multiple times in the same call stack. For example when the
netconsole is enabled and we print the message while some other
net protocol is in action. Netconsole will overwrite the "net_state"
and that will break the logic for earlier started protocol.

To protect the state save and restore "net_state" variable each
time when we enter and exit net_loop().

Signed-off-by: Leonid Iziumtsev <leonid.iziumtsev@se.atlascopco.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13 13:54:16 -05:00
Vicentiu Galanopulo
552e7c57d0 net/phy/cortina: Add support for CS4223 PHY
Add support for Cortina CS4223 10G PHY
  - As per the CS4223 specs, an EEPROM module is
    connected to the PHY. At startup the PHY reads
    the firmware line and tries to load the firmware
    into the internal memory.
  - This driver reads the EEPROM status
    and checks if firmware has been loaded

Signed-off-by: Vicentiu Galanopulo <vicentiu.galanopulo@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13 13:54:15 -05:00
Joe Hershberger
6e35686d89 net: sunxi: Correct MAC address register order
Put the enetaddr data in the same order as it was before the change in
commit ace1520cb5 ("net: sunxi-emac: Write HW address via function")

Reported-by: Udo Maslo <u.maslo@web.de>
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13 13:54:15 -05:00
Joe Hershberger
6f0dc0ca31 net: Express LINK_LOCAL dependency on LIB_RAND
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13 13:54:15 -05:00
Mario Six
5e9d9abe08 tsec: Fix reading phy registers from DT
Bus translations should be applied when reading the address of the sgmii
phy registers from the DT. Use ofnode_get_addr_index instead of the
plain ofnode_read_u32_default to fix this.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13 13:54:15 -05:00
Mario Six
3ce4304205 net: Initialize as many ethernet devices as possible
On devices that have their first network interface provided by a FPGA,
the initialization of further interfaces will fail if the FPGA is not
yet programmed. This leads to problems during factory setup when the
data is supposed to be loaded over secondary netowork interfaces.

To avoid this, use the uclass_{first,next}_device_check functions to
initialize as many ethernet devices as possible.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13 13:54:15 -05:00
Mario Six
2d8f25ed7b net: Always align tx packets
Make sure that TX packets are always cache-aligned.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-06-13 13:54:15 -05:00
Tom Rini
66398944f5 Merge git://git.denx.de/u-boot-x86 2018-06-13 11:43:59 -04:00
Adam Ford
acaee30608 ARM: DTS: resync a3517.dtsi with Linux 4.17
Linux 4.17 was just released with some minor changes to the
am3517.dtsi.  This patch re-syncs the file.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-06-13 07:49:14 -04:00
Adam Ford
e3b1aaa4e0 ARM: am3517_evm: Enable SPL_OF_CONTROL and SPL_OF_PLATDATA
The SPL doesn't have much room, so in order to support OF_CONTROL
in SPL, we need the extra functionality of SPL_OF_PLATDATA.

Adding these features allows us to remove a small part of code without
losing the serial port during SPL.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-06-13 07:49:14 -04:00
Tomi Valkeinen
eae8291913 dra76: fix HDMI HPD pinmux
The pin used for HDMI HPD should be set to GPIO mode on DRA76, similarly
to all the other DRA7 and AM5 SoCs.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2018-06-13 07:49:14 -04:00
Tomi Valkeinen
32651e4fb8 dra7/am5: remove CEC pin pull-up
HDMI CEC pins are set to pull-up, but CEC requires no pull. Fix this.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2018-06-13 07:49:13 -04:00
Alex Kiernan
8df430d09b env: Add !ENV_IS_IN_EXT4 dependency to ENV_IS_NOWHERE
If ENV_IS_IN_EXT4 is set you shouldn't be able to select ENV_IS_NOWHERE.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Petr Vorel <petr.vorel@gmail.com>
2018-06-13 07:49:13 -04:00
Shyam Saini
919d25c920 u-boot: Fix several typos
's/environemnt/environment/' and
	's/Environemnt/Environment/'

Signed-off-by: Shyam Saini <shyam@amarulasolutions.com>
2018-06-13 07:49:13 -04:00
Alex Kiernan
94b233f443 tools: env: Use getline rather than fgets when reading config/script
When reading the config file, or a script file, use getline rather than
fgets so line lengths aren't limited by the size of a compiled in buffer
(128 characters for config, 1024 for scripts).

Rename 'dump' to 'line' so it's clear we're working with a line of text.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-06-13 07:49:12 -04:00
Adam Ford
2aa686775b AM3517_EVM: Fix Environmental location
The am3517-evm boards stores the environment in NAND, but after merging
various configs, the board was trying to load environment variables from
FAT which would ultimately fail and cause some chatter.

This patch removes the ENV_IS_IN_FAT flag to eliminate the noise.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-06-13 07:49:12 -04:00
Alexey Brodkin
f8c987f8f1 lib: Add hexdump
Often during debugging session it's very interesting to see
what data we were dealing with. For example what we write or read
to/from memory or peripherals.

This change introduces functions that allow to dump binary
data with one simple function invocation like:
------------------->8----------------
print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, buf, len);
------------------->8----------------

which gives us the following:
------------------->8----------------
00000000: f2 b7 c9 88 62 61 75 64 72 61 74 65 3d 31 31 35  ....baudrate=115
00000010: 32 30 30 00 62 6f 6f 74 61 72 67 73 3d 63 6f 6e  200.bootargs=con
00000020: 73 6f 6c 65 3d 74 74 79 53 33 2c 31 31 35 32 30  sole=ttyS3,11520
00000030: 30 6e 38 00 62 6f 6f 74 64 65 6c 61 79 3d 33 00  0n8.bootdelay=3.
00000040: 62 6f 6f 74 66 69 6c 65 3d 75 49 6d 61 67 65 00  bootfile=uImage.
00000050: 66 64 74 63 6f 6e 74 72 6f 6c 61 64 64 72 3d 39  fdtcontroladdr=9
00000060: 66 66 62 31 62 61 30 00 6c 6f 61 64 61 64 64 72  ffb1ba0.loadaddr
00000070: 3d 30 78 38 32 30 30 30 30 30 30 00 73 74 64 65  =0x82000000.stde
00000080: 72 72 3d 73 65 72 69 61 6c 30 40 65 30 30 32 32  rr=serial0@e0022
00000090: 30 30 30 00 73 74 64 69 6e 3d 73 65 72 69 61 6c  000.stdin=serial
000000a0: 30 40 65 30 30 32 32 30 30 30 00 73 74 64 6f 75  0@e0022000.stdou
000000b0: 74 3d 73 65 72 69 61 6c 30 40 65 30 30 32 32 30  t=serial0@e00220
000000c0: 30 30 00 00 00 00 00 00 00 00 00 00 00 00 00 00  00..............
...
------------------->8----------------

Source of hexdump.c was copied from Linux kernel v4.7-rc2.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Mario Six <mario.six@gdsys.cc>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Stefan Roese <sr@denx.de>
2018-06-13 07:49:12 -04:00
Yevgeny Popovych
f559180176 fs: btrfs: Fix not all CHUNK_ITEMs being read from CHUNK_TREE
This causes errors when translating logical addresses to physical:
  btrfs_map_logical_to_physical: Cannot map logical address <addr> to physical
  btrfs_file_read: Error reading extent

The behavior of btrfs_map_logical_to_physical() is to stop traversing
CHUNK_TREE when it encounters first non-CHUNK_ITEM, which makes
only some portion of CHUNK_ITEMs being read.
Change it to skip over non-chunk items.

Signed-off-by: Yevgeny Popovych <yevgenyp@pointgrab.com>
Cc: Marek Behun <marek.behun@nic.cz>
Cc: Sergey Struzh <sergeys@pointgrab.com>
Reviewed-by: Marek Behun <marek.behun@nic.cz>
2018-06-13 07:49:12 -04:00
Neil Armstrong
5b3da7fa12 ARM64: meson: Sync DT with Linux 4.17
Synchronize the Linux Device Tree for Amlogic Meson GX boards from Linux 4.17.0

This will enable USB on Amlogic Meson GXL Boards like Khadas VIM, P212 or
LibreTech-CC.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-06-13 07:49:11 -04:00
Seung-Woo Kim
6e2151c729 fs: fat: fix wrong casting to unsigned value of sect_to_cluster()
After the commit 265edc03d5 ("fs/fat: Clean up open-coded sector
<-> cluster conversions"), it is hung up writing new file to FAT16
disk with more than 19 files in armv7. It is because result value
of sect_to_cluster() is not proper by casting from signed value to
unsigned value. Fix the wrong casting of sect_to_cluster().

Reported-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2018-06-13 07:49:11 -04:00
Vasily Khoruzhick
11bb62768d usb: sunxi: sun50i: enable OHCI0 clock when OHCI1 is in use
On A64 OHCI1 clock source is OHCI0 clock, so we need to enable OHCI0
clock when OHCI1 is in use.

Fixes commit dd3228170a ("usb: sunxi: Switch to use generic-phy")

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
2018-06-13 07:33:42 +02:00
Vasily Khoruzhick
56830cee3a usb: sunxi: ohci: get rid of ifdefs
We can use compatibles instead.

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
2018-06-13 07:33:42 +02:00
Vasily Khoruzhick
1ed9c11188 usb: sunxi: ehci: get rid of ifdefs
We can use compatibles instead.

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
2018-06-13 07:33:42 +02:00
Vasily Khoruzhick
b62cdbdded sunxi: clock: Fix EHCI and OHCI clocks on A64
EHCI0 is bit 24, EHCI1 - 25, OHCI0 - 28, OHCI1 - 29

Fixes commit fef73766d9 ("sunxi: clock: Fix OHCI clock gating for H3/H5")

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
2018-06-13 07:33:42 +02:00
Bin Meng
bee053e248 x86: cougarcanyon2: Add missing chipset interrupt information
Add Panther Point chipset interrupt pin/PIRQ information, and
enable the generation of PIRQ routing table and MP table.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Bin Meng
51050ff0a2 x86: irq: Support discrete PIRQ routing registers via device tree
Currently both pirq_reg_to_linkno() and pirq_linkno_to_reg() assume
consecutive PIRQ routing control registers. But this is not always
the case on some platforms. Introduce a new device tree property
intel,pirq-regmap to describe how the PIRQ routing register offset
is mapped to the link number and adjust the irq router driver to
utilize the mapping.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Bin Meng
dcec5d565a x86: irq: Parse number of PIRQ links from device tree
The "intel,pirq-link" property in Intel IRQ router's dt bindings
has two cells, where the second one represents the number of PIRQ
links on the platform. However current driver does not parse this
information from device tree. This adds the codes to do the parse
and save it for future use.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Bin Meng
558f3ed9c8 x86: efi: payload: Minor clean up on error message output
If GetMemoryMap() fails, we really want to know EFI_BITS_PER_LONG
instead of BITS_PER_LONG. A space and LF are added in places where
error message is output to improve readability.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Christian Gmeiner
6f95d89c71 dm: pci: Use a 1:1 mapping for bus <-> phy addresses
If U-Boot gets used as coreboot payload all pci resources got
assigned by coreboot. If a dts without any pci ranges gets used
the dm is not able to access pci device memory. To get things
working make use of a 1:1 mapping for bus <-> phy addresses.

This change makes it possible to get the e1000 U-Boot driver
working on a sandybridge device where U-Boot is used as coreboot
payload.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed 'u-boot' in the commit message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Christian Gmeiner
f2825f6ec0 dm: pci: Make ranges dt property optional
If we use U-Boot as coreboot payload with a generic dts without
any ranges specified we fail in pci pre_probe and our pci bus
is not usable.

So convert decode_regions(..) into a void function and do the simple
error handling there.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed 'u-boot' in the commit message and checkpatch warning]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Bin Meng
16dde8945e x86: efi: payload: Enforce toolchain to generate 64-bit EFI payload stub codes
Attempting to use a toolchain that is preconfigured to generate code
for the 32-bit architecture (i386), for example, the i386-linux-gcc
toolchain on kernel.org, to compile the 64-bit EFI payload does not
build. This updates the makefile fragments to ensure '-m64' is passed
to toolchain when building the 64-bit EFI payload stub codes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Bin Meng
b8038a1cdb x86: efi: app: Fix broken EFI application
The EFI application does not boot currently. It's due to the call
to syscon_get_by_driver_data() in cpu_init_r() maps to nowhere as
CONFIG_SYSCON is not included in the configuration.

EFI application is built as a shared library, so GCC won't complain
during the build process if some symbols are not found. GCC will
simply put these symbols into the .plt section and expect dynamic
loader to fix these up.

While we are here, remove some commands and drivers that are not
needed at present.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Bin Meng
fcfc8a82b1 x86: Conditionally build the pinctrl_ich6 driver
The pinctrl_ich6 driver is currently unconditionally built for all
x86 boards. Let's use a Kconfig option to control the build.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Bin Meng
594d089c8a x86: irq: Change LINK_V2N and LINK_N2V to inline functions
LINK_V2N and LINK_N2V are currently defines, so they cannot handle
complex logics. Change to inline functions for future extension.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Bin Meng
bc728b1bc0 x86: irq: Remove chipset specific irq router drivers
At present there are 3 irq router drivers. One is the common one
and the other two are chipset specific for queensbay and quark.
However these are really the same drivers as the core logic is
the same. The two chipset specific drivers configure some registers
that are outside the irq router block which should really be part
of the chipset initialization.

Now we remove these specific drivers and make all x86 boards use
the common one.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00
Bin Meng
0a6fb5b577 x86: cougarcanyon2: Enable CPU driver and SMP support
This enables the 206ax cpu driver on Intel Cougar Canyon 2 board,
so that SMP can be supported too.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-13 09:50:57 +08:00