RNG Hardware error is reported due to incorrect entropy delay
rng self test are run to determine the correct ent_dly.
test is executed with different voltage and temperature to identify the
worst case value for ent_dly. after adding a margin value(1000),
ent_dly should be at least 12000.
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Because mxs_nand_spl driver does not support DM, to use the minimum ECC
layout, it needs to handle the CONFIG_NAND_MXS_USE_MINIMUM_ECC.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Han Xu <han.xu@nxp.com>
Currently, pinctrl drivers only get probed if pinconf is actually being
used, however on SoC-s like Armada 3720 pinctrl driver is a also the GPIO
driver.
So, if the pinctrl driver doesn't get probed GPIO-s won't get registered
and thus they cannot be used.
This is a problem on the Methode eDPU as it just uses SB pins as GPIO-s
and without them being registered networking won't work as it only has
one SFP slot and the TX disable GPIO is on the SB controller.
So, probe the pinctrl drivers using DM_FLAG_PROBE_AFTER_BIND like LED
uclass does.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Use CONFIG_VAL(DEBUG_UART_BASE) instead of CONFIG_DEBUG_UART_BASE, so
proper config value (CONFIG_DEBUG_UART_BASE or CONFIG_SPL_DEBUG_UART_BASE)
is used based on building target.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
TPL_DEBUG_UART_BASE is same as DEBUG_UART_BASE, but applies only for TPL.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Stefan Roese <sr@denx.de>
SPL_DEBUG_UART_BASE is same as DEBUG_UART_BASE, but applies only for SPL.
In some cases base address of UART is different in SPL and proper U-Boot.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
This converts the following to Kconfig:
CONFIG_MTD_CONCAT
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
STM32 programmer improvements
video: support several LTDC HW versions and fix data enable polarity
board: fix stboard error message, consider USB cable connected when boot device is USB
configs: stm32mp1: set console variable for extlinux.conf
configs: stm32mp1: add support for baudrate higher than 115200 for ST-Link
ARM: stm32mp: Fix Silicon version handling and ft_system_setup()
phy: stm32-usbphyc: Add DT phy tuning support
arm: dts: stm32mp15: alignment with v5.18
ram: Conditionally enable ASR
mach-stm32mp: psci: retain MCUDIVR, PLL3CR, PLL4CR, MSSCKSELR across suspend
configs: Use TFTP_TSIZE on DHSOM and STMicroelectronics boards
ARM: stm32: Use default CONFIG_TFTP_BLOCKSIZE on DHSOM
pinctrl: stm32: rework GPIO holes management
-----BEGIN PGP SIGNATURE-----
iQJQBAABCgA6FiEEXyrViUccKBz9c35Jysd4L3sz/6YFAmJ6U4QcHHBhdHJpY2Uu
Y2hvdGFyZEBmb3NzLnN0LmNvbQAKCRDKx3gvezP/pg4SEACFSVRcCa/7r2QXObqk
mORtlp6OrZLfCQGMugv9Oj0W+L4nanJEZEJknhasoHgm5CyTuCGEm7qxgWWBKA9j
yeCfcpToXrY4cIMgsPR4tpZ9jn4fLsHFBEvCVMEoOp/K2ZI27lfJ0/OeRlgKdg11
dTmM+J96vw7ltLHeN+yRWY1XgaGsBreqNJSO2mCGrAbbTJXSTrNZxP4wonTvKkFI
GyTIgRaQA9ggk7/IhalusEEGIF0aaaX/z7uBXqEGkCyOTacLG5rxYNGCoaPdv1Bl
fT7spZy1bAx3ABq/yJeF38Wi5jCXf55Z3cwYK0+tpJVUlAncYpJJBiyTERtR24OK
NeDTWkw4e071xPDfmUFB96eINDQ8KXBRRcK2n2b6nW43loYtqgafrx4prL8W2T/u
mB1WquNwjqdNN43iKAcyArrooOG18sJzRE3uAM6W4fjPx8DAHtYdaO3du3Mb5Kzz
YaqgVO88NDsYaQRJCnmdQ7KDFToMy5A6btj2LhnYQ/3CMhktkg2RHC0aERGgNJLs
ifVj3kvc+l8UwomvNOMjNket+AH7hbp64lbAfjAwzcgOGROKNyOslsr33qibg4lQ
SQKl15wFDHLAcP2tj9QoUFO+97FqDXWBIzoEhDDBqfpVNRx25R7NePUkkA+0dHTS
VedeNG6p2yFeW2UTAD4nYP9xWA==
=s7xn
-----END PGP SIGNATURE-----
Merge tag 'u-boot-stm32-20220510' of https://source.denx.de/u-boot/custodians/u-boot-stm
Add new STM32 MCU boards and Documentation
STM32 programmer improvements
video: support several LTDC HW versions and fix data enable polarity
board: fix stboard error message, consider USB cable connected when boot device is USB
configs: stm32mp1: set console variable for extlinux.conf
configs: stm32mp1: add support for baudrate higher than 115200 for ST-Link
ARM: stm32mp: Fix Silicon version handling and ft_system_setup()
phy: stm32-usbphyc: Add DT phy tuning support
arm: dts: stm32mp15: alignment with v5.18
ram: Conditionally enable ASR
mach-stm32mp: psci: retain MCUDIVR, PLL3CR, PLL4CR, MSSCKSELR across suspend
configs: Use TFTP_TSIZE on DHSOM and STMicroelectronics boards
ARM: stm32: Use default CONFIG_TFTP_BLOCKSIZE on DHSOM
pinctrl: stm32: rework GPIO holes management
We should only build support for misc if the appropriate SPL/TPL symbol
is defined. To ease the transition, make SPL/TPL_MISC default to MISC.
This is necessary because many drivers don't specify their dependencies
properly. These defaults can be removed once all drivers depend on the
appropriate config.
Fixes: aaba703fd0 ("spl: misc: Allow misc drivers in SPL and TPL")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
[trini: Add VPL_MISC symbol, handle like SPL/TPL_MISC]
Signed-off-by: Tom Rini <trini@konsulko.com>
Add support of phy-tuning properties for sm32-usbphyc's phy tuning
aligned with v5.15 kernel bindings.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
On some STM32 SoC's package, GPIO bank may have hole in their GPIO bank
Example:
If GPIO bank have 16 GPIO pins [0-15].
In particular SoC's package case, some GPIO bank can have less GPIO pins:
- [0-10] => 11 pins;
- [2-7] => 6 pins.
Commit dbf928dd26 ("gpio: stm32f7: Add gpio bank holes management")
proposed a first implementation by not counting GPIO "inside" hole. GPIO
are not displaying correctly using gpio or pinmux command when GPIO holes
are located at the beginning of GPIO bank.
To simplify, consider that all GPIO have 16 GPIO and use the gpio_ranges
struct to indicate if a GPIO is mapped or not. GPIO uclass offers several
GPIO functions ("input", "output", "unused", "unknown" and "func"), use
"unknown" GPIO function to indicate that a GPIO is not mapped.
stm32_offset_to_index() is no more needed and removed.
This must be reflected using the "gpio" command to indicate to user
that a particular GPIO is not mapped (marked as "unknown") as shown below:
Example for a 16 pins GPIO bank with the [2-7] mapping (only 6 pins
mapped):
GPIOI0 : unknown
GPIOI1 : unknown
GPIOI2 : analog
GPIOI3 : analog
GPIOI4 : alt function 0 push-pull pull-down
GPIOI5 : alt function 0 push-pull pull-down
GPIOI6 : alt function 0 push-pull pull-down
GPIOI7 : analog
GPIOI8 : unknown
GPIOI9 : unknown
GPIOI10 : unknown
GPIOI11 : unknown
GPIOI12 : unknown
GPIOI13 : unknown
GPIOI14 : unknown
GPIOI15 : unknown
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
GPIOF_UNKNOWN becomes a valid pin muxing information to indicate
that a pin is not mapped.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
pinmux_mode[] is linked to gpio_function[] defined in gpio-uclass.c
So reuse the same gpio_func_t enum value
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Enable DRAM ASR, auto self-refresh, conditionally, based on DT PWRCTL
register bits. While ASR does save considerable amount of power at
runtime automatically, it also causes LTDC underruns on large panels.
Let user select whether or not ASR is required or not, generally ASR
should be enabled on portable and battery operated devices.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Wrong DISPLAY_FLAGS used to set the data enable polarity.
Signed-off-by: Yannick FERTRE <yannick.fertre@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
atsha204 chip is predecessor of atsha204a chip. Current U-Boot driver
atsha204a-i2c.c can use both atsha204 and atsha204a chips because it does
not call specific functions to just one of these chips.
So just add compatible string for atsha204.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
The TPS65219 I2S PMIC features 3 Buck converters and 4 linear regulators,
2 GPOs, 1 GPIO, and 3 multi-function-pin.
This adds the driver for the Buck converters & linear regulators.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The TPS65219 I2S PMIC features 3 Buck converters and 4 linear regulators,
2 GPOs, 1 GPIO, and 3 multi-function-pin.
This adds the PMIC driver, loading the regulator sub-nodes.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Since commit 16cc5ad0b4 ("power: regulator: add dummy helper")
regulator dummy helper are always available even if DM_REGULATOR
is not set.
DM_REGULATOR flag is no more needed to protect no DM core,
remove it.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
MAX6370 watchdog is available e.g. on Freescale P1/P2 RDB-PC boards.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
drivers/misc/fs_loader.c: In function ‘mount_ubifs’:
drivers/misc/fs_loader.c:46:12: warning: implicit declaration of function ‘ubi_part’ [-Wimplicit-function-declaration]
int ret = ubi_part(mtdpart, NULL);
^~~~~~~~
drivers/misc/fs_loader.c:53:9: warning: implicit declaration of function ‘cmd_ubifs_mount’ [-Wimplicit-function-declaration]
return cmd_ubifs_mount(ubivol);
^~~~~~~~~~~~~~~
drivers/misc/fs_loader.c: In function ‘umount_ubifs’:
drivers/misc/fs_loader.c:58:9: warning: implicit declaration of function ‘cmd_ubifs_umount’ [-Wimplicit-function-declaration]
return cmd_ubifs_umount();
^~~~~~~~~~~~~~~~
Signed-off-by: Pali Rohár <pali@kernel.org>
In case the ops is not implemented, return 0 in the core right away.
This is better than having multiple copies of functions which just
return 0 in each reset driver. Drop all those empty functions.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Local variable out.name lives on the stack and therefore cannot
be returned directly. Move the strdup() call into the function.
(Coverity 352460)
Fixes: 7c33f78983 ("clk: scmi: register scmi clocks with CCF")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
tm_mon has a range from 0..11, but the RTC expects 1..12. So we adapt
the month accordingly. This was determined when comparing the driver
with the corresponding linux kernel driver.
Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Reviewed-by: Heiko Schocher <hs@denx.de>
There are many pins in an SoC, and register usage may vary by pins.
This patch introduces a concept of "io type" and "io type group"
to mediatek pinctrl drivers. This can provide different pinconf
handlers implementation (eg: "bias-pull-up/down", "driving" and
"input-enable") for IO pins that belong to different types.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Pinctrl design of some mediatek SoC need to access registers that
distribute in multiple memory base address. this patch introduce new
mechanism in mediatek pinctrl driver to support the chips which have
the new design.
This patch add a member 'base_calc' in pinctrl private data, and changed
original 'base' private data to an array of *iomem.
When 'base_calc' attribute is set, it will requests multiplue regs base
from the DT, if 'base_calc' attribute is not set, it only use legacy way
to request single reg resource from the DT.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
There are many pins in a SoCs, and different pin may belong
to different "io_type", For example: some pins of MT7622 belongs
to "io_type A", the other belongs to "io_type B", and pinctrl "V0"
means handle pinconf via "io_type A" or "io_type B", so SoCs that
contain "io_type A" and "io_type B" pins, use "V0" in pinctrl driver.
This patch separates the implementation of register operations
(e.g: "bias-pull-up/down", "driving" and "input-enable") into
different functions, and lets the original V0/V1
ops to call the new functions.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Add clock controller driver for NPCM750
Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Signed-off-by: Stanley Chu <yschu@nuvoton.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
* Test
Unit test for 'bootmenu' command
* UEFI
Preparatory patches for implementing a UEFI boot options based menu
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEbcT5xx8ppvoGt20zxIHbvCwFGsQFAmJyoMcACgkQxIHbvCwF
GsTbjA/+J+mQg5Rl8AkWwxnBynshNbOsQjsekJjoQTKN9XdvA4Rest2cP7AZ7LP7
yi2jks4qMKex5NyGSt2wV51snwZJ6ikZshYpEl59wzoOa4DNlBktH/emOVPNhHqm
n+By+m1Uer7I1NBATfGLjgp7Pwk910OkX9sXdFBtg3OlQwBnoCgNARmxxz7ifWwa
BxZP2w7l8BfejeZyS/HBzvUc8tPHljukidZoXANXJ/wbJmiU1JR+MBU4+iJmAwCi
rt4loje8ynIiPd0NsfDdasqsNGXNtKf1ikY9xH7UBmv8lmkM1BLE+SSufb+8ihUV
5/hn4Q/nXze4klNM/owkglfsiBzs1tGIh1EBmuD9BBjBKKTHMUqSCU1f30cqc+oh
80heH8J6GicqlQlaN5WyYbimH7WvGz48dr8VrWM5AuFf8FjZlNfIlkt86h4yQBjc
v6aTvNOXyLriFUh1p9DaQi1+U2ZdB2UO7wpEuWdVbgTE/yH9ZqmBNCB8kGTH1TPk
pOwMDZPIFTvHp3WirztpxZRcPus/Eo7s1noMGzM/gdQjmIMRlkEbP8T617hoXWdZ
/T4xwRyArQFCkx5xhd5nNqpLd3Lgq4ezpw5ZFAmULJZaGYpp6Iaf+IWiTYghrZ2/
z5cfeQZVL7Sb7vb/yajtVdaZzKg8Eq1FeZdDnoBayvL9UdFTBWA=
=bl7A
-----END PGP SIGNATURE-----
Merge tag 'efi-2022-07-rc2-2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-07-rc2-2
* Test
Unit test for 'bootmenu' command
* UEFI
Preparatory patches for implementing a UEFI boot options based menu
Macro MVNETA_GMAC_FORCE_LINK_UP can be dropped from value assignment in
fixed link case, since it's value is written into the register later in
the function for link-down-to-link-up case. The value is written as
MVNETA_GMAC_FORCE_LINK_DOWN | MVNETA_GMAC_FORCE_LINK_PASS, and so the
macro definition can also be dropped.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Guard the code handling the fixed PHY case by
CONFIG_IS_ENABLED(PHY_FIXED).
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Since this member is checked only at two places drop it and inline it's
usage.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Write PHY address just before enabling HW polling of the PHY.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Stop parsing fixed-link in the MAC driver. Instead support only PHY mode
and let the fixed PHY driver handle the fixed-link case.
Enable CONFIG_PHY_FIXED for mvneta boards that need it: Turris Omnia and
ESPRESSObin.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
The CONFIG_* macros are reserved for Kconfig. This was probably done
when this driver was being imported from Linux. Rename the macro.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Drop checking for CONFIG_PHYLIB in mvneta, this is already done in
Kconfig.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Drop unnecessary space in mvneta_adjust_link().
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
