Commit graph

32351 commits

Author SHA1 Message Date
Max Krummenacher
7a3e70cfd8 fs/fs.c: read up to EOF when len would read past EOF
http://lists.denx.de/pipermail/u-boot/2012-September/134347.html
allows for reading files in chunks from the shell.

When this feature is used to read past the end of a file an error
was returned instead of returning the bytes read up to the end of
file. Thus the following fails in the shell:

offset = 0
len = chunksize
do
	read file, offset, len
	write data
until bytes_read < len

The patch changes the behaviour to printing an informational
message and returning the actual read number of bytes aka read(2)
behaviour for convenient use in U-Boot scripts.

Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2015-08-13 07:19:35 -04:00
Vitaly Andrianov
f06b454b1c configs: ti_armv7_keystone2: increase size reserved for initrd
9MB reserved for initrd is not enough for default ramfs used for keystone
devices, which is ~33MB. This patch increases the size up to 80MB.

Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
2015-08-13 07:19:35 -04:00
Vitaly Andrianov
1ee5dea34e configs: ti_armv7_keystone2: fix initrd address at args_ramfs
This patch set the correct initrd address to much rdaddr, which used at
get_fs_ramfs commad.

Fixes: 3e97f0b63c8e ("configs: ti_armv7_keystone2: switch addresses
to generic addresses")

Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
2015-08-13 07:19:34 -04:00
Marcel Ziswiler
3b96b90966 common/lcd_console: fix console/logo regression
The following commit changed the order of the column vs. row parameter
to the lcd_init_console() function but missed actually changing it as
well the second time it is called from lcd_clear() which resulted in a
garbled text console which this patch fixes.

commit 604c7d4a5a
common/lcd_console: introduce display/framebuffer rotation

Tested on Colibri T20 with my latest assortment of tegra
fixes/enhancements patch set.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-13 07:19:34 -04:00
Nikita Kiryanov
181bd9dc61 kconfig: add config option for shell prompt
Add option to set shell prompt string from menuconfig and migrate
boards globally.

The migration is done as follows:
- Boards that explicitly and unconditionally set CONFIG_SYS_PROMPT had the
  entry moved to their defconfig files.
- Boards that defined some kind of #ifdef logic which selects the
  CONFIG_SYS_PROMPT (for example qemu-mips) got an #undef CONFIG_SYS_PROMPT
  right before the #ifdef logic and were left alone.
- This change forces CONFIG_SYS_PROMPT to be a per board decision, and thus
  CONFIG_SYS_PROMPT was removed from all <soc>_common.h and <arch>_common.h
  files. This results in a streamlined default value across platforms, and
  includes the following files: spear-common, sunxi-common, mv-common,
  ti_armv7_common, tegra-common, at91-sama5_common, and zynq-common.
- Boards that relied on <arch/soc>_common.h values of CONFIG_SYS_PROMPT were
  not updated in their respective defconfig files under the assumption that
  since they did not explicitly define a value, they're fine with whatever
  the default is.
- On the other hand, boards that relied on a value defined in some
  <boards>_common.h file such as woodburn_common, rpi-common,
  bur_am335x_common, ls2085a_common, siemens_am33x_common, and
  omap3_evm_common, had their values moved to the respective defconfig files.
- The define V_PROMPT was removed, since it is not used anywhere except for
  assigning a value for CONFIG_SYS_PROMPT.

Cc: Tom Rini <trini@konsulko.com>
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
[trini: Add spring, sniper, smartweb to conversion]
Signed-off-by: Tom Rini <trini@konsulko.com>
2015-08-13 07:19:33 -04:00
Yoshinori Sato
6f67b69b15 mmc_spi: Big-endian support
Currently implement always swap for big-endian value.
So doesn't work big-endian environment.

Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
2015-08-13 11:24:26 +03:00
Simon Glass
760177dff4 dw_mmc: Calculate dwmmc FIFO threshold size if not provided
We can calculate this. Add code to do this if it is not provided.

panto: prefix changed to dw_mmc to make things easier to grep

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
2015-08-13 11:24:26 +03:00
Masahiro Yamada
589907e2c1 ARM: drop "optional" from target select in favor of ARCH_VERSATILE
Since commit a26cd04920 ("arch: Make board selection choices
optional"), Kconfig could create such an insane .config file that
no SoC/board is selected.

This is now a real problem for Buildroot, for example.
(http://lists.busybox.net/pipermail/buildroot/2015-July/135125.html)

This commit drops the "optional" from the ARM target select menu
in favor of "Versatile family".

Rationale:
 - Historically, Linux chose versatile_defconfig as the default
   of ARM defconfig. (arch/arm/Makefile of Linux describes:
   KBUILD_DEFCONFIG := versatile_defconfig)

 - It was published by ARM Ltd.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-08-12 20:48:08 -04:00
Tom Rini
57cd681b68 dra7xx: Add dra72_evm_defconfig using CONFIG_DM
- Import various DT files for DRA7 / DR72x / dra72-evm from Linux Kernel
  v4.1
- Add config file for this board, enable DM and DM_GPIO

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-08-12 20:48:08 -04:00
Tom Rini
b4c4fec300 dra7xx: Move CONS_INDEX to Kconfig and enable CONFIG_SPL_STACK_ADDR
- Move the CONS_INDEX selection out of CONFIG_SYS_EXTRA_OPTIONS and
  into Kconfig proper.
- While in here, enable CONFIG_SPL_STACK_ADDR

Signed-off-by: Tom Rini <trini@konsulko.com>
2015-08-12 20:48:07 -04:00
Tom Rini
b5d92ba1ad ARM: SPL: Use CONFIG_SPL_DM not CONFIG_DM
We now have the CONFIG_SPL_DM for code within SPL to toggle caring about
DM or not.  Without this change platforms that do enable CONFIG_DM but
not CONFIG_SPL_DM may be broken (such as OMAP5).

Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Signed-off-by: Tom Rini <trini@konsulko.com>
2015-08-12 20:48:07 -04:00
Tom Rini
0a9e34056f gpio: omap: Drop 'method' parameter
The "method" parameter was part of the original port of the driver from
the kernel.  At some point this may have been added to allow for future
differentiation (as omap1 and omap2 have different GPIO IP blocks, so
this wasn't an unreasonable thing to do).  At this point however it's
just extra overhead, so drop.

Signed-off-by: Tom Rini <trini@konsulko.com>
2015-08-12 20:48:06 -04:00
Tom Rini
1480fdf8a6 am33xx: Update DT files, add am335x_gp_evm_config target
- Re-sync DT files for am33xx with Linux Kernel v4.1
- Include DT file now for the "AM335x GP EVM" and build target for it,
  via device tree and DM.
- We only need to provide platform data for UART when OF_CONTROL isn't
  also enabled really.  We can just push GPIO to coming from DT

Signed-off-by: Tom Rini <trini@konsulko.com>
2015-08-12 20:48:06 -04:00
Nikita Kiryanov
8883ddafde arm: am437x: Introduce new board cm-t43
Add initial support for CM-T43, an AM437x based SoM.
This support includes: serial, MMC/eMMC, NAND, USB, ETH, I2C, GPIO, DRAM
detection.

Cc: Tom Rini <trini@konsulko.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
2015-08-12 20:48:05 -04:00
Nikita Kiryanov
4eaf126e06 gpio: am43xx: expand gpio support
AM43XX SoCs support up to 192 GPIO signals.
Make this amount available to the driver.

Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
2015-08-12 20:48:04 -04:00
Nikita Kiryanov
9fbdca6056 mmc: omap_hsmmc: enable 8bit interface for eMMC for AM43xx
Enable 8bit interface on HSMMC2 for am43xx to support 8bit eMMC chips.

Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
2015-08-12 20:48:04 -04:00
Nikita Kiryanov
dce55b934d mmc: omap_hsmmc: enable proper CMD(DAT) lines reset procedure for am43xx
The CMD(DAT) lines reset procedure described in the OMAP4(AM335x,
OMAP5, DRA7xx) TRMs is also necessary for AM43XX. Enable it in the
driver.

Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
2015-08-12 20:48:04 -04:00
Nikita Kiryanov
6ff31a7f70 arm: am43xx: enable spi clock
Add spi clock to the list of am43xx basic clocks to make the SPI
subsystem available on am43xx systems.

Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2015-08-12 20:48:03 -04:00
Nikita Kiryanov
2ff97625cb spi: omap3_spi: add am43xx support to omap3_spi
Add support for AM43XX to the omap3_spi driver.

Cc: Jagan Teki <jteki@openedev.com>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2015-08-12 20:48:02 -04:00
Peter Griffin
f9a9fc6f53 ARM64: hikey: Add a README for this board.
To help others with compiling and flashing ATF and u-boot add
a README for this board.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
2015-08-12 20:48:02 -04:00
Peter Griffin
11ac236320 ARM64: hikey: hi6220: Add u-boot support for the 96boards CE HiKey board.
HiKey is the first 96boards consumer edition compliant board. It features a hi6220
SoC which has eight ARM A53 cpu's.

This initial port adds support for: -
1) Serial
2) eMMC / SD card
3) USB
4) GPIO

It has been tested with Arm Trusted Firmware running u-boot as the BL33 executable.

Notes:

eMMC has been tested with basic reading of eMMC partition into DDR. I have not
tested writing / erasing. Due to lack of clock control it won't be
running in the most performant high speed mode.

SD card slot has been tested for reading and booting kernels into DDR.
It is also currently configured to save the u-boot environment to the
SD card.

USB has been tested with ASIX networking adapter to tftpboot kernels
into DDR. On v2015.07-rc2 dhcp now works, and also USB mass storage
are correctly enumerated.

GPIO has been tested using gpio toggle GPIO4_1-3 to flash the LEDs.

Basic SoC datasheet can be found here: -
https://github.com/96boards/documentation/blob/master/hikey/
Hi6220V100_Multi-Mode_Application_Processor_Function_Description.pdf

Board schematic can be found here: -
https://github.com/96boards/documentation/blob/master/hikey/
96Boards-Hikey-Rev-A1.pdf

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
2015-08-12 20:48:01 -04:00
Peter Griffin
447da58b57 mmc: hi6220_dw_mmc: Add hi6220 glue code for dw_mmc controller.
This patch adds the glue code for hi6220 SoC which has 2x synopsis
dw_mmc controllers. This will be used by the hikey board support
in subsequent patches.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-08-12 20:48:01 -04:00
Peter Griffin
242b2f0c7a pmic: pmic_hi6553: Add a driver for the hi6553 pmic found on hikey board.
This adds a simple pmic driver for the hi6553 pmic which is used in
conjunction with the hi6220 SoC on the hikey board. Eventually this
driver will be updated to be a proper UCLASS PMIC driver which
can parse the voltages direct from device tree.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
2015-08-12 20:48:00 -04:00
Peter Griffin
8a954eb695 hisilicon: hi6220: Add a hi6220 pinmux driver.
This patch adds basic pinmux support for the hi6220 SoC,
which is found on the hikey board.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
2015-08-12 20:48:00 -04:00
Peter Griffin
8293009baa ARM: hi6220: Add register and bitfield definition header files.
This patch adds the header files which will be used in the subsquent
board / drivers to enable support for hi6220 hikey board.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
2015-08-12 20:47:59 -04:00
Peter Griffin
152f489841 dm: gpio: hi6220: Add a hi6220 GPIO driver model driver.
This patch adds support for the GPIO perif found on hi6220
SoC.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
2015-08-12 20:47:58 -04:00
Gong Qianyu
210fbee901 common/cmd_source.c: Fix the source command failure under 64-bit platform
Modify the data pointer type from ulong* to u32*.

For arm64 type "ulong" could be 64-bit. Then in line 89 of common/cmd_source.c:
"while (*data++);" data will point to the next 64 bits each time. As the uImage
file generated by mkimage tool keeps the same data format in either 32-bit or 64-bit
platform, the difference would cause failure in 64-bit platform.

Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
2015-08-12 20:47:56 -04:00
Gong Qianyu
7ef4c45c6e spl: Fix compile warning for arm64
Make the cast explicit for "warning: cast to pointer from integer of different size".

Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
2015-08-12 20:47:56 -04:00
Måns Rullgård
e86c953059 imx28: Fix issue with GCC 5.x
The semantics for non-static functions declared inline have changed in
gcc5, causing the empty functions not to be emitted as an external
symbol.

Since lowlevel_init() is only referenced from start.S, it should not be
declared inline at all.

Reported-by: Otavio Salvador <otavio@ossystems.com.br>
Tested-by: Otavio Salvador <otavio@ossystems.com.br>
[trini: Reword commit message]
Signed-off-by: Tom Rini <trini@konsulko.com>
2015-08-12 20:47:55 -04:00
Lokesh Vutla
fe772ebd28 ARM: keystone2: Use common definition for clk_get_rate
Since all the clocks are defined common, and has the same logic to get
the frequencies, use a common definition for for clk_get_rate().

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-08-12 20:47:55 -04:00
Lokesh Vutla
7531122e5c ARM: keystone2: Remove unsed external clocks
Remove unused external clocks and make a common definition
for all keystone platforms.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-08-12 20:47:54 -04:00
Lokesh Vutla
94069301ba ARM: keystone2: Cleanup init_pll definition
This is just a cosmetic change that makes
the calling of pll init code looks much cleaner.

Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-08-12 20:47:53 -04:00
Lokesh Vutla
74af583e9f ARM: keystone2: Use common structure for PLLs
Register Base addresses are same for PLLs in all
keystone platforms. If a PLL is not available, the corresponding
register addresses are marked as reserved.
Hence use a common definition.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-08-12 20:47:53 -04:00
Lokesh Vutla
7b50e1599f ARM: keystone2: Fix dev and arm speed detection
Use common devspeed and armspeed definitions.
Also fix reading efuse bootrom register.

Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-08-12 20:47:52 -04:00
Lokesh Vutla
c321a23624 ARM: keystone2: Cleanup PLL init code
There are two types of PLL for all keystone platforms:
Main PLL, Secondary PLL. Instead of duplicating the same definition
for each secondary PLL, have a common function which does
initialization for both PLLs. And also add proper register
definitions.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-08-12 20:47:52 -04:00
Lokesh Vutla
aeabe652bb ARM: keystone2: Enable CONFIG_DISPLAY_CPUINFO
Add print_cpuinfo() function and enable
CONFIG_DISPLAY_CPUINFO for keystone platforms,
so that cpu info can be displayed during boot.

Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-08-12 20:47:51 -04:00
Lokesh Vutla
cfe5f0cda0 ARM: keystone2: Cleanup SoC detection
Add proper register definition for JTAG ID and
cleanup cpu_is_* functions.

Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-08-12 20:47:51 -04:00
Nishanth Menon
095a5ef88e ARM: DRA72: disable workaround for 801819
DRA72x processor variants are single core and it does not export ACP[1].
Hence, we have no source for generating an external snoop requests which
appear to be key to the deadlock in DRA72x design.

Since we build the same image for DRA74x and DRA72x platforms, lets
runtime detect and disable the workaround (in favor of performance) on
DRA72x platforms.

[1] http://infocenter.arm.com/help/topic/com.arm.doc.ddi0438i/BABIAJAG.html

Suggested-by: Richard Woodruff <r-woodruff2@ti.com>
Suggested-by: Brad Griffis <bgriffis@ti.com>
Reviewed-by: Brad Griffis <bgriffis@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
2015-08-12 20:47:50 -04:00
Nishanth Menon
1bbb556a6a ARM: DRA7/ OMAP5: implement Auxiliary Control Register configuration
Implement logic for ACR(Auxiliary Control Register) configuration using
ROM Code smc service.

Suggested-by: Richard Woodruff <r-woodruff2@ti.com>
Suggested-by: Brad Griffis <bgriffis@ti.com>
Reviewed-by: Brad Griffis <bgriffis@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
2015-08-12 20:47:50 -04:00
Nishanth Menon
a615d0be6a ARM: Introduce erratum workaround for 801819
Add workaround for Cortex-A15 ARM erratum 801819 which says in summary
that "A livelock can occur in the L2 cache arbitration that might
prevent a snoop from completing. Under certain conditions this can
cause the system to deadlock. "

Recommended workaround is as follows:
Do both of the following:

1) Do not use the write-back no-allocate memory type.
2) Do not issue write-back cacheable stores at any time when the cache
is disabled (SCTLR.C=0) and the MMU is enabled (SCTLR.M=1). Because it
is implementation defined whether cacheable stores update the cache when
the cache is disabled it is not expected that any portable code will
execute cacheable stores when the cache is disabled.

For implementations of Cortex-A15 configured without the “L2 arbitration
register slice” option (typically one or two core systems), you must
also do the following:

3) Disable write-streaming in each CPU by setting ACTLR[28:25] = 0b1111

So, we provide an option to disable write streaming on OMAP5 and DRA7.
It is a rare condition to occur and may be enabled selectively based
on platform acceptance of risk.

Applies to: A15 revisions r2p0, r2p1, r2p2, r2p3 or r2p4 and REVIDR[3]
is set to 0.

Note: certain unicore SoCs *might* not have REVIDR[3] not set, but
might not meet the condition for the erratum to occur when they donot
have ACP (Accelerator Coherency Port) hooked to ACE (AXI Coherency
Extensions). Such SoCs will need the work around handled in the SoC
specific manner, since there is no ARM generic manner to detect such
configurations.

Based on ARM errata Document revision 18.0 (22 Nov 2013)

Suggested-by: Richard Woodruff <r-woodruff2@ti.com>
Suggested-by: Brad Griffis <bgriffis@ti.com>
Reviewed-by: Brad Griffis <bgriffis@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
2015-08-12 20:47:49 -04:00
Linus Walleij
3f394e70f0 integrator: switch to DM serial port
This switches the Integrator boards over to using the device model
for its serial ports.

Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-08-12 20:47:49 -04:00
Wu, Josh
e0266f4942 usb: ohci: enable cache support
Remove the CONFIG_DM_USB limitation to enable cache support functions.
Tested on SAMA5D3x-EK board.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
2015-08-12 20:47:48 -04:00
Wu, Josh
633b6ccedf ARM: cache: implement a default weak flush_cache() function
Current many cpu use the same flush_cache() function, which just call
the flush_dcache_range().
So implement a weak flush_cache() for all the cpus to use.

In original weak flush_cache() in arch/arm/lib/cache.c, there has some
code for ARM1136 & ARM926ejs. But in the arch/arm/cpu/arm1136/cpu.c and
arch/arm/cpu/arm926ejs/cache.c, there implements a real flush_cache()
function as well. That means the original code for ARM1136 & ARM926ejs
in weak flush_cache() of arch/arm/lib/cache.c is totally useless.

So in this patch remove such code in flush_cache() and only call
flush_dcache_range().

Signed-off-by: Josh Wu <josh.wu@atmel.com>
2015-08-12 20:47:48 -04:00
Wu, Josh
387871a10e ARM: cache: add an empty stub function for invalidate/flush dcache
Since some driver like ohci, lcd used dcache functions. But some ARM
cpu don't implement the invalidate_dcache_range()/flush_dcache_range()
functions.

To avoid compiling errors this patch adds an weak empty stub function
for all ARM cpu in arch/arm/lib/cache.c.
And ARM cpu still can implemnt its own cache functions on the cpu folder.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-08-12 20:47:47 -04:00
Wu, Josh
4dbe4b168b m68k: cache: add an empty stub functions for invalidate/flush dcache
Since some driver like ohci, lcd used dcache functions. But m68k don't
implement the invalidate_dcache_range()/flush_dcache_range() functions.

To avoid compiling errors this patch adds an weak empty stub function
for all m68k cpu.

Also each cpu can implement its own implementation. If not implemented
then by default is using an empty function.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Angelo Dureghello <angelo@sysam.it>
2015-08-12 20:47:46 -04:00
Ruchika Gupta
057c220055 Correct License and Copyright information on few files
gpio.h - Added missing copyright in few files.
rsa-mod-exp.h - Corrected copyright in the file.
fsl_sec.h - Added missing license in files
drivers/crypto/fsl/Makefile - Removed the incomplete GPLv2 license and replaced it with GPLv2+ license

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
2015-08-12 20:47:46 -04:00
Stefano Babic
55f1b39f73 ti: drop value from CONFIG_SYS_NAND_BUSWIDTH_16BIT
Signed-off-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-08-12 20:47:45 -04:00
Stefano Babic
01d10aa1e1 mcx: add Ethernet over USB
Signed-off-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-08-12 20:47:45 -04:00
Stefano Babic
62321e2f08 omap3: fix NAND support for mcx board
mcx was not updated according to changes in
NAND driver.

Signed-off-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-08-12 20:47:45 -04:00
Masahiro Yamada
0b11dbf705 drivers: hierarchize drivers Kconfig menu
The menuconfig for drivers are getting more and more cluttered
and unreadable because too many entries are displayed in a single
flat menu.  Use hierarchic menu for each category.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Update to apply again in a few places, drop USB hunk]
Signed-off-by: Tom Rini <trini@konsulko.com>
2015-08-12 20:47:44 -04:00