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pmic: pmic_hi6553: Add a driver for the hi6553 pmic found on hikey board.
This adds a simple pmic driver for the hi6553 pmic which is used in conjunction with the hi6220 SoC on the hikey board. Eventually this driver will be updated to be a proper UCLASS PMIC driver which can parse the voltages direct from device tree. Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
This commit is contained in:
Peter Griffin
Tom Rini
parent
8a954eb695
commit
242b2f0c7a
3 changed files with 213 additions and 0 deletions
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@ -23,3 +23,4 @@ obj-$(CONFIG_POWER_TPS65217) += pmic_tps65217.o
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obj-$(CONFIG_POWER_TPS65218) += pmic_tps62362.o
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obj-$(CONFIG_POWER_TPS65218) += pmic_tps65218.o
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obj-$(CONFIG_POWER_TPS65910) += pmic_tps65910.o
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obj-$(CONFIG_POWER_HI6553) += pmic_hi6553.o
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133
drivers/power/pmic/pmic_hi6553.c
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133
drivers/power/pmic/pmic_hi6553.c
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/*
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* Copyright (C) 2015 Linaro
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* Peter Griffin <peter.griffin@linaro.org>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <asm/io.h>
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#include <common.h>
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#include <power/pmic.h>
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#include <power/max8997_muic.h>
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#include <power/hi6553_pmic.h>
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#include <errno.h>
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u8 *pmussi_base;
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uint8_t hi6553_readb(u32 offset)
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{
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return readb(pmussi_base + (offset << 2));
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}
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void hi6553_writeb(u32 offset, uint8_t value)
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{
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writeb(value, pmussi_base + (offset << 2));
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}
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int pmic_reg_write(struct pmic *p, u32 reg, u32 val)
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{
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if (check_reg(p, reg))
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return -1;
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hi6553_writeb(reg, (uint8_t)val);
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return 0;
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}
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int pmic_reg_read(struct pmic *p, u32 reg, u32 *val)
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{
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if (check_reg(p, reg))
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return -1;
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*val = (u32)hi6553_readb(reg);
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return 0;
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}
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static void hi6553_init(void)
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{
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int data;
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hi6553_writeb(HI6553_PERI_EN_MARK, 0x1e);
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hi6553_writeb(HI6553_NP_REG_ADJ1, 0);
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data = HI6553_DISABLE6_XO_CLK_CONN | HI6553_DISABLE6_XO_CLK_NFC |
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HI6553_DISABLE6_XO_CLK_RF1 | HI6553_DISABLE6_XO_CLK_RF2;
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hi6553_writeb(HI6553_DISABLE6_XO_CLK, data);
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/* configure BUCK0 & BUCK1 */
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hi6553_writeb(HI6553_BUCK01_CTRL2, 0x5e);
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hi6553_writeb(HI6553_BUCK0_CTRL7, 0x10);
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hi6553_writeb(HI6553_BUCK1_CTRL7, 0x10);
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hi6553_writeb(HI6553_BUCK0_CTRL5, 0x1e);
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hi6553_writeb(HI6553_BUCK1_CTRL5, 0x1e);
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hi6553_writeb(HI6553_BUCK0_CTRL1, 0xfc);
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hi6553_writeb(HI6553_BUCK1_CTRL1, 0xfc);
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/* configure BUCK2 */
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hi6553_writeb(HI6553_BUCK2_REG1, 0x4f);
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hi6553_writeb(HI6553_BUCK2_REG5, 0x99);
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hi6553_writeb(HI6553_BUCK2_REG6, 0x45);
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mdelay(1);
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hi6553_writeb(HI6553_VSET_BUCK2_ADJ, 0x22);
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mdelay(1);
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/* configure BUCK3 */
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hi6553_writeb(HI6553_BUCK3_REG3, 0x02);
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hi6553_writeb(HI6553_BUCK3_REG5, 0x99);
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hi6553_writeb(HI6553_BUCK3_REG6, 0x41);
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hi6553_writeb(HI6553_VSET_BUCK3_ADJ, 0x02);
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mdelay(1);
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/* configure BUCK4 */
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hi6553_writeb(HI6553_BUCK4_REG2, 0x9a);
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hi6553_writeb(HI6553_BUCK4_REG5, 0x99);
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hi6553_writeb(HI6553_BUCK4_REG6, 0x45);
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/* configure LDO20 */
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hi6553_writeb(HI6553_LDO20_REG_ADJ, 0x50);
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hi6553_writeb(HI6553_NP_REG_CHG, 0x0f);
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hi6553_writeb(HI6553_CLK_TOP0, 0x06);
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hi6553_writeb(HI6553_CLK_TOP3, 0xc0);
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hi6553_writeb(HI6553_CLK_TOP4, 0x00);
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/* configure LDO7 & LDO10 for SD slot */
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data = hi6553_readb(HI6553_LDO7_REG_ADJ);
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data = (data & 0xf8) | 0x2;
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hi6553_writeb(HI6553_LDO7_REG_ADJ, data);
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mdelay(5);
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/* enable LDO7 */
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hi6553_writeb(HI6553_ENABLE2_LDO1_8, 1 << 6);
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mdelay(5);
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data = hi6553_readb(HI6553_LDO10_REG_ADJ);
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data = (data & 0xf8) | 0x5;
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hi6553_writeb(HI6553_LDO10_REG_ADJ, data);
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mdelay(5);
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/* enable LDO10 */
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hi6553_writeb(HI6553_ENABLE3_LDO9_16, 1 << 1);
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mdelay(5);
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/* select 32.764KHz */
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hi6553_writeb(HI6553_CLK19M2_600_586_EN, 0x01);
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}
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int power_hi6553_init(u8 *base)
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{
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static const char name[] = "HI6553 PMIC";
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struct pmic *p = pmic_alloc();
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if (!p) {
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printf("%s: POWER allocation error!\n", __func__);
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return -ENOMEM;
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}
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p->name = name;
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p->interface = PMIC_NONE;
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p->number_of_regs = 44;
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pmussi_base = base;
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hi6553_init();
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puts("HI6553 PMIC init\n");
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return 0;
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}
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79
include/power/hi6553_pmic.h
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79
include/power/hi6553_pmic.h
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@ -0,0 +1,79 @@
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/*
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* (C) Copyright 2015 Linaro
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* Peter Griffin <peter.griffin@linaro.org>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __HI6553_PMIC_H__
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#define __HI6553_PMIC_H__
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/* Registers */
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enum {
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HI6553_VERSION_REG = 0x000,
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HI6553_ENABLE2_LDO1_8 = 0x029,
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HI6553_DISABLE2_LDO1_8,
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HI6553_ONOFF_STATUS2_LDO1_8,
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HI6553_ENABLE3_LDO9_16,
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HI6553_DISABLE3_LDO9_16,
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HI6553_ONOFF_STATUS3_LDO9_16,
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HI6553_DISABLE6_XO_CLK = 0x036,
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HI6553_PERI_EN_MARK = 0x040,
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HI6553_BUCK2_REG1 = 0x04a,
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HI6553_BUCK2_REG5 = 0x04e,
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HI6553_BUCK2_REG6,
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HI6553_BUCK3_REG3 = 0x054,
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HI6553_BUCK3_REG5 = 0x056,
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HI6553_BUCK3_REG6,
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HI6553_BUCK4_REG2 = 0x05b,
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HI6553_BUCK4_REG5 = 0x05e,
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HI6553_BUCK4_REG6,
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HI6553_CLK_TOP0 = 0x063,
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HI6553_CLK_TOP3 = 0x066,
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HI6553_CLK_TOP4,
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HI6553_VSET_BUCK2_ADJ = 0x06d,
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HI6553_VSET_BUCK3_ADJ,
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HI6553_LDO7_REG_ADJ = 0x078,
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HI6553_LDO10_REG_ADJ = 0x07b,
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HI6553_LDO19_REG_ADJ = 0x084,
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HI6553_LDO20_REG_ADJ,
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HI6553_DR_LED_CTRL = 0x098,
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HI6553_DR_OUT_CTRL,
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HI6553_DR3_ISET,
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HI6553_DR3_START_DEL,
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HI6553_DR4_ISET,
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HI6553_DR4_START_DEL,
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HI6553_DR345_TIM_CONF0 = 0x0a0,
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HI6553_NP_REG_ADJ1 = 0x0be,
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HI6553_NP_REG_CHG = 0x0c0,
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HI6553_BUCK01_CTRL2 = 0x0d9,
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HI6553_BUCK0_CTRL1 = 0x0dd,
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HI6553_BUCK0_CTRL5 = 0x0e1,
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HI6553_BUCK0_CTRL7 = 0x0e3,
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HI6553_BUCK1_CTRL1 = 0x0e8,
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HI6553_BUCK1_CTRL5 = 0x0ec,
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HI6553_BUCK1_CTRL7 = 0x0ef,
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HI6553_CLK19M2_600_586_EN = 0x0fe,
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};
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#define HI6553_DISABLE6_XO_CLK_BB (1 << 0)
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#define HI6553_DISABLE6_XO_CLK_CONN (1 << 1)
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#define HI6553_DISABLE6_XO_CLK_NFC (1 << 2)
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#define HI6553_DISABLE6_XO_CLK_RF1 (1 << 3)
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#define HI6553_DISABLE6_XO_CLK_RF2 (1 << 4)
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#define HI6553_LED_START_DELAY_TIME 0x00
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#define HI6553_LED_ELEC_VALUE 0x07
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#define HI6553_LED_LIGHT_TIME 0xf0
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#define HI6553_LED_GREEN_ENABLE (1 << 1)
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#define HI6553_LED_OUT_CTRL 0x00
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#define HI6553_PMU_V300 0x30
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#define HI6553_PMU_V310 0x31
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int power_hi6553_init(u8 *base);
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#endif /* __HI6553_PMIC_H__ */
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