Commit graph

98 commits

Author SHA1 Message Date
Simon Glass
c420ef67e5 rockchip: Add support for veyron-minnie (ASUS Chromebook Flip)
This adds support for the Asus Chromebook Flip, an RK3288-based clamshell
device which can flip into 'tablet' mode. The device tree file comes from
Linux v4.8. The SDRAM parameters are for 4GB Samsung LPDDR3.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:32 -07:00
Simon Glass
e70408c069 rockchip: Add support for veyron-mickey (Chromebit)
This adds support for the Asus Chromebit, and RK3288-based device designed
to plug directly into an HDMI monitor. The device tree file comes from
Linux v4.8.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:32 -07:00
Simon Glass
20b13e8d7e rockchip: veyron: Adjust ARM clock after relocation
Update board_init() to increase the ARM clock to the maximum speed on
veyron boards. This makes quite a large difference in performance. With
this change, speed goes from about 750 DMIPS to 2720 DMIPs.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:31 -07:00
Simon Glass
5e9b15034b rockchip: Rename jerry files to veyron
At present we have a single rk3288-based Chromebook: chromebook_jerry. But
all such Chromebooks can use the same binary with only device-tree
differences. The family name is 'veyron', so rename the files accordingly.

Also update the device-tree filename since this currently differs from
Linux.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:31 -07:00
Simon Glass
c8816d1442 rockchip: Allow jerry to use of-platdata
This board always boots from SPI, so update the code to support that with
of-platdata. The boot source is not currently available with of-platdata.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:30 -07:00
Andreas Färber
ef904bf28e arm: rockchip: Fix typo in ROCKCHIP_RK3288 help
UART,s -> UARTs, to avoid this spreading via copy&paste.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Simon Glass <sjg@chromium.org>
2016-11-25 17:59:29 -07:00
Kever Yang
4594ac0784 rk3288: kconfig: remove duplicate definition of SPL_MMC_SUPPORT
SPL_MMC_SUPPORT defined in rockchip top level Kconfig instead of
inside rk3288 and default to disable if ROCKCHIP_SPL_BACK_TO_BROM
defined.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-10-30 13:29:06 -06:00
Kever Yang
7d6c78f573 rk3288: sdram: auto-detect the capacity
Add support for rk3288 dram capacity auto detect, support DDR3 and
LPDDR3, DDR2 is not supported.
The program will automatically detect:
- channel number
- rank number
- column address number
- row address number

The dts file do not need to describe those info after apply this patch.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Simon Glass <sjg@chromium.org>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
2016-10-30 13:29:06 -06:00
Kever Yang
1b64a05072 rk3288: fix reg address for GRF_SOC_CON2
The GRF base address is missing, fix it.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2016-10-30 13:29:06 -06:00
Kever Yang
27b95d25c5 rk3399: disable the clock multiplier support when SoC init
The Clock Multiplier in rk3399 EMMC programmable clock generator
is broken, we can remove its support from SoC GRF register.

Without this patch, rk3399 emmc driver is not work after below patch
applied:
6dffdbc mmc: sdhci: Add the programmable clock mode support

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2016-10-30 13:29:06 -06:00
Simon Glass
5564ed5dd9 rockchip: rk3288: Move rockchip_get_cru() out of the driver
This function is called from outside the driver. It should be placed into
common SoC code. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2016-10-30 13:29:06 -06:00
Simon Glass
c8a6bc9683 rockchip: rk3399: Move rockchip_get_cru() out of the driver
This function is called from outside the driver. It should be placed into
common SoC code. Move it.

Also rename the driver symbol to be more consistent with the other rockchip
clock drivers.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2016-10-30 13:29:06 -06:00
Simon Glass
92ac73e4c2 rockchip: rk3036: Move rockchip_get_cru() out of the driver
This function is called from outside the driver. It should be placed into
common SoC code. Move it.

Also rename the driver symbol to be more consistent with the other rockchip
clock drivers.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2016-10-30 13:29:06 -06:00
Jacob Chen
67171e13a3 rockchip: add boot-mode support for rk3288, rk3036
rockchip platform have a protocol to pass the the kernel reboot mode to bootloader
by some special registers when system reboot. In bootloader we should read it and take action.

We can only setup boot_mode in board_late_init becasue "setenv" need env setuped.
So add CONFIG_BOARD_LATE_INIT to common header and use a entry "rk_board_late_init"
to replace "board_late_init" in board file.

Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-10-01 18:36:55 -06:00
Jacob Chen
f48f2b729b rockchip: move common function from board-file to rk3036-board.c
To keep it same with 3288

Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-10-01 18:36:55 -06:00
Jacob Chen
cd77fd1b43 rockchip: rename board.c to rk3288-board.c
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-10-01 18:36:55 -06:00
Sandy Patterson
230e0e09da Disable SPL_MMC_SUPPORT if ROCKCHIP_SPL_BACK_TO_BROM is enabled.
Default SPL_MMC_SUPPORT to false when ROCKCHIP_SPL_BACK_TO_BROM is enabled.

Acked-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Signed-off-by: Sandy Patterson <apatterson@sightlogix.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-10-01 18:35:01 -06:00
Sandy Patterson
427351dc1d rockchip: Fix SPL console output when ROCKCHIP_SPL_BACK_TO_BROM is enabled
Move back_to_bootrom() call later in SPL init so that the console is
initialized and printouts happen.

Currently when ROCKCHIP_SPL_BACK_TO_BROM is enabled there is no console
output from the SPL init stages.

I wasn't sure exactly where this should happen, so if we are set to do
run spl_board_init, then go back to bootrom there after
preloader_console_init(). Otherwise fall back to old behavior of doing
it in board_init_f.

Signed-off-by: Sandy Patterson <apatterson@sightlogix.com>
Acked-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-10-01 18:35:01 -06:00
Xu Ziyuan
2179a07c0c rockchip: rk3288: sdram: fix DDR address range
The all current Rockchip SoCs supporting 4GB of ram have problems
accessing the memory region 0xfe000000~0xff000000. Actually, some IP
controller can't address to, so let's limit the available range.

This patch fixes a bug which found in miniarm-rk3288-4GB board. The
U-Boot was relocated to 0xfef72000, and .bss variants was also
relocated, such as do_fat_read_at_block. Once eMMC controller transfer
data to do_fat_read_at_block via DMA, DMAC can't access more than
0xfe000000. So that DMAC didn't work sane.

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2016-10-01 18:35:01 -06:00
Xu Ziyuan
5a4a90f6e6 rockchip: rk3288: skip lowlevel_init process
lowlevel_init() is never needed for rk3288, so drop it.

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2016-09-22 07:57:02 -06:00
Kever Yang
aa89b554b7 rk3288: add arch_cpu_init for rk3288
We do some SoC level one time setting initialization in
arch_cpu_init.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-09-22 07:32:22 -06:00
Kever Yang
c55e30eb83 rk3399: syscon: add support for pmugrf
pmugrf is a module like grf which contain some of the iomux registers
and other registers.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-09-22 07:32:22 -06:00
Simon Glass
e00f76cee9 Convert CONFIG_SPL_SERIAL_SUPPORT to Kconfig
Move this option to Kconfig and tidy up existing uses.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-16 17:27:19 -04:00
Simon Glass
1fdf7c64ed Convert CONFIG_SPL_MMC_SUPPORT to Kconfig
Move this option to Kconfig and tidy up existing uses.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-16 17:27:13 -04:00
Simon Glass
cc4288ef42 Convert CONFIG_SPL_LIBGENERIC_SUPPORT to Kconfig
Move this option to Kconfig and tidy up existing uses.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-16 17:27:12 -04:00
Simon Glass
77d2f7f507 Convert CONFIG_SPL_LIBCOMMON_SUPPORT to Kconfig
Move this option to Kconfig and tidy up existing uses.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-16 17:27:11 -04:00
Simon Glass
d3662dff78 Convert CONFIG_SPL_DRIVERS_MISC_SUPPORT to Kconfig
Move this option to Kconfig and tidy up existing uses.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-16 17:27:08 -04:00
Max Filippov
b25732c22b drivers/sysreset: group sysreset drivers
Create drivers/sysreset and move sysreset-uclass and all sysreset
drivers there.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-08-12 09:22:17 -04:00
Xu Ziyuan
1c62d99952 rockchip: add support for rk3288 miniarm board
Miniarm is a rockchip rk3288 based development board, which has lots of
interface such as HDMI, USB, micro-SD card, Audio etc.

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-08-05 17:56:08 -06:00
Kever Yang
b0b3c86521 rk3399: add basic soc driver
This patch add driver for:
- clock driver including set_rate for cpu, mmc, vop, I2C.
- sysreset driver
- grf syscon driver

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-08-05 17:56:07 -06:00
jk.kernel@gmail.com
dd63fbc70a rockchip: add support for rk3288 PopMetal board
PopMetal is a rockchip rk3288 based board made by ChipSpark, which has
many interface such as HDMI, VGA, USB, micro-SD card, WiFi, Audio and
Gigabit Ethernet.

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-07-31 07:24:20 -06:00
jk.kernel@gmail.com
d7ca67b7cd rockchip: add basic support for fennec-rk3288 board
Fennec is a RK3288-based development board with 2 USB ports, HDMI,
micro-SD card, audio and WiFi and Gigabit Ethernet. It also includes
on-board 8GB eMMC and 2GB of SDRAM. Expansion connectors provides access
to display pins, I2C, SPI, UART and GPIOs.

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-07-31 07:24:20 -06:00
jk.kernel@gmail.com
cba6bb1b74 rockchip: rk3288: move evb board to rockchip folder
The 'evb-rk3288' is not a vendor name, change it to 'rockchip' which is
the real vendor name.

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-07-31 07:24:20 -06:00
jk.kernel@gmail.com
5051a77b2d Revert "rockchip: Move the MMC setup check earlier"
Boot Rom wouldn't initialize sdmmc while booting from eMMC. We need to
setup sdmmc gpio, otherwise we will hit an error below:

=>mmc info
blk_get_device: if_type=6, devnum=0: dwmmc@ff0c0000.blk, 6, 0
uclass_find_device_by_seq: 0 -1
uclass_find_device_by_seq: 0 0
   - -1 -1
   - -1 0
   - found
uclass_find_device_by_seq: 0 1
   - -1 -1
   - -1 0
   - not found
fdtdec_get_int_array: interrupts
get_prop_check_min_len: interrupts
Buswidth = 1, clock: 0
Buswidth = 1, clock: 400000
Sending CMD0
dwmci_send_cmd: Timeout on data busy
dwmci_send_cmd: Timeout on data busy
dwmci_send_cmd: Timeout on data busy
dwmci_send_cmd: Timeout on data busy

This reverts commit 6efeeea79c.

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2016-07-31 07:24:20 -06:00
Kever Yang
22948e1015 configs: rockchip: remove no use MACRO
The CONFIG_ROCKCHIP_COMMON and CONFIG_SPL_ROCKCHIP_COMMON are no use now,
remove them.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-07-31 07:24:20 -06:00
John Keeping
c482c60a14 rockchip: sdram: Fix register layout for Linux
The ChromeOS kernel reads the RAM settings from PMU_SYS_REG2 and expects
the bootloader to store the necessary information there.  We're using
the same register to pass the same information between the SPL and
U-Boot but in a slightly different format.

Change this to use the format expected by the Linux DMC driver so that
the system doesn't hang in Linux by misconfiguring the RAM.

This is almost the same as commit b5788dc ("rockchip: rk3288: correct
sdram setting") which was reverted in commit b525556 ("Revert "rockchip:
rk3288: correct sdram setting"") but parenthese have been added to apply
the mask correctly when reading the "bw" setting and a couple of minor
style issues have been fixed to keep check_patch.pl happy.

Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-07-25 20:46:46 -06:00
Kever Yang
a381bcf529 ARM64: rockchip: add support for rk3399 SoC based evb
RK3399 is a SoC from Rockchip with dual-core Cortex-A72
and quad-core Cortex-A53 CPU. It supports two USB3.0
type-C ports and two USB2.0 EHCI ports. Other interfaces
are very much like RK3288, the DRAM are 32bit width address
and support address from 0 to 4GB-128MB range.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-07-25 20:46:45 -06:00
Simon Glass
c3aad6f65b rockchip: Use rockchip_get_clk() to obtain the SoC clock
The current code picks the first available clock. In U-Boot proper this is
the oscillator device, not the SoC clock device. As a result the HDMI display
does not work.

Fix this by calling rockchip_get_clk() instead.

Fixes: 135aa950 (clk: convert API to match reset/mailbox style)
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
2016-07-25 20:46:45 -06:00
Simon Glass
a617c5d3e2 rockchip: Add a way to obtain the main clock device
On Rockchip SoCs we typically have a main clock device that uses the Soc
clock driver. There is also a fixed clock for the oscillator. Add a function
to obtain the core clock.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-25 20:46:45 -06:00
Heiko Stübner
b339b5dbca cosmetic: rockchip: rk3288: rename rkclk_configure_cpu
The function is very specific to the rk3288 in its arguments
referencing the rk3288 cru and grf and every other rockchip soc
has differing cru and grf registers. So make that function naming
explicit.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Simon Glass <sjg@chromium.org>
2016-07-25 20:44:20 -06:00
Heiko Stübner
041cdb5f3d cosmetic: rockchip: sort socs according to numbers
Having some sort of ordering proofed helpful in a lot of other places
already. So for a larger number of rockchip socs it might be helpful
as well instead of an ever increasing unsorted list.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Acked-by: Simon Glass <sjg@chromium.org>
2016-07-25 20:44:20 -06:00
Xu Ziyuan
266c8fad51 rockchip: rk3288: add fastboot support
Enable fastboot feature on rk3288.

This path doesn't support the fastboot flash function command entirely.
We will hit "cannot find partition" assertion without specified
partition environment. Define gpt partition layout in specified board
such as firefly-rk3288, then enjoy it!

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-07-25 20:44:19 -06:00
Andreas Färber
ad8fe6b964 rockchip: Exclude rk_timer for ARM64
It conflicts with the generic_timer.

Cc: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Simon Glass <sjg@chromium.org>
2016-07-25 20:44:19 -06:00
Andreas Färber
e0f5dbcb4b rockchip: Clean up CPU selection
In preparation for RK3368 and RK3399, which need to select ARM64, don't
select CPU_V7 at the ARCH_ROCKCHIP level but at the SoC level instead.

Cc: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Simon Glass <sjg@chromium.org>
2016-07-25 20:44:19 -06:00
Kever Yang
c418addfa9 board: move all the rockchip board in one folder
The 'evb_rk3036' and 'kylin' is not a vendor name, let's replace them
to 'rockchip' which is a real _vendor_ name, and meet the architecure
'board/<vendor>/<board-name>/'.

More boards from rockchip like evb_rk3288, evb_rk3399 will comes later.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Eddie Cai <eddie.cai.kernel@gmail.com>
2016-07-25 20:44:19 -06:00
Xu Ziyuan
744368d6ae rockchip: add basic support for evb-rk3288 board
evb-3288 board RK3288-based development board with 2 USB ports, HDMI,
VGA, micro-SD card, audio, WiFi and Gigabit Ethernet. It also includes
on-board 8G eMMC and 2GB of SDRAM. Expansion connector provide access to
display pins, I2C, SPI, UART and GPIOs. This add some basic files
required to allow the board to output serial messaged and can run
command(mmc info etc).

evb-rk3288 also supports booting from eMMC or SD card, the default is eMMC.

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-07-25 20:44:18 -06:00
Xu Ziyuan
b47ea79219 rockchip: add option to change method of loading u-boot
If we would like to boot from SD card, we have to implement mmc driver
in SPL stage, and get a slightly large SPL binary. Rockchip SoC's
bootrom code has the ability to load spl and u-boot, then boot.

If CONFIG_ROCKCHIP_SPL_BACK_TO_BROM is enabled, the spl will return to
bootrom in board_init_f(), then bootrom loads u-boot binary.

Loading sequence after rework:
bootrom ==> spl ==> bootrom ==> u-boot

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Fixed up spelling of U-Boot, boorom, opinion->option, Rochchip:
Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-25 20:44:18 -06:00
Simon Glass
086ec0e26d rockchip: sdram: Update the driver to support of-platdata
Add support for of-platdata with rk3288 SDRAM initr. This requires decoding
the of-platdata struct and setting up the device from that. Also the driver
needs to be renamed to match the string that of-platdata will search for.

The platform data is copied from the of-platdata structure to the one used
by the driver. This allows the same code to be used with device tree and
of-platdata.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-14 20:40:24 -06:00
Simon Glass
fb4baf5d58 rockchip: sdram: Move all DT decoding to ofdata_to_platdata()
It is more correct to avoid touching the device tree in the probe() method.
Update the driver to work this way. Note that only SPL needs to fiddle with
the SDRAM registers, so decoding the platform data fully is not necessary in
U-Boot proper.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-14 20:40:24 -06:00
Simon Glass
5ce4bb2709 rockchip: syscon: Update to work with of-platdata
The syscon devices all end up having diffent driver names with of-platdata,
since the driver name comes from the first string in the compatible list.
Add separate device declarations for each one, and add a bind method to set
up driver_data correctly.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-14 20:40:24 -06:00