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https://github.com/AsahiLinux/u-boot
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rockchip: Add support for veyron-minnie (ASUS Chromebook Flip)
This adds support for the Asus Chromebook Flip, an RK3288-based clamshell device which can flip into 'tablet' mode. The device tree file comes from Linux v4.8. The SDRAM parameters are for 4GB Samsung LPDDR3. Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Simon Glass
parent
e70408c069
commit
c420ef67e5
7 changed files with 419 additions and 1 deletions
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@ -32,6 +32,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
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rk3288-firefly.dtb \
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rk3288-veyron-jerry.dtb \
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rk3288-veyron-mickey.dtb \
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rk3288-veyron-minnie.dtb \
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rk3288-rock2-square.dtb \
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rk3288-evb.dtb \
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rk3288-fennec.dtb \
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301
arch/arm/dts/rk3288-veyron-minnie.dts
Normal file
301
arch/arm/dts/rk3288-veyron-minnie.dts
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@ -0,0 +1,301 @@
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/*
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* Google Veyron Minnie Rev 0+ board device tree source
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*
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* Copyright 2015 Google, Inc
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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/dts-v1/;
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#include "rk3288-veyron-chromebook.dtsi"
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/ {
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model = "Google Minnie";
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compatible = "google,veyron-minnie-rev4", "google,veyron-minnie-rev3",
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"google,veyron-minnie-rev2", "google,veyron-minnie-rev1",
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"google,veyron-minnie-rev0", "google,veyron-minnie",
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"google,veyron", "rockchip,rk3288";
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backlight_regulator: backlight-regulator {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio2 12 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&bl_pwr_en>;
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regulator-name = "backlight_regulator";
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vin-supply = <&vcc33_sys>;
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startup-delay-us = <15000>;
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};
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panel_regulator: panel-regulator {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&lcd_enable_h>;
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regulator-name = "panel_regulator";
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startup-delay-us = <100000>;
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vin-supply = <&vcc33_sys>;
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};
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vcc18_lcd: vcc18-lcd {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&avdd_1v8_disp_en>;
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regulator-name = "vcc18_lcd";
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regulator-always-on;
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regulator-boot-on;
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vin-supply = <&vcc18_wl>;
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};
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};
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&backlight {
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/* Minnie panel PWM must be >= 1%, so start non-zero brightness at 3 */
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brightness-levels = <
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0 3 4 5 6 7
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8 9 10 11 12 13 14 15
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16 17 18 19 20 21 22 23
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24 25 26 27 28 29 30 31
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32 33 34 35 36 37 38 39
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40 41 42 43 44 45 46 47
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48 49 50 51 52 53 54 55
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56 57 58 59 60 61 62 63
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64 65 66 67 68 69 70 71
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72 73 74 75 76 77 78 79
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80 81 82 83 84 85 86 87
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88 89 90 91 92 93 94 95
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96 97 98 99 100 101 102 103
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104 105 106 107 108 109 110 111
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112 113 114 115 116 117 118 119
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120 121 122 123 124 125 126 127
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128 129 130 131 132 133 134 135
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136 137 138 139 140 141 142 143
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144 145 146 147 148 149 150 151
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152 153 154 155 156 157 158 159
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160 161 162 163 164 165 166 167
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168 169 170 171 172 173 174 175
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176 177 178 179 180 181 182 183
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184 185 186 187 188 189 190 191
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192 193 194 195 196 197 198 199
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200 201 202 203 204 205 206 207
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208 209 210 211 212 213 214 215
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216 217 218 219 220 221 222 223
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224 225 226 227 228 229 230 231
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232 233 234 235 236 237 238 239
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240 241 242 243 244 245 246 247
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248 249 250 251 252 253 254 255>;
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power-supply = <&backlight_regulator>;
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};
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&dmc {
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rockchip,pctl-timing = <0x215 0xc8 0x0 0x35 0x26 0x2 0x70 0x2000d
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0x6 0x0 0x8 0x4 0x17 0x24 0xd 0x6
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0x4 0x8 0x4 0x76 0x4 0x0 0x30 0x0
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0x1 0x2 0x2 0x4 0x0 0x0 0xc0 0x4
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0x8 0x1f4>;
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rockchip,phy-timing = <0x48d7dd93 0x187008d8 0x121076
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0x0 0xc3 0x6 0x1>;
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rockchip,sdram-params = <0x20d266a4 0x5b6 6 533000000 6 13 0>;
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};
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&emmc {
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/delete-property/mmc-hs200-1_8v;
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};
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&gpio_keys {
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pinctrl-0 = <&pwr_key_h &ap_lid_int_l &volum_down_l &volum_up_l>;
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volum_down {
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label = "Volum_down";
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gpios = <&gpio5 11 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_VOLUMEDOWN>;
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debounce-interval = <100>;
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};
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volum_up {
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label = "Volum_up";
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gpios = <&gpio5 10 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_VOLUMEUP>;
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debounce-interval = <100>;
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};
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};
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&i2c_tunnel {
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battery: bq27500@55 {
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compatible = "ti,bq27500";
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reg = <0x55>;
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};
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};
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&i2c3 {
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status = "okay";
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clock-frequency = <400000>;
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i2c-scl-falling-time-ns = <50>;
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i2c-scl-rising-time-ns = <300>;
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touchscreen@10 {
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compatible = "elan,ekth3500";
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reg = <0x10>;
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interrupt-parent = <&gpio2>;
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interrupts = <14 IRQ_TYPE_EDGE_FALLING>;
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pinctrl-names = "default";
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pinctrl-0 = <&touch_int &touch_rst>;
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reset-gpios = <&gpio2 15 GPIO_ACTIVE_LOW>;
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vcc33-supply = <&vcc33_touch>;
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vccio-supply = <&vcc33_touch>;
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};
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};
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&panel {
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compatible = "auo,b101ean01", "simple-panel";
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power-supply= <&panel_regulator>;
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};
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&rk808 {
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pinctrl-names = "default";
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pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
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regulators {
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vcc33_touch: LDO_REG2 {
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc33_touch";
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vcc5v_touch: SWITCH_REG2 {
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regulator-name = "vcc5v_touch";
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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};
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};
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&sdmmc {
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disable-wp;
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio
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&sdmmc_bus4>;
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};
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&vcc_5v {
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enable-active-high;
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gpio = <&gpio7 21 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&drv_5v>;
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};
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&vcc50_hdmi {
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enable-active-high;
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gpio = <&gpio5 19 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc50_hdmi_en>;
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};
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&pinctrl {
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backlight {
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bl_pwr_en: bl_pwr_en {
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rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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buck-5v {
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drv_5v: drv-5v {
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rockchip,pins = <7 21 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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buttons {
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volum_down_l: volum-down-l {
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rockchip,pins = <5 11 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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volum_up_l: volum-up-l {
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rockchip,pins = <5 10 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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hdmi {
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vcc50_hdmi_en: vcc50-hdmi-en {
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rockchip,pins = <5 19 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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lcd {
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lcd_enable_h: lcd-en {
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rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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avdd_1v8_disp_en: avdd-1v8-disp-en {
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rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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pmic {
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dvs_1: dvs-1 {
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rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>;
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};
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dvs_2: dvs-2 {
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rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
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};
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};
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prochot {
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gpio_prochot: gpio-prochot {
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rockchip,pins = <2 8 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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touchscreen {
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touch_int: touch-int {
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rockchip,pins = <2 14 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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touch_rst: touch-rst {
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rockchip,pins = <2 15 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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@ -65,7 +65,8 @@ u32 spl_boot_device(void)
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fallback:
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#elif defined(CONFIG_TARGET_CHROMEBOOK_JERRY) || \
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defined(CONFIG_TARGET_CHROMEBIT_MICKEY)
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defined(CONFIG_TARGET_CHROMEBIT_MICKEY) || \
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defined(CONFIG_TARGET_CHROMEBOOK_MINNIE)
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return BOOT_DEVICE_SPI;
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#endif
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return BOOT_DEVICE_MMC1;
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@ -58,6 +58,16 @@ config TARGET_CHROMEBIT_MICKEY
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Typically a USB hub or wireless keyboard/touchpad is used to get
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keyboard and mouse access.
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config TARGET_CHROMEBOOK_MINNIE
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bool "Google/Rockchip Veyron-Minnie Chromebook"
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help
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Jerry is a RK3288-based convertible clamshell device with 2 USB 3.0
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ports, micro HDMI, a 10.1-inch 1280x800 EDP display, micro-SD card,
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HD camera, touchpad, WiFi and Bluetooth. It includes a Chrome OS
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EC (Cortex-M3) to provide access to the keyboard and battery
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functions. It includes 2 or 4GB of SDRAM and 16 or 32GB of
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internal MMC. The product name is ASUS Chromebook Flip.
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config TARGET_ROCK2
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bool "Radxa Rock 2"
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help
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@ -29,3 +29,19 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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def_bool y
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endif
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if TARGET_CHROMEBOOK_MINNIE
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config SYS_BOARD
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default "veyron"
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config SYS_VENDOR
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default "google"
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config SYS_CONFIG_NAME
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default "veyron"
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config BOARD_SPECIFIC_OPTIONS # dummy
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def_bool y
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endif
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@ -11,3 +11,10 @@ S: Maintained
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F: board/google/veyron/
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F: include/configs/veyron.h
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F: configs/chromebit_mickey_defconfig
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CHROMEBIT MINNIE BOARD
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M: Simon Glass <sjg@chromium.org>
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S: Maintained
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F: board/google/veyron/
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F: include/configs/veyron.h
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F: configs/chromebit_minnie_defconfig
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82
configs/chromebook_minnie_defconfig
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82
configs/chromebook_minnie_defconfig
Normal file
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@ -0,0 +1,82 @@
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CONFIG_ARM=y
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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# CONFIG_SPL_MMC_SUPPORT is not set
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CONFIG_ROCKCHIP_RK3288=y
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CONFIG_TARGET_CHROMEBOOK_MINNIE=y
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CONFIG_SPL_SPI_FLASH_SUPPORT=y
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CONFIG_SPL_SPI_SUPPORT=y
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CONFIG_SPL_STACK_R_ADDR=0x80000
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CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-minnie"
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CONFIG_SILENT_CONSOLE=y
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# CONFIG_DISPLAY_CPUINFO is not set
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CONFIG_SPL_STACK_R=y
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CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_BOOTZ=y
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# CONFIG_CMD_IMLS is not set
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CONFIG_CMD_MMC=y
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CONFIG_CMD_SF=y
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CONFIG_CMD_SPI=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_GPIO=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_TIME=y
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CONFIG_CMD_PMIC=y
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CONFIG_CMD_REGULATOR=y
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CONFIG_CMD_EXT2=y
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CONFIG_CMD_EXT4=y
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CONFIG_CMD_FAT=y
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CONFIG_CMD_FS_GENERIC=y
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
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CONFIG_REGMAP=y
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CONFIG_SPL_REGMAP=y
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CONFIG_SYSCON=y
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CONFIG_SPL_SYSCON=y
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# CONFIG_SPL_SIMPLE_BUS is not set
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CONFIG_CLK=y
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CONFIG_SPL_CLK=y
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CONFIG_ROCKCHIP_GPIO=y
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CONFIG_I2C_CROS_EC_TUNNEL=y
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CONFIG_SYS_I2C_ROCKCHIP=y
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CONFIG_I2C_MUX=y
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CONFIG_DM_KEYBOARD=y
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CONFIG_CROS_EC_KEYB=y
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CONFIG_CROS_EC=y
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CONFIG_CROS_EC_SPI=y
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CONFIG_PWRSEQ=y
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CONFIG_ROCKCHIP_DWMMC=y
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CONFIG_PINCTRL=y
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CONFIG_SPL_PINCTRL=y
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# CONFIG_SPL_PINCTRL_FULL is not set
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CONFIG_ROCKCHIP_RK3288_PINCTRL=y
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CONFIG_DM_PMIC=y
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# CONFIG_SPL_PMIC_CHILDREN is not set
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CONFIG_PMIC_RK808=y
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CONFIG_DM_REGULATOR_FIXED=y
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CONFIG_REGULATOR_RK808=y
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CONFIG_PWM_ROCKCHIP=y
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CONFIG_RAM=y
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CONFIG_SPL_RAM=y
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CONFIG_DEBUG_UART=y
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CONFIG_DEBUG_UART_BASE=0xff690000
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CONFIG_DEBUG_UART_CLOCK=24000000
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CONFIG_DEBUG_UART_SHIFT=2
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CONFIG_SYS_NS16550=y
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CONFIG_ROCKCHIP_SERIAL=y
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CONFIG_ROCKCHIP_SPI=y
|
||||
CONFIG_SYSRESET=y
|
||||
CONFIG_DM_VIDEO=y
|
||||
CONFIG_DISPLAY=y
|
||||
CONFIG_VIDEO_ROCKCHIP=y
|
||||
CONFIG_CONSOLE_SCROLL_LINES=10
|
||||
CONFIG_USE_TINY_PRINTF=y
|
||||
CONFIG_CMD_DHRYSTONE=y
|
||||
CONFIG_ERRNO_STR=y
|
||||
CONFIG_SPL_OF_PLATDATA=y
|
||||
# CONFIG_SPL_OF_LIBFDT is not set
|
||||
Loading…
Reference in a new issue