When set to PULL_NONE, gpio_set_pull function is returned without write the register.
This patch fixed it.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Add sec3.1 h/w geometry for fdt node fixups.
Also, technically, whilst SEC v3.3 h/w honours the tls_ssl_stream descriptor
type, it lacks the ARC4 algorithm execution unit required to be able
to execute anything meaningful with it. Change the node to agree with
the documentation that declares that the sec3.3 really doesn't have such
a descriptor type.
Reported-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The ngPIXIS is a board-specific FPGA, but the definition of the registers
is mostly consistent. On boards where it matter, register 9 is called
'brdcfg1' instead of 'dma', so rename the variable in the ngpixis_t
definition.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Add the 'clkdvdr' and 'pmuxcr2' registers to the 85xx definition of
struct ccsr_gur.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This patch allows users to override default STANDALONE_LOAD_ADDR.
The gcclibdir path was duplicated in the standalone Makefile and
can be removed.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
This patch fixes the run-time error on div64 when built with
gcc4, which was reported by jhwu0625 on nios forum. It merges
math support from libgcc of gcc4. This patch is copied from
nios2-linux.
It works with both gcc3 and gcc4. The old mult.c, divmod.c and
math.h are removed.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
The "-ffixed-r15" option doesn't work well for gcc4. Since we
don't use gp for small data with option "-G0", we can use gp
as global data pointer. This allows compiler to use r15. It
is necessary for gcc4 to work properly.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
This patch adds the driver of altera spi controller, which is
used as epcs/spi flash controller. It also works with mmc_spi
driver.
This driver support more than one spi bus, with base list declared
#define CONFIG_SYS_ALTERA_SPI_LIST { BASE_0,BASE_1,... }
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Tested-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
This patch adds gpio support of Altera PIO component to the
nios2-generic board. Though it drives only gpio_led at the
moment, it supports bidirectional port to control bit-banging
I2C, NAND flash busy status or button switches, etc.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Tested-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
This patch adds a status led driver followed the GPIO access
conventions of Linux. The led mask is used to specify the gpio pin.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Tested-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
This patch adds driver for a trivial gpio core, which is described
in http://nioswiki.com/GPIO. It is used for gpio led and nand flash
interface in u-boot.
When CONFIG_SYS_GPIO_BASE is not defined, board may provide
its own driver.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Tested-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
This patch adds support for full MII interface on MCF5445x (in contrast
to RMII as used on the evaluation boards).
Signed-off-by: Wolfgang Wegner <w.wegner at astro-kom.de>
This patch adds the possibility to handle seperate PHYs to MCF5445x.
Naming is chosen to resemble the contrary CONFIG_FEC_SHARED_PHY in the
linux kernel.
Signed-off-by: Wolfgang Wegner <w.wegner at astro-kom.de>
create_pipe() can give wrong result if an expression is passed as the 'endpoint'
argument -- due to missing parentheses.
Thanks to Martin Mueller for finding the bug and providing the patch.
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
The current Blackfin nand write function fills up the write buffer but
returns before it has had a chance to drain. On faster systems, this
isn't a problem as the operation finishes before the ECC registers are
read, but on slower systems the ECC may be incomplete when the core tries
to read it.
So wait for the buffer to drain once we're done writing to it.
Signed-off-by: Andrew Caldwell <Andrew.Caldwell@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Compiling tools subdirectory on Mac OS X 10.6 (Snow Leopard) complains about
wrong syntax in system includes.
In file included from /usr/include/stdio.h:444,
from ../source/u-boot/include/compiler.h:26,
from ../source/u-boot/lib/crc32.c:15:
/usr/include/secure/_stdio.h:46: error: syntax error in macro parameter list
This can be fixed by reverting the workaround for prior OS X releases in
config.mk conditionally for OS X 10.6+.
Signed-off-by: Andreas Biemann <andreas.devel@googlemail.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
For CONFIG_SYS_BOOTCOUNT_SINGLEWORD the code had an endianness problem.
Signed-off-by: Michael Weiss <michael.weiss@ifm.com>
Signed-off-by: Detlev Zundel <dzu@denx.de>
Fix the following compiler problems:
arch/arm/cpu/arm920t/a320/liba320.a(timer.o): In function `udelay':
/home/wd/git/u-boot/work/arch/arm/cpu/arm920t/a320/timer.c:160: multiple definition of `udelay'
lib/libgeneric.a(time.o):/home/wd/git/u-boot/work/lib/time.c:34: first defined here
lib/libgeneric.a(time.o): In function `udelay':
time.c:(.text+0x1c): undefined reference to `__udelay'
Signed-off-by: Wolfgang Denk <wd@denx.de>
call to reset PHY chip.
Current PHY Software Reset operation in guruplug does not
poll reset bit in control register to go to 0(auto clearing)
for making sure reset was successful.This patch uses standard
miiphy call miiphy_reset to make sure proper PHY reset operation.
Signed-off-by: Mahavir Jain <mjain@marvell.com>
commit c7190f028f "mpc83xx:
retain POR values of non-configured ACR, SPCR, SCCR, and LCRR
bitfields" incorrectly shifted <register>_<bitfield> (e.g.
ACR_PIPE_DEP) values that were preshifted by their
definition in mpc83xx.h.
this patch removes the unnecessary shifting for the newly
utilized mask values in cpu_init.c, and prevents seemingly
unrelated symptoms such as an mpc8379erdb board from
locking up whilst performing a networking operation,
e.g. a tftp.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
"down_write_trylock" needs to return 1 instead of 0 for success.
Otherwise copying a block with a read error (e.g. bit-flip on read)
won't work correctly.
Signed-off-by: Stefan Roese <sr@denx.de>
The current U-Boot UBI implementation is copied from Linux. In this
porting the UBI background thread was not handled correctly. Upon write
operations ubi_wl_flush() makes sure, that all queued operations, like
page-erase, are completed. But this is missing for read operations.
This patch now makes sure that such operations (like scrubbing upon
bit-flip errors) are not queued, but executed directly.
Signed-off-by: Stefan Roese <sr@denx.de>
Commit 15351855 "fsl-diu: Using I/O accessor to CCSR space" caused a
number of "passing argument 2 of 'out_be32' makes integer from pointer
without a cast" warnings; fix these.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Dave Liu <daveliu@freescale.com>
Cc: Jerry Huang <Chang-Ming.Huang@freescale.com>
Cc: Kumar Gala <galak@kernel.crashing.org>
Modification of print_size to avoid use of divides and especially
long long divides. Keep the binary scale factor in terms of bit
shifts instead. This should be faster, since the previous code
gave the compiler no clues that the divides where always powers
of two, preventing optimisation.
Signed-off-by: Nick Thompson <nick.thompson@ge.com>
Acked-by: Timur Tabi <timur@freescale.com>
This patch sets the SICRL_LBC bits in SICRL to change the function of the
associated pins to GPIO functionality.
Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net>
