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https://github.com/AsahiLinux/u-boot
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Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
This commit is contained in:
commit
9bb3b3d440
3 changed files with 9 additions and 5 deletions
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@ -1912,7 +1912,8 @@ typedef struct ccsr_gur {
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#define MPC85xx_PMUXCR_SD_DATA 0x80000000
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#define MPC85xx_PMUXCR_SDHC_CD 0x40000000
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#define MPC85xx_PMUXCR_SDHC_WP 0x20000000
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u8 res6[12];
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u32 pmuxcr2; /* Alt. function signal multiplex control 2 */
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u8 res6[8];
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u32 devdisr; /* Device disable control */
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#define MPC85xx_DEVDISR_PCI1 0x80000000
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#define MPC85xx_DEVDISR_PCI2 0x40000000
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@ -1949,10 +1950,12 @@ typedef struct ccsr_gur {
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#if defined(CONFIG_MPC8568)||defined(CONFIG_MPC8569)
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u8 res10b[76];
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par_io_t qe_par_io[7];
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u8 res10c[3136];
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u8 res10c[1600];
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#else
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u8 res10b[3404];
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u8 res10b[1868];
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#endif
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u32 clkdvdr; /* Clock Divide register */
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u8 res10d[1532];
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u32 clkocr; /* Clock out select */
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u8 res11[12];
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u32 ddrdllcr; /* DDR DLL control */
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@ -24,7 +24,7 @@ typedef struct ngpixis {
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u8 aux;
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u8 spd;
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u8 brdcfg0;
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u8 dma;
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u8 brdcfg1; /* On some boards, this register is called 'dma' */
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u8 addr;
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u8 res2[2];
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u8 data;
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@ -534,7 +534,8 @@ void fdt_fixup_crypto_node(void *blob, int sec_rev)
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{ 0x0202, 1, 24, 0x04c, 0x0122003f }, /* SEC 2.2 */
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{ 0x0204, 4, 24, 0x07e, 0x012b0ebf }, /* SEC 2.4 */
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{ 0x0300, 4, 24, 0x9fe, 0x03ab0ebf }, /* SEC 3.0 */
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{ 0x0303, 4, 24, 0x97c, 0x03ab0abf }, /* SEC 3.3 */
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{ 0x0301, 4, 24, 0xbfe, 0x03ab0ebf }, /* SEC 3.1 */
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{ 0x0303, 4, 24, 0x97c, 0x03a30abf }, /* SEC 3.3 */
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};
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char compat_strlist[ARRAY_SIZE(sec_rev_prop_list) *
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sizeof("fsl,secX.Y")];
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