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89323 commits

Author SHA1 Message Date
Tom Rini
c9836c0fb7 Azure: Split sandbox and qemu test.py runs
Currently, most sandbox runs take a long time (due to running so many
tests) while QEMu based test.py runs are fairly short.  Split the
pipeline here so that we get more consistent average run times.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-09-06 13:51:20 -04:00
Tom Rini
8ae5feca18 Azure: Rework test_py job to publish its wrapper script
Both to aide in debugging of any test.py issues as well as to make it
easier to split the current matrix in two, have a new job that creates
and publishes the current wrapper script we use for test.py jobs.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-09-06 13:51:20 -04:00
Tom Rini
b87f904709 CI: Drop some jobs we didn't really utilize
- We have added more TODO/etc comments since this task was created and
  never focused on removing them.
- The output of sloccount isn't preserved or looked at, and if desired
  should be in the release stats pages instead somehow.
- The results of cppcheck aren't investigated and require modeling work
  to be useful to start with.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-09-06 13:51:20 -04:00
Tom Rini
562ed115e7 CI: Combine tools-only and envtools jobs
These jobs are to confirm specific build targets, on a Linux host.  We
can safely combine these two build tests, with a make mrproper in
between.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-09-06 13:51:19 -04:00
Tom Rini
9aeac898da Azure: Rework build the world jobs
Now that we have 3600 minutes per build job, condense and rework things
such that our overall time largely doesn't change, but we can also
largely avoid having to re-tweak this job to avoid timeouts.  Given that
we have 10 threads, we also move a few of the specific sandbox test
builds to a prior stage.

Note that while sandbox builds with address sanitization enabled (ASAN)
not all tests pass, so we limit ourselves to just checking that the
version test passes for now.

Link: https://learn.microsoft.com/en-us/azure/devops/pipelines/process/phases?view=azure-devops&tabs=yaml#timeouts
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-09-06 13:51:19 -04:00
Marek Vasut
8b3694aab3 test: print: Fix hexdump test on 64bit systems
Use the following regex to make this test compatible with
both 32bit and 64bit systems. The trick is to use %0*lx
format string for the address prefix in the test.

"
s@\(ut_assert_nextline("\)0\+\([^:]\+\)\(:.*"\)\();\)@\1%0*lx\3, IS_ENABLED(CONFIG_PHYS_64BIT) ? 16 : 8, 0x\2UL\4
"

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-09-06 13:51:19 -04:00
Marek Vasut
ed48da3392 test: dm: test-fdt: Use fdtdec_get_int() in dm_check_devices()
The current fdtdec_get_addr() takes into consideration #address-cells
and #size-cells for "ping-expect" property which is clearly neither.
Use fdtdec_get_int() instead and return negative one in case the
property is not in DT or the platform under test is not DT based,
i.e. mimic the current fdtdec_get_addr() behavior.

This fixes ut dm dm_test_bus_children test.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-09-06 13:51:19 -04:00
Marek Vasut
e342b91a08 configs: sandbox64: Enable legacy image format support
Align the sandbox64 defconfig with sandbox defconfig. Enable missing
legacy image format support. This fixes ut_bootstd_bootflow_cmd_menu
test.

Suggested-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-09-06 13:51:19 -04:00
Tom Rini
48aaabe441 Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-coldfire into next
- Relocation support
2023-09-06 13:47:54 -04:00
Tom Rini
31d9d64444 Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-usb into next 2023-09-06 13:47:54 -04:00
Tom Rini
86f4e84c29 Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-sh into next
- rmobile cleanup
2023-09-06 13:47:54 -04:00
Marek Vasut
96912a9c7c ARM: rmobile: Clean up rmobile_cpuinfo_idx()
Clean the function up a bit further. Return immediately on match
and return ARRAY_SIZE() - 1 on failure. Add proper comment in that
case.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2023-09-06 13:47:44 -04:00
Tom Rini
98b35c7fdb Merge branch '2023-09-06-riscv-fixes' into next
- Merge two patches to fix the issues with risc-v building on next after
  the merge of v2023.10-rc4 to next.
2023-09-06 13:47:24 -04:00
Tom Rini
59d2a7d731 riscv: Correct event usage for riscv_cpu_probe/setup
With having both an EVENT_SPY_SIMPLE setup for both riscv_cpu_probe and
riscv_cpu_setup we do not need the latter function to call the former
function as it will already have been done in time.

Fixes: 1c55d62fb9 ("riscv: cpu: make riscv_cpu_probe to EVT_DM_POST_INIT_R callback")
Tested-by: Milan P. Stanić <mps@arvanta.net>
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-09-06 13:47:24 -04:00
Tom Rini
68f446fb9b riscv: Rework riscv_cpu_probe for current event macros
This function should now be a EVENT_SPY_SIMPLE call, update it.

Tested-by: Milan P. Stanić <mps@arvanta.net>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-09-06 13:47:20 -04:00
Marek Vasut
26af162ac8 arch: m68k: Implement relocation
Implement relocation for M68K. Perform all the updates in start.S
relocate_code in assemby, since it is a simple matter of traversing
the dynsym table and adding relocation offset - MONITOR_BASE to all
the items in that table. The necessity to deal with MONITOR_BASE is
a specific of M68K, where the ELF entry point is at offset 0x400,
which is the MONITOR_BASE, while TEXT_BASE is at offset 0 .

This also removes the one last user of NEEDS_MANUAL_RELOC, so that
could be finally cleaned up .

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-09-06 13:28:58 +02:00
Marek Vasut
bf10b9201c tools: relocate-rela: Add M68K support
Add M68K ELF32 support into this tool, so it can patch static rela
into M68K u-boot-nodtb.bin . This is the first step toward M68K
relocation support, and in turn, removal of NEEDS_MANUAL_RELOC
from the codebase altogether.

Tested-by: Michal Simek <michal.simek@amd.com> # microblaze, arm64
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-09-06 13:28:29 +02:00
Marek Vasut
0ad3eef381 tools: relocate-rela: Fix BE symtab handling
The symtab contains data in target endianness, convert the data to
native endianness before doing any operations and on them, and back
to target endianness before updating the bin file.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Tested-by: Michal Simek <michal.simek@amd.com> # microblaze, arm64
Reviewed-by: Angelo Dureghello <angelo@kernel-space.org>
2023-09-06 13:28:19 +02:00
Tom Rini
c0c08be546 Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-usb
- DWC3 fix on Layerscape
2023-09-05 14:44:10 -04:00
Tom Rini
34056394ce Fixes for release
-----------------
 
 - imx9: fix DRAM calculation
 - thermal: fixes
 - fixed for DM, DH and Gateworks boards
 
 CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/17639
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Merge tag 'u-boot-imx-20230905' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

Fixes for release
-----------------

- imx9: fix DRAM calculation
- thermal: fixes
- fixed for DM, DH and Gateworks boards

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/17639
2023-09-05 09:05:16 -04:00
Tom Rini
e7b7dca28f Merge https://source.denx.de/u-boot/custodians/u-boot-riscv
+ Implement OpenSBI DBCN extension for early debug console
+ Fixes for VisionFive2 board
      + Fix timer missing
      + Fix L2 LIM issue
      + Enable PCIE auto enumeration to support USB and NVMe by default
+ Set eth0 mac address properly
+ Add __noreturn attribute to spl_invoke_opensbi
2023-09-05 09:04:49 -04:00
Heinrich Schuchardt
dfe0837494 risc-v: implement DBCN based debug console
Use the DBCN SBI extension to implement a debug console.
Make it the default for S-mode RISC-V.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-09-05 10:53:55 +08:00
Heinrich Schuchardt
d14222e7c1 risc-v: implement DBCN write byte
The DBCN extension provides a Console Write Byte call.
Implement function sbi_dbcn_write_byte to invoke it.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-09-05 10:53:55 +08:00
Chanho Park
ef08687ea0 spl: add __noreturn attribute to spl_invoke_opensbi function
spl_invoke_opensbi function is not returned to SPL. Thus, we need to
set __noreturn function attribute.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-09-05 10:53:51 +08:00
Shengyu Qu
f39e24496a configs: starfive: Disable SYS_MALLOC_CLEAR_ON_INIT by default
SPL_SYS_MALLOC_CLEAR_ON_INIT would enable SYS_MALLOC_CLEAR_ON_INIT by
default, but that's not need on JH7110, so disable that.

Signed-off-by: Shengyu Qu <wiagn233@outlook.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-09-05 10:53:46 +08:00
Shengyu Qu
64339bc1f2 riscv: cpu: jh7110: Imply SPL_SYS_MALLOC_CLEAR_ON_INIT
Starfive JH7110 needs to clear L2 LIM to zero before use or ECC error
would be triggered. Currently, we use DDR ram for SPL malloc arena on
Visionfive 2 board in defconfig, but it's also possible to use L2 LIM as
SPL malloc arena. To avoid triggering ECC error in this scenario, we
imply SPL_SYS_MALLOC_CLEAR_ON_INIT as default.

Signed-off-by: Bo Gan <ganboing@gmail.com>
Signed-off-by: Shengyu Qu <wiagn233@outlook.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-09-05 10:53:46 +08:00
Shengyu Qu
c9db9a2ef5 dlmalloc: Add support for SPL_SYS_MALLOC_CLEAR_ON_INIT
To support SPL_SYS_MALLOC_CLEAR_ON_INIT, we have to modify
#ifdef CONFIG_SYS_MALLOC_CLEAR_ON_INIT
to #if CONFIG_IS_ENABLED(SYS_MALLOC_CLEAR_ON_INIT)

Signed-off-by: Bo Gan <ganboing@gmail.com>
Signed-off-by: Shengyu Qu <wiagn233@outlook.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-09-05 10:53:46 +08:00
Shengyu Qu
dd1eb1af26 Kconfig: Add SPL_SYS_MALLOC_CLEAR_ON_INIT
Add SPL version of SYS_MALLOC_CLEAR_ON_INIT, this would help devices
that need to clear ram before use to work correctly.

Signed-off-by: Bo Gan <ganboing@gmail.com>
Signed-off-by: Shengyu Qu <wiagn233@outlook.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-09-05 10:53:46 +08:00
Shengyu Qu
f943417737 doc: board: starfive: Add more info about supported driver
Since PLDA PCIE driver is added and VL805 support is enabled in
defconfig for Starfive Visionfive 2, modify the document to keep
consistent.

Signed-off-by: Shengyu Qu <wiagn233@outlook.com>
Tested-by: Milan P. Stanić <mps@arvanta.net>
2023-09-05 10:53:41 +08:00
Shengyu Qu
dccf4a843a configs: starfive: Enable PCIE auto enum and NVME/USB stuff for Starfive Visionfive 2
Although PCIE driver already exists, board defconfig isn't configured to
enable PCIE enum on boot, thus USB storage device and NVME drive are not
supported by default. So modify defconfig to enable PCIE auto enum, then
start USB subsystem and scan nvme drive on boot.

Signed-off-by: Shengyu Qu <wiagn233@outlook.com>
Tested-by: Milan P. Stanić <mps@arvanta.net>
2023-09-05 10:53:41 +08:00
Torsten Duwe
6164d86984 riscv: jh7110: enable riscv,timer in the device tree
The JH7110 has the arhitectural CPU timer on all 5 rv64 cores.
Note that in the device tree.

Signed-off-by: Torsten Duwe <duwe@suse.de>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-09-05 10:53:36 +08:00
Torsten Duwe
f39f8f77a5 riscv: allow riscv timer to be instantiated via device tree
For the architectural timer on riscv, there already is a defined
device tree binding[1]. Allow timer instances to be created from
device tree matches, but for now retain the old mechanism, which
registers the timer biggy-back with the CPU.

[1] linux/Documentation/devicetree/bindings/timer/riscv,timer.yaml

Signed-off-by: Torsten Duwe <duwe@suse.de>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-09-05 10:53:36 +08:00
Seung-Woo Kim
71914337ef eeprom: starfive: set eth0 mac address properly
fdt_fixup_ethernet() sets eth0 mac address from ethaddr. Set
ethaddr to environment instead of eth0addr.

Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-09-05 10:53:29 +08:00
Tom Rini
493fd3363f nokia_rx51: Remove platform
This platform is behind on migrations (it is the sole user of the oldest
legacy version of the USB gadget stack and is long overdue for
migration) and with Pali no longer being a maintainer, we remove this
platform.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-09-04 21:14:32 -04:00
Tom Rini
af7de99e0c MAINTAINERS: Drop Pali Rohár
Remove Pali from his listed maintainer entries due to his publicly
visible actions on the mailing list.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-09-04 21:13:38 -04:00
Fabrice Gasnier
adee3ba577 usb: host: ohci-generic: Make usage of clock/reset bulk() API
Make usage of clock and reset bulk API in order to simplify the code

Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Reviewed-by: Xavier Drudis Ferran <xdrudis@tinet.cat>
2023-09-04 18:25:20 +02:00
Fabrice Gasnier
5b43bc97ee usb: check for companion controller in uclass
EHCI is usually used with companion controller (like OHCI) as companion
controller. This information on the companion is missing currently in
companion drivers.
So, if the usb-uclass isn't aware, it may scan busses in any order: OHCI
first, then EHCI.
This is seen on STM32MP1 where DT probing makes the probe order to occur
by increasing address (OHCI address < EHCI address).

When a low speed or full-speed device is plugged in, it's not detected as
EHCI should first detect it, and give ownership (handover) to OHCI.

Current situation on STM32MP1 (with a low speed device plugged-in)
STM32MP> usb start
starting USB...
Bus usb@5800c000: USB OHCI 1.0
Bus usb@5800d000: USB EHCI 1.00
scanning bus usb@5800c000 for devices... 1 USB Device(s) found
scanning bus usb@5800d000 for devices... 1 USB Device(s) found
   scanning usb for storage devices... 0 Storage Device(s) found

The "companion" property in the device tree allow to retrieve companion
controller information, from the EHCI node. This allow marking the
companion driver as such.

With this patch (same low speed device plugged in):
STM32MP> usb start
starting USB...
Bus usb@5800c000: USB OHCI 1.0
Bus usb@5800d000: USB EHCI 1.00
scanning bus usb@5800d000 for devices... 1 USB Device(s) found
scanning bus usb@5800c000 for devices... 2 USB Device(s) found
   scanning usb for storage devices... 0 Storage Device(s) found
STM32MP> usb tree
USB device tree:
1  Hub (12 Mb/s, 0mA)
|   U-Boot Root Hub
|
+-2  Human Interface (1.5 Mb/s, 100mA)
   HP HP USB 1000dpi Laser Mouse

1  Hub (480 Mb/s, 0mA)
 u-boot EHCI Host Controller

This also optimize bus scan when a High speed device is plugged in, as
the usb-uclass skips OHCI in this case:

STM32MP> usb reset
resetting USB...
Bus usb@5800c000: USB OHCI 1.0
Bus usb@5800d000: USB EHCI 1.00
scanning bus usb@5800d000 for devices... 2 USB Device(s) found
   scanning usb for storage devices... 1 Storage Device(s) found
STM32MP> usb tree
USB device tree:
1  Hub (480 Mb/s, 0mA)
|  u-boot EHCI Host Controller
|
+-2  Mass Storage (480 Mb/s, 200mA)
   SanDisk Cruzer Blade 03003432021922011407

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2023-09-04 18:25:20 +02:00
Fabio Estevam
a79fca7b44 thermal: imx_tmu: Increase the polling interval
Polling every second to check whether the CPU has cooled down is
too frequent.

Allow more time for the CPU to cool down by increasing the polling
interval to 5 seconds by defaut.

This value is used in the absence of the 'polling-delay' devicetree
property.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-09-04 17:26:44 +02:00
Fabio Estevam
f4898e4b0e thermal: imx_tmu: Fix the temperature unit
The temperature unit is millidegree Celsius, so divide by 1000 to correctly
print the temperature values in Celsius.

While at it, also change a typo: "has beyond" to "is beyond".

Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-09-04 17:26:44 +02:00
Fabio Estevam
966480fe43 thermal: imx_tmu: Increase the log level for high temperatures
dev_info() message is not printed by default. Increase the log level
to dev_crit(). This allows the critical messages related to the temperature
getting beyong the alert threshold to be displayed.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-09-04 17:26:44 +02:00
Fabio Estevam
402b8106ec thermal: imx_tmu: Fix the polling default
When the 'polling-delay' property is not passed via devicetree,
pdata->polling_delay keeps at 0. This causes the imx_tmu driver to get
stuck inside the busy while() loop when the CPU temperature is above
the alert point.

Fix this problem by passing a one second polling interval, which provides
a proper delay to let the system to cool down and exit the while() loop
when the temperature is below the alert point.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-09-04 17:26:44 +02:00
Fabio Estevam
282ff895c8 imx8mm_evk_defconfig: Select CONFIG_IMX_TMU
Select the i.MX8MM thermal driver as it is useful for displaying
the CPU temperature and its grading:

CPU:   Commercial temperature grade (0C to 95C) at 38C

It also prevents booting when the temperature is above the alert
point.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-09-04 17:26:44 +02:00
Tom Rini
b53ab97150 event.h: Documented some newly added portions better
After the merge of v2023.10-rc4 to next include/event.h needs to be
fully documented in order for documentation builds to complete.  Rewords
two of the event_t descriptions to be docbook style and better match the
rest of this enum.  Fix two typos (flag->flags) in other comments.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-09-04 11:19:50 -04:00
Tom Rini
ddec4cae62 Prepare v2023.10-rc4
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Merge tag 'v2023.10-rc4' into next

Prepare v2023.10-rc4
2023-09-04 10:51:58 -04:00
Tom Rini
b27eeca112 Prepare v2023.10-rc4
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-09-04 10:39:43 -04:00
Tom Rini
164b86f26b Merge tag 'rpi-2023.10' of https://source.denx.de/u-boot/custodians/u-boot-raspberrypi
Updates for RPi for 2023.10:

- rpi: Disable DISTRO_DEFAULTS
- arm: rpi: Switch to standard boot
- arm: rpi: Switch to a text environment
2023-09-04 10:07:48 -04:00
Oleksandr Suvorov
7f4b73fe69 usb: dwc3: Fix enabling USB_DR_MODE_HOST
The original logic always enables USB_DR_MODE_HOST operation mode in
dwc3_layerscape_bind() in u-boot. Prevent choosing USB_DR_MODE_HOST
operation mode if USB_HOST is not enabled.

Fixes: 2b0b51d0be ("usb: dwc3: add layerscape support")
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
2023-09-04 15:51:38 +02:00
Oleksandr Suvorov
da93ea6a9a usb: dwc3: Fix renaming SPL_USB_HOST_SUPPORT to SPL_USB_HOST
In the usb/dwc3-layerscape driver the first option should be renamed
to the latter as well. Do it.

Fix original logic in dwc3_layerscape_bind() - do not enable

Fixes: 333e4a621d ("Rename SPL_USB_HOST_SUPPORT to SPL_USB_HOST")
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
2023-09-04 15:51:38 +02:00
Marek Vasut
2629b18ed4 ARM: imx: Use default SAVED_DRAM_TIMING_BASE on Data Modul i.MX8M Plus eDM SBC
Use default SAVED_DRAM_TIMING_BASE as that is what upstream TFA expects.
Without this change, the board will fail to suspend/resume e.g. in Linux.

Signed-off-by: Marek Vasut <marex@denx.de>
2023-09-04 10:21:20 +02:00
Marek Vasut
7e4e4ff6ec ARM: imx: Use default SAVED_DRAM_TIMING_BASE on Data Modul i.MX8M Mini eDM SBC
Use default SAVED_DRAM_TIMING_BASE as that is what upstream TFA expects.
Without this change, the board will fail to suspend/resume e.g. in Linux.

Signed-off-by: Marek Vasut <marex@denx.de>
2023-09-04 10:21:20 +02:00