Commit graph

100 commits

Author SHA1 Message Date
Wolfgang Denk
252b404d95 Fix PCI_BASE_ADDRESS_5 handling in pci_hose_config_device()
Signed-off-by: FUJITA Kazutoshi <fujita@soum.co.jp>
Signed-off-by: <wd@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
2010-03-21 17:58:07 +01:00
Felix Radensky
97c9f29008 ppc4xx: Fix sending type 1 PCI transactions
The list of 4xx SoCs that should send type 1 PCI transactions
is not defined correctly. As a result PCI-PCI bridges and devices
behind them are not identified. The following 4xx variants should
send type 1 transactions: 440GX, 440GP, 440SP, 440SPE, 460EX and 460GT.

Signed-off-by: Felix Radensky <felix@embedded-sol.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2010-01-23 09:27:18 +01:00
Kumar Gala
ee53650dad ppc/8xxx: Remove is_fsl_pci_agent
All users of is_fsl_pci_agent have been converted to fsl_is_pci_agent
that uses the standard PCI programming model to determine host vs
agent/end-point.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-01-05 13:49:07 -06:00
Ed Swarthout
715d8f7608 fsl_pci_init_port end-point initialization is broken
commit 70ed869e broke fsl pcie end-point initialization.
Returning 0 is not correct.  The function must return the first free
bus number for the next controller.

fsl_pci_init() must still be called and a bus allocated even if the
controller is an end-point.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Acked-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-11-04 09:16:30 -06:00
Kumar Gala
01471d538f Revert "ppc/85xx/pci: fsl_pci_init: pcie agent mode support"
This reverts commit 70ed869ea5.

There isn't any need to modify the API for fsl_pci_init_port to pass the
status of host/agent(end-point) status.  We can determine that
internally to fsl_pci_init_port.  Revert the patch that makes the API
change.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-11-04 09:14:59 -06:00
Vivek Mahajan
70ed869ea5 ppc/85xx/pci: fsl_pci_init: pcie agent mode support
Originally written by Jason Jin and Mingkai Hu for mpc8536.

When QorIQ based board is configured as a PCIe agent, then unlock/enable
inbound PCI configuration cycles and init a 4K inbound memory window;
so that a PCIe host can access the PCIe agents SDRAM at address 0x0

* Supported in fsl_pci_init_port() after adding pcie_ep as a param
* Revamped copyright in drivers/pci/fsl_pci_init.c
* Mods in 85xx based board specific pci init after this change

Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-27 09:33:51 -05:00
Kumar Gala
93a83872c7 ppc/85xx: Clean up p1_p2_rdb PCI setup
General code cleanup to use in/out IO accessors as well as making
the code that prints out info sane between board and generic fsl pci
code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-09-24 12:04:58 -05:00
Poonam Aggrwal
0d3d68b25a driver/fsl_pci: Add fsl_pci_init_port function to initialize a PCI controller
fsl_pci_init_port can be called from board specific PCI initialization
routines to setup the PCI (or PCIe) controller.  This will reduce code
redundancy in most of the 85xx/86xx FSL board ports that setup PCI.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28 17:12:43 -05:00
Kumar Gala
ad19e7a5d2 pci/fsl_pci_init: Rework PCI ATMU setup to handle >4G of memory
The old PCI ATMU setup code would just mimic the PCI regions into the
ATMU registers.  For simple memory maps in which all memory, MMIO, etc
space fit into 4G this works ok.  However there are issues with we have
>4G of memory as we know can't access all of memory and we need to
ensure that PCICSRBAR (PEXCSRBAR on PCIe) isn't overlapping with
anything since we can't turn it off.

We first setup outbound windows based on what the board code setup
in the pci regions for MMIO and IO access.  Next we place PCICSRBAR
below the MMIO window.  After which we try to setup the inbound windows
to map as much of memory as possible.

On PCIe based controllers we are able to overmap the ATMU setup since
RX & TX links are separate but report the proper amount of inbound
address space to the region tracking to ensure there is no overlap.

On PCI based controllers we use as many inbound windows as available to
map as much of the memory as possible.

Additionally we changed all the CCSR register access to use proper IO
accessor functions.  Also had to add CONFIG_SYS_CCSRBAR_PHYS to some
86xx platforms that didn't have it defined.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28 17:12:36 -05:00
Kumar Gala
8295b94400 pci/fsl_pci_init: Use PCIe capability to determine if controller is PCIe
Change the code to use the PCIe capabilities register to determine if we
are a PCIe controller or not.  Additionally cleaned up some white space
and formatting in the file.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28 17:12:36 -05:00
Kumar Gala
cb151aa2cf pci/fsl_pci_init: Fold fsl_pci_setup_inbound_windows into fsl_pci_init
Every platform that calls fsl_pci_init calls fsl_pci_setup_inbound_windows
before it calls fsl_pci_init.  There isn't any reason to just call it
from fsl_pci_init and simplify things a bit.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28 17:12:35 -05:00
Kumar Gala
fb3143b35e pci/fsl_pci_init: Fold pci_setup_indirect into fsl_pci_init
Every platform that calls fsl_pci_init calls pci_setup_indirect before
it calls fsl_pci_init.  There isn't any reason to just call it from
fsl_pci_init and simplify things a bit.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-28 17:12:35 -05:00
Reinhard Arlt
c2e49f706b mpc83xx: Add esd VME8349 board support
This patch adds support for the esd VME8349 board equipped with the
MPC8349. It's a VME PMC carrier board equipped with the Tundra
TSI148 VME-bridge.

Signed-off-by: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-07-27 18:36:36 -05:00
Peter Tyser
2c7920afaf 83xx: Replace CONFIG_MPC83[0-9]X with MPC83[0-9]x
Use the standard lowercase "x" capitalization that other Freescale
architectures use for CPU defines to prevent confusion and errors

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-06-12 20:47:17 +02:00
Kumar Gala
c8514622e2 fsl_pci: Renamed immap_fsl_pci.h to fsl_pci.h
Rename the pci header for FSL HW so we can move some prototypes
in there and stop doing explicit externs

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-04-04 10:21:29 -05:00
Yoshihiro Shimoda
06b18163b5 sh: Add some register value configurable to PCI of SH7780
Some register value was hardcoded for System memory size 128MB and
memory offset 0x08000000. This patch fixed the problem.

Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2009-03-12 23:58:30 +09:00
Yoshihiro Shimoda
06e2735eb8 sh: Add system memory registration to PCI for SH4
It is necessary for some pci device driver.

Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2009-03-12 23:58:30 +09:00
Anton Vorontsov
cc2a8c7751 PCI: Add pci_last_busno() helper
This is just a handy routine that reports last PCI busno: we walk
down all the hoses and return last hose's last_busno.

Will be used by PCI/PCIe initialization code.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-02-23 15:51:10 -06:00
Becky Bruce
6e61fae4d3 drivers/pci: Create pci_map_bar function
It is no longer always true that the pci bus address can be
used as the virtual address for pci accesses.  pci_map_bar()
is created to return the virtual address for a pci region.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
2009-02-10 00:27:13 +01:00
Kumar Gala
2d43e873a2 pci: give preference to non-PCI_REGION_SYS_MEMORY regions when matching
When we search for an address match in pci_hose_{phys_to_bus,bus_to_phys}
we should give preference to memory regions that aren't system memory.

Its possible that we have over mapped system memory in the regions and
we want to avoid depending on the order of the regions.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-02-07 23:50:08 +01:00
Kumar Gala
ff4e66e93c pci: Rename PCI_REGION_MEMORY to PCI_REGION_SYS_MEMORY for clarity
The PCI_REGION_MEMORY and PCI_REGION_MEM are a bit to similar and
can be confusing when reading the code.

Rename PCI_REGION_MEMORY to PCI_REGION_SYS_MEMORY to clarify its used
for system memory mapping purposes.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-02-07 23:50:04 +01:00
Jean-Christophe PLAGNIOL-VILLARD
8cb79b5f27 ixp: move pci drivers to drivers/pci
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-01-31 10:16:01 +01:00
Peter Tyser
7a89795911 pci/fsl_pci_init: Enable inbound PCI config cycles
Add fsl_pci_config_unlock() function to enable a
PCI/PCIe interface configured in agent/endpoint mode to
respond to inbound PCI configuration cycles.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2008-12-19 18:10:45 -06:00
Jean-Christophe PLAGNIOL-VILLARD
a319f14962 sh: r2dplus fix register access
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-12-10 23:11:36 +09:00
Kumar Gala
4c253fdb2a drivers/fsl_pci_init: Fix compile warning
fsl_pci_init.c: In function 'fsl_pci_setup_inbound_windows':
fsl_pci_init.c:122: warning: comparison is always true due to limited range of data type

The check only makes sense if we are CONFIG_PHYS_64BIT

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-12-09 21:15:03 +01:00
Becky Bruce
35db1c6d34 drivers/fsl_pci_init: Fix inbound window mapping bug
The current code will cause the creation of a 4GB window
starting at 0 if we have more than 4GB of RAM installed,
which overlaps with PCI_MEM space and causes pci_bus_to_phys()
to return erroneous information. Limit the size to 4GB - 1;
which causes the code to create one 2GB and one 1GB window
instead.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Andy Fleming <afleming@freescale.com>
2008-12-03 22:48:50 -06:00
Becky Bruce
cd42516242 powerpc: fix pci window initialization to work with > 4GB DRAM
The existing code has a few errors that need to be fixed in
order to support large RAM sizes.  Fix those, and add a
comment to make it clearer.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
2008-10-27 16:27:58 -05:00
Kumar Gala
219542a1a6 pci/fsl_pci_init: Removed a bunch pointless trailing backslashes.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-10-27 16:26:07 -05:00
Kumar Gala
a2aab46072 pci/fsl_pci_init: Added fdt helper for setting up bus-ranges & dma-ranges
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
2008-10-24 17:35:08 -05:00
Kumar Gala
b9a1fa9787 pci/fsl_pci_init: Add a common PCI inbound setup function
Add a common setup function that determines the pci_region(s) based
on how much memory we have in the system.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
2008-10-24 17:35:05 -05:00
Kumar Gala
612ea01018 pci/fsl_pci_init: Enable larger address and setting inbound windows properly
* PCI Inbound window was setup incorrectly.  The PCI address and system
  address were swapped.  The PCI address should be setting piwar/piwbear
  and the system address should be setting pitar.

* Removed masking of addresses to allow for system address to support
  system address & PCI address >32-bits

* Set PIWBEAR & POTEAR to allow for full 64-bit PCI addresses

* Respect the PCI_REGION_PREFETCH for inbound windows

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
2008-10-24 17:35:02 -05:00
Kumar Gala
30e76d5e3b pci: Allow for PCI addresses to be 64-bit
PCI bus is inherently 64-bit.  While not all system require access to
the full 64-bit PCI address range some do.  This allows those systems
to enable the full PCI address width via CONFIG_SYS_PCI_64BIT.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
Acked-by: Wolfgang Denk <wd@denx.de>
2008-10-24 17:32:49 -05:00
Jean-Christophe PLAGNIOL-VILLARD
6d0f6bcf33 rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-10-18 21:54:03 +02:00
Ed Swarthout
6df0efd5c8 fsl_pci_init do not scan bus when configured as an end-point
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2008-10-13 22:55:40 +02:00
Nobuhiro Iwamatsu
b5d10a1352 sh: Fix compile warning
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-09-19 11:05:22 +09:00
Jean-Christophe PLAGNIOL-VILLARD
ab6878c7bc drivers/pci: Move conditional compilation to Makefile
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-08-13 01:40:40 +02:00
Nobuhiro Iwamatsu
d85f46a25c pci: sh: Add pci_skip_dev and pci_print_dev function
Add function of new PCI, pci_skip_dev and pci_print_dev.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-07-15 12:24:37 +09:00
Wolfgang Denk
d0ff51ba5d Code cleanup: fix old style assignment ambiguities like "=-" etc.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-14 15:19:07 +02:00
Stefan Roese
dc1da42f81 pci: Move PCI device configuration check into a separate weak function
This patch moves the check, if a device should be skipped in PCI PNP
configuration into the function pci_skip_dev(). This function is defined
as weak so that it can be overwritten by a platform specific one if
needed. The check if the device should get printed in the PCI summary upon
bootup (when CONFIG_PCI_SCAN_SHOW is defined) is moved to the function
pci_print_dev() which is also defined as weak too.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-10 10:10:32 +02:00
Gerald Van Baren
589c04271d Convert mpc7448hpc2 to CONFIG_OF_LIBFDT
This was configured to use the deprecated CONFIG_OF_FLAT_TREE, change
to CONFIG_OF_LIBFDT.

WARNING: This conversion is untested because I do not have a board to
test it on.

NOTE: The FDT blob (DTS) must have an /aliases/ethernet0 and (optionally)
/aliases/ethernet1 property for the ethernet to work.

Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
2008-06-09 21:13:24 -04:00
Wolfgang Denk
53677ef18e Big white-space cleanup.
This commit gets rid of a huge amount of silly white-space issues.
Especially, all sequences of SPACEs followed by TAB characters get
removed (unless they appear in print statements).

Also remove all embedded "vim:" and "vi:" statements which hide
indentation problems.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-05-21 00:14:08 +02:00
Wolfgang Denk
65dcfa7920 Revert "pci: Add CONFIG_PCI_SKIP_HOST_BRIDGE config option"
This reverts commit 55774b512f
which broke many PowerPC boards.
2008-05-12 01:11:21 +02:00
Becky Bruce
36f32675f4 Update pci code to use phys_addr_t
Physical addrs need to be represented by phys_addr_t, not
unsigned long.  Otherwise, systems that use CONFIG_PHYS_64BIT
are going to fail mightily.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-05-10 00:59:57 +02:00
Kumar Gala
876b8f9789 fsl_pci: Only modify registers if we have them
pme_msg_det exists only on PCIe controllers only set it if we are a "bridge".

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-04-24 14:20:12 +02:00
TsiChung Liew
f33fca22e7 Update CONFIG_PCIAUTO_SKIP_HOST_BRIDGE to related boards
Remove test for CONFIG_MPC5200 in drivers/pci/pci_auto.c and define
CONFIG_PCIAUTO_SKIP_HOST_BRIDGE in related board configuration files.

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-04-13 18:03:29 -07:00
Nobuhiro Iwamatsu
28e5efde4d sh: Add support PCI host driver for SH7751/SH7751R
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-03-28 14:16:13 +09:00
Nobuhiro Iwamatsu
ab8f4d40d0 sh: Move SuperH PCI driver from cpu/sh4 to drivers/pci
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2008-03-28 14:16:13 +09:00
Nobuhiro Iwamatsu
55774b512f pci: Add CONFIG_PCI_SKIP_HOST_BRIDGE config option
In current source code, when the device number of PCI is 0, process PCI
bridge without fail. However, when the device number is 0, it is not PCI
always bridge. There are times when device of PCI allocates.

When CONFIG_PCI_SKIP_HOST_BRIDGE is enable, this problem is solved when
use this patch.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Stefan Roese <sr@denx.de>
2008-03-23 01:38:22 +01:00
Kumar Gala
8ff3de61fc Handle MPC85xx PCIe reset errata (PCI-Ex 38)
On the MPC85xx boards that have PCIe enable the PCIe errata fix.
(MPC8544DS, MPC8548CDS, MPC8568MDS).

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-12-11 22:34:20 -06:00
Jean-Christophe PLAGNIOL-VILLARD
93a686ee9c drivers/pci : move pci drivers to drivers/pci
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2007-11-24 20:35:55 +01:00