Commit graph

391 commits

Author SHA1 Message Date
Nandor Han
c74675bd90 reboot-mode: read the boot mode from RTC memory
RTC devices could provide battery-backed memory that can be used for
storing the reboot mode magic value.

Add a new reboot-mode back-end that uses RTC to store the reboot-mode
magic value. The driver also supports both endianness modes.

Signed-off-by: Nandor Han <nandor.han@vaisala.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-07-23 10:16:39 -04:00
Nandor Han
f9db2f16cb reboot-mode: read the boot mode from GPIOs status
A use case for controlling the boot mode is when the user wants
to control the device boot by pushing a button without needing to
go in user-space.

Add a new backed for reboot mode where GPIOs are used to control the
reboot-mode. The driver is able to scan a predefined list of GPIOs
and return the magic value. Having the modes associated with
the magic value generated based on the GPIO values, allows the
reboot mode uclass to select the proper mode.

Signed-off-by: Nandor Han <nandor.han@vaisala.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-07-23 10:16:39 -04:00
Simon Glass
f5cbb5c7cd x86: pci: Allow binding of some devices before relocation
At present only bridge devices are bound before relocation, to save space
in pre-relocation memory. In some cases we do actually want to bind a
device, e.g. because it provides the console UART. Add a devicetree
binding to support this.

Use the PCI_VENDEV() macro to encode the cell value. This is present in
U-Boot but not used, so move it to the binding header-file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-07-15 19:49:50 +08:00
Vignesh Raghavendra
5d5a699855 firmware: ti_sci: Add support for Resoure Management at R5 SPL stage.
On J721e and J7200, MCU R5 core (boot master) itself would run Device
Manager (DM) Firmware and interact with TI Foundational Security (TIFS)
firmware to enable DMA and such other Resource Management (RM) services.
So, during R5 SPL stage there is no such RM service available and ti_sci
driver will have to directly interact with TIFS using DM to DMSC
channels to request RM resources.

Therefore add DT binding and driver for the same. This driver will
handle Resource Management services at R5 SPL stage.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210607141753.28796-4-vigneshr@ti.com
2021-06-11 19:18:52 +05:30
Dave Gerlach
760b7488f5 dt-bindings: memory-controller: Add K3 AM64 DDRSS compatible
Update the k3-ddrss DT binding document to include compatible
for k3,am64-ddrss.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12 16:30:52 +05:30
Sean Anderson
54aa07fdfc sysinfo: Add gpio-sysinfo driver
This uses the newly-added dm_gpio_get_values_as_int_base3 function to
implement a sysinfo device. The revision map is stored in the device tree.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-04 07:57:18 -04:00
Igal Liberman
75ae51c593 doc: dt-bindings: add Marvell comphy binding
Change-Id: I29094afb646744afe78ad09bb7479894d1a65e96
Signed-off-by: Igal Liberman <igall@marvell.com>
2021-04-29 07:45:24 +02:00
Ying-Chun Liu (PaulLiu)
a606106402 doc: device-tree-bindings: regulator: anatop regulator
Document the bindings for fsl,anatop-regulator

Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-04-20 07:31:12 -04:00
Tom Rini
45b3cf88da Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
update ls1028aqds networking protocol, config in ls1021atwr, env in ls1012a
Add seli3 board support, booke watchdog, update eTSEC support in ppc-qemu
Add DM_SERIAL and lpuart in sl28, add DM_ETH support for some of powerpc platforms

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15 13:11:19 -04:00
Bin Meng
05153702d3 dt-bindings: net: Update Freescale TSEC to support "queue-group"
At present the Freescale TSEC node DT bindings doc requires a <reg>
property in the TSEC node. But this might not always be the case.
In the upstream Linux kernel, there is no DT bindings doc for it
but the kernel driver tests a subnode of a name prefixed with
"queue-group", as we can see from gfar_of_init():

  for_each_available_child_of_node(np, child) {
      if (!of_node_name_eq(child, "queue-group"))
  ...

in drivers/net/ethernet/freescale/gianfar.c

Update our DT bindings to describe this alternate description.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15 14:22:17 +05:30
Bin Meng
1c196b308a dt-bindings: net: Add the old DT bindings for "fixed-link"
Per the upstream Linux kernel doc:

  Documentation/devicetree/bindings/net/ethernet-controller.yaml

There are two ways to describe a fixed PHY attached to an Ethernet
device. This updates our dt-bindings doc to add the old DT bindings.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-15 14:22:17 +05:30
Wolfgang Wallner
da35d7af33 dt-bindings: fsp: Fix Apollo Lake FSP-S devicetree bindings
An entry is missing in the FSP-S devicetree bindings, and as a result
the description for the next few following entries is off by one line.

Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-04-15 10:43:17 +08:00
Etienne Carriere
1f213ee4db firmware: scmi: voltage regulator
Implement voltage regulators interfaced by the SCMI voltage domain
protocol. The DT bindings are defined in the Linux kernel since
SCMI voltage domain and regulators patches [1] and [2] integration
in v5.11-rc7.

Link: [1] 0f80fcec08
Link: [2] 2add5cacff
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-04-12 17:17:11 -04:00
Alper Nebi Yasak
1b9ee2882e pwm: Add a driver for Chrome OS EC PWM
This PWM is used in rk3399-gru-bob and rk3399-gru-kevin to control
the display brightness. We can only change the duty cycle, so on
set_config() we just try to match the duty cycle that dividing duty_ns
by period_ns gives us. To disable, we set the duty cycle to zero while
keeping the old value for when we want to re-enable it.

The cros_ec_set_pwm_duty() function is taken from Depthcharge's
cros_ec_set_bl_pwm_duty() but modified to use the generic pwm type.
The driver itself is very loosely based on rk_pwm.c for the general pwm
driver structure.

The devicetree binding file is from Linux, before it was converted to
YAML at 5df5a577a6b4 ("dt-bindings: pwm: Convert google,cros-ec-pwm.txt
to YAML format") in their repo.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-04-10 16:08:39 +02:00
Tom Rini
7d23eb9260 First set of u-boot-atmel features for 2021.07 cycle
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Merge tag 'u-boot-atmel-2021.07-a' of https://source.denx.de/u-boot/custodians/u-boot-atmel into next

First set of u-boot-atmel features for 2021.07 cycle:
This small feature set includes the implementation of the slew rate for
the PIO4 pin controller device, and a fix for arm926ejs-based
microprocessors that avoids a crash.
2021-03-30 11:24:09 -04:00
Simon Glass
80a4570c99 x86: coral: Show memory config and SKU ID on startup
Provide the model information through sysinfo so that it shows up on
boot. For memconfig 4 pins are provided, for 16 combinations. For SKU
ID there are two options:

   - two pins provided in a ternary arrangement, for 9 combinations.
   - reading from the EC

Add a binding doc and drop the unused #defines as well.

Example:

   U-Boot 2021.01-rc5

   CPU:   Intel(R) Celeron(R) CPU N3450 @ 1.10GHz
   DRAM:  3.9 GiB
   MMC:   sdmmc@1b,0: 1, emmc@1c,0: 2
   Video: 1024x768x32 @ b0000000
   Model: Google Coral (memconfig 5, SKU 3)

This depends on the GPIO series:

   http://patchwork.ozlabs.org/project/uboot/list/?series=228126

Signed-off-by: Simon Glass <sjg@chromium.org>

Acked-by: Bin Meng <bmeng.cn@gmail.com>
2021-03-27 16:26:48 +13:00
Claudiu Beznea
f031bb304d dt-bindings: pinctrl: at91-pio4: add slew-rate
Document slew-rate DT binding for SAMA7G5.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-03-02 09:28:33 +02:00
Marek Szyprowski
e1b03d6b0b dt-bindings: input: adc-keys bindings documentation
Dump adc-keys bindings documentation from Linux kernel source tree from
commit 698dc0cf9447 ("dt-bindings: input: adc-keys: clarify
description").

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-02-18 11:37:26 +01:00
Chunfeng Yun
eb885c98ed dt-bindings: usb: mtk-xhci: add optional properies to disable ports
Add optional properies to disable usb2 or usb3 ports, they are used
when provided ports are not used on some special platforms.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
2021-02-10 22:23:24 +01:00
Suman Anna
468ec2f3ef remoteproc: k3_r5: Sync to upstreamed kernel DT property names
The K3 R5F remoteproc driver in U-Boot was upstreamed prior to the
equivalent remoteproc driver in the Linux kernel. Some of the DT
properties used in U-Boot got upstreamed using different names
in Linux kernel.

The modified property names include the R5F cluster mode configuration
property "lockstep-mode"; and three different individual R5F core config
properties - "atcm-enable", "btcm-enable" and "loczrama". The property
names were updated as follows:
  lockstep-mode => ti,cluster-mode
  atcm-enable   => ti,atcm-enable
  btcm-enable   => ti,btcm-enable
  loczrama      => ti,loczrama

Update the K3 R5F remoteproc driver, the corresponding binding, and
all the existing usage in AM65x, J721E and J7200 dts files all at
once to use the new properties and to not break any bisectability.

Signed-off-by: Suman Anna <s-anna@ti.com>
2021-02-04 20:37:56 +05:30
Ying-Chun Liu (PaulLiu)
e89ef172f8 doc: device-tree-bindings: rtc: Abracon AB x80x i2c rtc
Document the bindings for abracon,abx80x and related compatibles.

Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
2021-01-27 17:07:48 -05:00
Eugen Hristev
63c27c3e66 dt-bindings: pinctrl: at91-pio4: add property for drive strength
Add drive strength property which is equivalent with the one in Linux

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-22 15:09:59 +02:00
Vikhyat Goyal
1ac1a04b9e video: seps525: Add dt binding description
Added dt binding for seps525 display driver.

Signed-off-by: Vikhyat Goyal <vikhyat.goyal@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-05 11:54:53 +01:00
Sean Anderson
0d98f6de62 spi: dw: Document devicetree binding
This documentation has been taken from Linux commit 3d7db0f11c7a ("spi: dw:
Refactor mid_spi_dma_setup() to separate DMA and IRQ config"), immediately
before the file was deleted and replaced with a yaml version. Additional
compatible strings from newer versions have been added, as well as a few
U-Boot-specific ones.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-12-18 16:16:37 +05:30
Patrick Delaunay
c480138958 phy: stm32: usbphyc: manage optional vbus regulator on phy_power_on/off
This patch adds support for optional vbus regulator.
It is managed on phy_power_on/off calls and may be needed for host mode.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-11-25 12:02:58 +01:00
Sean Anderson
6e35c1cb12 pinctrl: k210: Rename power domains to match datasheet
This renames power domains to match the names on the k210 datasheet.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reported-by: Damien Le Moal <Damien.LeMoal@wdc.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2020-11-17 15:09:28 +08:00
Simon Glass
f969653154 smbios: Add documentation and devicetree binding
Add information about how to set SMBIOS properties using the devicetree.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 10:18:20 +08:00
Simon Glass
49337238ef doc: Add a binding for sysinfo
Add a simple binding file for this, so that it is clear what this binding
directory is for.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 10:18:20 +08:00
Simon Glass
3a8ee3df83 board: Rename uclass to sysinfo
This uclass is intended to provide a way to obtain information about a
U-Boot board. But the concept of a U-Boot 'board' is the whole system,
not just one circuit board, meaning that 'board' is something of a
misnomer for this uclass.

In addition, the name 'board' is a bit overused in U-Boot and we want to
use the same uclass to provide SMBIOS information.

The obvious name is 'system' but that is so vague as to be meaningless.
Use 'sysinfo' instead, since this uclass is aimed at providing information
on the system.

Rename everything accordingly.

Note: Due to the patch delta caused by the symbol renames, this patch
shows some renamed files as being deleted in one place and created in
another.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06 10:18:20 +08:00
Robert Marko
367ea426a5 spi: Add Qualcomm QUP SPI controller driver
This patch adds support for the Qualcomm QUP SPI controller that is commonly found in most of Qualcomm SoC-s.

Driver currently supports v1.1.1, v2.1.1 and v2.2.1 HW.
FIFO and Block modes are supported, no support for DMA mode is planned.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2020-10-22 09:54:54 -04:00
Chunfeng Yun
78fe97b96e dt-bindings: usb: mtu3: add bindings for MediaTek USB3 DRD
Add dt-binding for MediaTek USB3 DRD Driver which it's ported
from the Linux kernel DTS binding:
Documentation/devicetree/bindings/usb/mediatek,mtu3.txt
Commit ID:
34d0545978b6 ("dt-bindings: usb: mtu3: fix typo of DMA clock name")

Due to Dual-Role switch is not supported in Uboot, some properties
are removed or changed.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-10-20 00:49:05 +02:00
Chunfeng Yun
8faef3c756 dt-binding: usb: add bindings for some common properties
Add bindings for common properties, include maximum-speed,
dr_mode and phy_type

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-10-20 00:49:05 +02:00
Sean Anderson
7224d5ccf8 pinctrl: Add support for Kendryte K210 FPIOA
The Fully-Programmable Input/Output Array (FPIOA) device controls pin
multiplexing on the K210. The FPIOA can remap any supported function to any
multifunctional IO pin. It can also perform basic GPIO functions, such as
reading the current value of a pin. However, GPIO functionality remains
largely unimplemented (in favor of the dedicated GPIO peripherals).

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-08 11:42:36 -04:00
Sean Anderson
9c08fbfc95 pinctrl: Add pinmux property support to pinctrl-generic
The pinmux property allows for smaller and more compact device trees,
especially when there are many pins which need to be assigned individually.
Instead of specifying an array of strings to be parsed as pins and a
function property, the pinmux property contains an array of integers
representing pinmux groups. A pinmux group consists of the pin identifier
and mux settings represented as a single integer or an array of integers.
Each individual pin controller driver specifies the exact format of a
pinmux group. As specified in the Linux documentation, a pinmux group may
be multiple integers long. However, no existing drivers use multi-integer
pinmux groups, so I have chosen to omit this feature. This makes the
implementation easier, since there is no need to allocate a buffer to do
endian conversions.

Support for the pinmux property is done differently than in Linux.  As far
as I can tell, inversion of control is used when implementing support for
the pins and groups properties to avoid allocating. This results in some
duplication of effort; every property in a config node is parsed once for
each pin in that node. This is not such an overhead with pins and groups
properties, since having multiple pins in one config node does not occur
especially often. However, the semantics of the pinmux property make such a
configuration much more appealing. A future patch could parse all config
properties at once and store them in an array. This would make it easier to
create drivers which do not function solely as callbacks from
pinctrl-generic.

This commit increases the size of the sandbox build by approximately 48
bytes.  However, it also decreases the size of the K210 device tree by 2
KiB from the previous version of this series.

The documentation has been updated from the last Linux commit before it was
split off into yaml files.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-08 11:42:36 -04:00
Etienne Carriere
4e5ce7ecd3 dt-bindings: arm: SCMI bindings documentation
Dump SCMI DT bindings documentation from Linux kernel source
tree v5.8-rc1.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-09-30 11:55:23 -04:00
Simon Glass
70c202c480 x86: Add a way to add to the e820 memory table
Some boards want to reserve extra regions of memory. Add a 'chosen'
property to support this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-25 11:27:25 +08:00
Simon Glass
e4f09f97c9 x86: Add wake sources for the acpi_gpe driver
Some devices can wake the system from sleep, e.g opening the lid on a
clamshell or moving a USB mouse.

Add a wake to specify this for USB devices and add the settings for Apollo
Lake.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25 11:27:15 +08:00
Simon Glass
fd42f263ce i2c: Add a generic driver to generate ACPI info
Many I2C devices produce roughly the same ACPI data with just things like
the GPIO/interrupt information being different.

This can be handled by a generic driver along with some information in the
device tree.

Add a generic i2c driver for this purpose.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
2020-09-25 11:27:15 +08:00
Hou Zhiqiang
7fb568de53 net: tsec: Add the compatible string "gianfar" support
Add compatible string "gianfar" support and update the
device-tree-bindings doc.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24 08:27:44 -04:00
Tom Rini
751b18b8a1 Merge branch 'master' into next
Merge in v2020.10-rc5
2020-09-21 14:25:37 -04:00
Wolfgang Wallner
674c58c7b7 x86: fsp: Replace e-mmc with emmc in devicetree bindings
The term eMMC is used inconsistently within the FSP devicetree
bindings (e-mmc and emmc), especially for "emmc-host-max-speed"
documentation and code disagree.

Change all eMMC instances within the FSP bindings to consistently
use "emmc". The term "emmc" is already used a lot within U-Boot,
while "e-mmc" is only used in the FSP bindings.

Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: correct one typo in the commit message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-21 16:41:35 +08:00
Heiko Schocher
6e31c62a17 net, qe: add DM support for QE UEC ethernet
add DM/DTS support for the UEC ethernet on QUICC Engine
Block.

Signed-off-by: Heiko Schocher <hs@denx.de>
Patch-cc: Mario Six <mario.six@gdsys.cc>
Patch-cc: Qiang Zhao <qiang.zhao@nxp.com>
Patch-cc: Holger Brunck <holger.brunck@hitachi-powergrids.com>
Patch-cc: Madalin Bucur <madalin.bucur@oss.nxp.com>

Series-changes: 3
- revert:
  commit "3374264df97b" ("drivers: net: qe: deselect QE when DM_ETH is enabled")
  as now qe works with DM and DM_ETH support.
- fix mailaddress from Holger

Series-changes: 2
- add comments from Qiang Zhao:
  - add device node documentation
  - I did not drop the dm_qe_uec_phy.c and use drivers/net/fsl_mdio.c
    because using drivers/net/fsl_mdio.c leads in none existent
    udevice mdio@3320
    instead boards with DM ETH support should use now this
    driver.
- remove RFC tag

Commit-notes:

- I let the old none DM based implementation in code
  so boards should work with old implementation.
  This Code should be removed if all boards are converted
  to DM/DTS.

- add the DM based qe uec driver under drivers/net/qe

- Therefore copied the files uccf.c uccf.h uec.h from
  drivers/qe. So there are a lot of Codingstyle problems
  currently. I fix them in next version if this RFC
  patch is OK or it needs some changes.

- The dm based driver code is now under drivers/net/qe/dm_qe_uec.c
  Used a lot of functions from drivers/qe/uec.c

- seperated the PHY specific code into seperate file
  drivers/net/qe/dm_qe_uec_phy.c

END
2020-09-17 06:09:53 +02:00
Suman Anna
ca569e9bbe dt-bindings: remoteproc: k3-r5f: Update bindings for J7200 SoCs
The K3 J7200 SoCs have two dual-core Arm R5F clusters/subsystems, with
2 R5F cores each, one in each of the MCU and MAIN voltage domains.

These clusters are a revised version compared to those present on
J721E SoCs. Update the K3 R5F remoteproc bindings with the compatible
info relevant to these R5F clusters/subsystems on K3 J7200 SoCs.

Signed-off-by: Suman Anna <s-anna@ti.com>
2020-09-15 18:51:53 +05:30
Bernhard Messerklinger
a0186110af arch: x86: apl: Update FSP parameters
Add missing parameters to support full configuration of the latest FSP
MR6 release.

Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-03 10:46:56 +08:00
Stefan Bosch
8d393b2c22 pinctrl: add nexell driver
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- livetree API (dev_read_...) is used instead of fdt one (fdt...).
- doc/device-tree-bindings/pinctrl/nexell,s5pxx18-pinctrl.txt added.

Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
2020-07-29 08:43:40 -04:00
Stefan Bosch
c25e9e04a1 i2c: add nexell driver
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- i2c/nx_i2c.c: Some adaptions mainly because of changes in
  "struct udevice".
- several Bugfixes in nx_i2c.c.
- the driver has been for s5p6818 only. Code extended appropriately
  in order s5p4418 is also working.
- "probe_chip" added.
- pinctrl-driver/dt is used instead of configuring the i2c I/O-pins
  in the i2c-driver.
- '#ifdef CONFIG...' changed to 'if (IS_ENABLED(CONFIG...))' where
  possible (and similar).
- livetree API (dev_read_...) is used instead of fdt one (fdt...).

Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
2020-07-29 08:43:40 -04:00
Robert Marko
0c7eb6e525 msm_gpio: Add support for Qualcomm IPQ40xx
Snapdragon SoCs and IPQ40xx use common TLMM IP,
so existing driver supports IPQ40xx as well.

So lets simply add a compatible for IPQ40xx.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
2020-07-29 08:43:40 -04:00
Robert Marko
185dcf7f56 msm_serial: Read bit rate register value from DT
IPQ40xx and currently supported Snapdragon boards don't use the same one
so enable reading it from DT, if no DT property is found default value
is the same as the previous define.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
2020-07-29 08:43:40 -04:00
Vladimir Oltean
e7005b3e80 fsl_dspi: Introduce DT bindings for CS-SCK and SCK-CS delays
Communication with some SPI slaves just won't cut it if these delays
(before the beginning, and after the end of a transfer) are not added to
the Chip Select signal.

These are a straight copy from Linux:
Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt
drivers/spi/spi-fsl-dspi.c

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:26 +05:30
Simon Glass
54bcca2973 sound: Add an ACPI driver for Maxim MAX98357ac
This chip is used on coral and we need to generate ACPI tables for sound
to make it work. Add a driver that does just this (i.e. at present does
not actually support playing sound).

Signed-off-by: Simon Glass <sjg@chromium.org>
[bmeng: Use the correct acpi_irq_polarity enum number]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17 14:32:24 +08:00