Commit graph

51023 commits

Author SHA1 Message Date
Lukasz Majewski
ea4584d73d display5: ddr: Enable support for DDR3 auto calibration
This code performs DDR3 memory calibration for display5 board.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-06-18 15:44:21 +02:00
Lukasz Majewski
b5f4543c92 display5: config: Update swupdate initramfs file name (now supporting ext4)
After moving to swupdate 2017.07, the default fs for swupdate rootfs
is ext4, not ext3.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-06-18 15:44:21 +02:00
Lukasz Majewski
18ccca59e3 display5: config: factory: Update BACKUP rootfs in factory mode
After splitting rootfs images to BACKUP and ACTIVE, the "factory"
u-boot also needs to update the former.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-06-18 15:44:21 +02:00
Lukasz Majewski
dd4ed88bf1 display5: config: Provide 'tftp_mmc_rootfs_bkp' command to write BACKUP rootfs
Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-06-18 15:44:21 +02:00
Lukasz Majewski
76d1d169f3 display5: wdt: Enable WDT support (both SPL and u-boot)
Test case:

The fitImage gets corrupted:

truncate -c -s 3M fitImage
run tftp_mmc_fitImg
setenv boot_os y
reset

[board shall hang in SPL with
"Trying to boot from MMC1" information]

Then after X seconds WDT is causing board to reset. After N boot attempts
we enter recovery mode.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-06-18 15:44:21 +02:00
Lukasz Majewski
27aede24bc display5: Support for the emergency PAD pressing
To enter the special mode, one needs to short cut two pads with e.g. screw
driver.

After power up the SPL will execute u-boot in which proper actions will be
taken.

It is worth noting that we do not alter envs (even the BOOT_FROM variable)
and unconditionally go to recovery.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-06-18 15:42:38 +02:00
Lukasz Majewski
cf74e0a96b display5: config: factory: Extend mtdparts to support LEG factory partition
This special partition has been added solely for production purpose.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-06-18 15:42:38 +02:00
Lukasz Majewski
1fa328f73a display5: config: Update SPI-NOR partition for larger swupdate-initramfs
The SPI-NOR partition information has been updated to store
swupdate-kernel-FIT just after envs as well as two times larger
swupdate-initramfs image.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-06-18 15:42:38 +02:00
Lukasz Majewski
b78e9c4f1e display5: config: Remove support for Linux initramfs recovery image boot
This is a prerequisite patch to combine SWUpdate and Linux recovery
initramfs images.

It removes the support for it.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-06-18 15:42:38 +02:00
Lukasz Majewski
1bcbf48f18 display5: config: Reset the board when bootm fails
Since display5 is now supporting boot counting, we can just reset the
board when bootm fails (i.e. it doesn't boot the fitImage kernel for
any reason).

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-06-18 15:42:38 +02:00
Lukasz Majewski
e087905a48 display5: spl: Check return code of the env_* functions
Force booting through u-boot proper when environment error encountered
(as a result of either broken SPI-NOR or erased envs).

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-06-18 15:42:38 +02:00
Lukasz Majewski
2f4372a101 display5: config: Provide command to flash the whole SPI-NOR memory
It may be necessary to update the content of the whole SPI-NOR memory at
once with using a single command (tftp_sf_img).

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-06-18 15:42:38 +02:00
Lukasz Majewski
86d759ea3c display5: config: Add "factory" (1MiB) SPI-NOR partition in u-boot
To test if this partition is present - one needs to write:
display5 > sf probe; mtdparts
display5 > sf erase factory +0x100000

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-06-18 15:42:38 +02:00
Lukasz Majewski
4864ba7f4a display5: config: factory: Setup IP config data according to LEG production setup
Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-06-18 15:42:38 +02:00
Lukasz Majewski
13e012f7b5 display5: factory: Add support for BOOT_FROM = FACTORY switch
When BOOT_FROM = FACTORY, then the LEG's factory setup is performed.

This code relies on boot_nfs u-boot command, so it shall be adjusted
appropriately (e.g. provide proper fitImage file).

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-06-18 15:42:38 +02:00
Bin Meng
0102023966 x86: efi: app: Display correct CPU info during boot
Currently when EFI application boots, it says:

  CPU: x86_64, vendor <invalid cpu vendor>, device 0h

Fix this by calling x86_cpu_init_f() in arch_cpu_init().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-17 21:16:04 +08:00
Bin Meng
3ebd892fda x86: Rename efi-x86 target to efi-x86_app
To avoid confusion, let's rename the efi-x86 target to efi-x86_app.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-17 21:16:04 +08:00
Bin Meng
d441ec8298 x86: efi: payload: Add EFI framebuffer driver support
This turns on the EFI framebuffer driver support so that a graphics
console can be of additional help.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-17 21:16:04 +08:00
Bin Meng
4a08c74697 dm: video: Add an EFI framebuffer driver
This adds a DM video driver for U-Boot as the EFI payload. The driver
makes use of all necessary information from the passed EFI GOP info
to create a linear framebuffer device, as if it were initialized by
U-Boot itself.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2018-06-17 21:16:04 +08:00
Bin Meng
d1fe992746 efi: stub: Pass EFI GOP information to U-Boot payload
If UEFI BIOS has the graphics output protocol (GOP), let's pass its
information to U-Boot payload so that U-Boot can utilize it (eg:
an EFI framebuffer driver).

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-17 21:16:04 +08:00
Bin Meng
252d41f1ae x86: baytrail: Drop EFI-specific test logics
Now that we have generic EFI payload support, drop EFI-specific test
logics in BayTrail Kconfig and codes, and all BayTrail boards too.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-17 21:16:04 +08:00
Bin Meng
93c7b879c7 x86: Drop QEMU-specific EFI payload support
Now that we have generic EFI payload support for all x86 boards,
drop the QEMU-specific one.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-17 21:16:04 +08:00
Bin Meng
32151d4017 x86: Add generic EFI payload support
It is possible to create a generic EFI payload for all x86 boards.
The payload is configured to include as many generic drivers as
possible. All stuff that touches low-level initialization are not
allowed as such is the EFI BIOS's responsibility. Platform specific
drivers (like gpio, spi, etc) are not included.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-17 21:16:04 +08:00
Bin Meng
3773c6a20a x86: efi: payload: Add arch_cpu_init()
This adds arch_cpu_init() to the payload codes, in preparation for
supporting a generic efi payload.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-17 21:16:04 +08:00
Bin Meng
4f1dacd43f x86: efi: Refactor the directory of EFI app and payload support
At present the EFI application and payload support codes in the x86
directory is distributed in a hybrid way. For example, the Kconfig
options for both app and payload are in arch/x86/lib/efi/Kconfig,
but the source codes in the same directory get built only for
CONFIG_EFI_STUB.

This refactors the codes by consolidating all the EFI support codes
into arch/x86/cpu/efi, just like other x86 targets.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-17 21:16:04 +08:00
Bin Meng
9efeb3f4db x86: doc: Fix reference to EFI doc in U-Boot
Since commit f3b5056c4e ("efi_loader: split README.efi into two
separate documents"), the original README.efi was renamed to
README.u-boot_on_efi, but x86 doc still refers to the old one.

This updates the x86 doc to reference both README.u-boot_on_efi and
README.uefi.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2018-06-17 21:16:04 +08:00
Ivan Gorinov
9f0b0113c9 x86: use EFI calling convention for efi_main on x86_64
UEFI specifies the calling convention used in Microsoft compilers;
first arguments of a function are passed in (%rcx, %rdx, %r8, %r9).

All other compilers use System V ABI by default, passing first integer
arguments of a function in (%rdi, %rsi, %rdx, %rcx, %r8, %r9).

These ABI also specify different sets of registers that must be preserved
across function calls (callee-saved).

GCC allows using the Microsoft calling convention by adding the ms_abi
attribute to a function declaration.

Current EFI implementation in U-Boot specifies EFIAPI for efi_main()
in the test apps but uses default calling convention in lib/efi.

Save efi_main() arguments in the startup code on x86_64;
use EFI calling convention for _relocate() on x86_64;
consistently use EFI calling convention for efi_main() everywhere.

Signed-off-by: Ivan Gorinov <ivan.gorinov@intel.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2018-06-17 21:16:04 +08:00
Bin Meng
e3ec0d03bb x86: cherryhill: Fix DTC warning
Fix warning when compiling cherryhill.dts with latest DTC:

  "Warning (avoid_unnecessary_addr_size): /pci/pch@1f,0: unnecessary
   #address-cells/#size-cells without "ranges" or child "reg" property"

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-17 21:16:04 +08:00
Tom Rini
103c45fb0d Merge branch 'master' of git://git.denx.de/u-boot-sh 2018-06-17 09:09:40 -04:00
Tom Rini
a715415bb5 Merge branch 'master' of git://git.denx.de/u-boot-usb 2018-06-16 00:07:37 -04:00
Marek Vasut
891bf67611 ARM: rmobile: Disable 4k SF sectors on V3M Eagle
The V3M Eagle uses flash with 128 kiB or 256 kiB sectors,
disable the 4k sector support.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-16 04:27:28 +02:00
Marek Vasut
75b573fe23 ARM: rmobile: Enable cache command on V3M Eagle
Turning the cache off can help when experimenting with bare metal
applications, enable the cache command on V3M Eagle to make that
easier.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-16 04:27:28 +02:00
Marek Vasut
c267952c41 ARM: rmobile: Fix CPGW address on V3M Eagle
Fix the CPGWPR/CPGWPCR register address on V3M Eagle to unlock
access to the CPG clock control registers.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-16 04:27:28 +02:00
Marek Vasut
6d82ed8d37 ARM: dts: rmobile: Add AVB PHY reset on V3M Eagle
Add EtherAVB PHY reset on V3M Eagle to let the AVB driver unreset the PHY.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-16 04:27:28 +02:00
Marek Vasut
29904b923e ARM: dts: rmobile: Add AVB pinmux on V3M Eagle
Add EtherAVB pinmux node on V3M Eagle to set the pinmux configuration.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-16 04:27:28 +02:00
Marek Vasut
bc19d28e6d ARM: dts: rmobile: Enable SDHI on E3 Ebisu
Enable SDHI on R8A77990 E3 Ebisu in DT.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-16 02:17:57 +02:00
Marek Vasut
ef6765ca62 ARM: dts: rmobile: Add initial SDHI nodes to R8A77990 E3
Add SDHI nodes to R8A77990 E3 SoC to allow SDHI operation.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-16 02:17:57 +02:00
Marek Vasut
65dcc809cd ARM: dts: rmobile: Add SCIF2 pinmux to E3 Ebisu
Add SCIF2 pinmux nodes to R8A77990 E3 Ebisu.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-16 02:17:57 +02:00
Marek Vasut
e183a6c7f2 ARM: dts: rmobile: Add Renesas RPC HF/QSPI DT node to R8A77990
Add device tree nodes for the Renesas RPC HF/QSPI controller
to R8A77990 E3.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-16 02:17:57 +02:00
Marek Vasut
c599de372f ARM: rmobile: Enable RPCHF on Draak
Enable the Renesas RPC HF driver on R8A77995 D3 Draak.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-06-16 02:17:57 +02:00
Marek Vasut
b08a704ddc ARM: rmobile: Fix environment placement on Draak
The environment on Draak is in the eMMC, card 0, place it so.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-06-16 02:17:57 +02:00
Tom Rini
f58e779513 Merge tag 'arc-updates-for-2018.07-rc2' of git://git.denx.de/u-boot-arc
Here we just add a tool for HSDK flashable images preparation
together with extensive documentation for HSDK board.

This will help real-life users to update U-Boot on the board.
2018-06-15 09:38:16 -04:00
Tom Rini
d94e89c765 Xilinx fixes for v2018.07-rc2
Zynq:
 - Fix missing watchdog header
 - DT fixes
 
 ZynqMP:
 - emmc configuration split
 - Enable SPD
 - Fix PMUFW_INIT_FILE logic
 - Coverity fixes in SoC code
 
 timer
 - Add timer_get_boot_us
 
 mmc:
 - Fix MMC HS200 tuning command
 
 serial:
 - Fix scrabled chars with OF_LIVE
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iEYEABECAAYFAlsjtcIACgkQykllyylKDCGNTQCfWd8tBRB0MiQqJpv9VP9A4VJO
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 =Ee+O
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Merge tag 'xilinx-for-v2018.07-rc2' of git://git.denx.de/u-boot-microblaze

Xilinx fixes for v2018.07-rc2

Zynq:
- Fix missing watchdog header
- DT fixes

ZynqMP:
- emmc configuration split
- Enable SPD
- Fix PMUFW_INIT_FILE logic
- Coverity fixes in SoC code

timer
- Add timer_get_boot_us

mmc:
- Fix MMC HS200 tuning command

serial:
- Fix scrabled chars with OF_LIVE
2018-06-15 09:38:06 -04:00
Alexey Brodkin
3b4410dde3 ARC: HSDK: Add readme
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-06-15 15:54:43 +03:00
Eugeniy Paltsev
9ddcfef6d4 ARC: HSDK: Add tool and make target to generate bsp
HSDK board has preloader that reads SPI flash pages and searches
for a special image header to fetch and load binary.

Add tool, make target (bsp-generate) to generate
update script and u-boot binary image with header for preloader.

Also add script to default environment to apply updates.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-06-15 15:54:43 +03:00
Michal Simek
b729ed0d95 serial: zynq: Make zynq_serial_setbrg static
This function is used only inside this driver that's why should be
static.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-15 08:54:05 +02:00
Michal Simek
a673025535 serial: zynq: Initialize uart only before relocation
This issue was found when OF_LIVE was enabled that there are scrambled
chars on the console like this:
Chip ID:	zu3eg
Watchdog: Started��j�   sdhci@ff160000: 0, sdhci@ff170000: 1
In:    serial@ff010000

I found a solution for this problem exactly the same as I found later in
serial_msm fixed by:
"serial: serial_msm: initialize uart only before relocation"
(sha1: 7e5ad796bc)

What it is happening is that output TX fifo still contains chars to be
sent and _uart_zynq_serial_init() resets TX fifo even in the middle of
transfer.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-15 08:54:05 +02:00
Michal Simek
e90d2659e4 serial: zynq: Write chars till output fifo is full
Change logic and put char to fifo till there is a space in output fifo.
Origin logic was that output fifo needs to be empty. It means only one
char was in output queue.
Also remove unused ZYNQ_UART_SR_TXEMPTY macro.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-15 08:54:05 +02:00
Michal Simek
c9a2c47b91 serial: zynq: Use BIT macros instead of shifts and full hex numbers
Coding style is checking to use BIT macros instead of shifts.
The patch is also fixing the rest of macros which should be BITs instead
of hex numbers.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-15 08:54:05 +02:00
Michal Simek
01fcf01e81 gpio: zynq_gpio: bank description should use unsigned type
Use u32 instead of int for max_bank, bank_min and bank_max. These values
can't be negative that's why no reason to use signed type.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-06-15 08:54:05 +02:00