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75030 commits

Author SHA1 Message Date
Marek Vasut
b81ce79df0 mtd: spi: Set CONFIG_SF_DEFAULT_MODE default to 0
Before e2e95e5e25 ("spi: Update speed/mode on change") most systems
silently defaulted to SF bus mode 0. Now the mode is always updated,
which causes breakage. It seems most SF which are used as boot media
operate in bus mode 0, so switch that as the default.

This should fix booting at least on Altera SoCFPGA, ST STM32, Xilinx
ZynqMP, NXP iMX and Rockchip SoCs, which recently ran into trouble
with mode 3. Marvell Kirkwood and Xilinx microblaze need to be checked
as those might need mode 3.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Cc: Andreas Biessmann <andreas@biessmann.org>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Valentin Longchamp <valentin.longchamp@hitachi-powergrids.com>
Cc: Vignesh Raghavendra <vigneshr@ti.com>
2021-09-28 12:03:21 -04:00
Patrick Delaunay
a4f2d83414 mtd: spi: nor: force mtd name to "nor%d"
Force the mtd name of spi-nor to "nor" + the driver sequence number:
"nor0", "nor1"... beginning after the existing nor devices.

This patch is coherent with existing "nand" and "spi-nand"
mtd device names.

When CFI MTD NOR device are supported, the spi-nor index is chosen after
the last CFI device defined by CONFIG_SYS_MAX_FLASH_BANKS.

When CONFIG_SYS_MAX_FLASH_BANKS_DETECT is activated, this config
is replaced by to cfi_flash_num_flash_banks in the include file
mtd/cfi_flash.h.

This generic name "nor%d" can be use to identify the mtd spi-nor device
without knowing the real device name or the DT path of the device,
used with API get_mtd_device_nm() and is used in mtdparts command.

This patch also avoids issue when the same NOR device is present 2 times,
for example on STM32MP15F-EV1:

STM32MP> mtd list
SF: Detected mx66l51235l with page size 256 Bytes, erase size 64 KiB, \
total 64 MiB

List of MTD devices:
* nand0
  - type: NAND flash
  - block size: 0x40000 bytes
  - min I/O: 0x1000 bytes
  - OOB size: 224 bytes
  - OOB available: 118 bytes
  - ECC strength: 8 bits
  - ECC step size: 512 bytes
  - bitflip threshold: 6 bits
  - 0x000000000000-0x000040000000 : "nand0"
* mx66l51235l
  - device: mx66l51235l@0
  - parent: spi@58003000
  - driver: jedec_spi_nor
  - path: /soc/spi@58003000/mx66l51235l@0
  - type: NOR flash
  - block size: 0x10000 bytes
  - min I/O: 0x1 bytes
  - 0x000000000000-0x000004000000 : "mx66l51235l"
* mx66l51235l
  - device: mx66l51235l@1
  - parent: spi@58003000
  - driver: jedec_spi_nor
  - path: /soc/spi@58003000/mx66l51235l@1
  - type: NOR flash
  - block size: 0x10000 bytes
  - min I/O: 0x1 bytes
  - 0x000000000000-0x000004000000 : "mx66l51235l"

The same mtd name "mx66l51235l" identify the 2 instances
mx66l51235l@0 and mx66l51235l@1.

This patch fixes a ST32CubeProgrammer / stm32prog command issue
with nor0 target on STM32MP157C-EV1 board introduced by
commit b7f060565e ("mtd: spi-nor: allow registering multiple MTDs when
DM is enabled").

Fixes: b7f060565e ("mtd: spi-nor: allow registering multiple MTDs when DM is enabled")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
[trini: Add <dm/device.h> to <mtd.h> for DM_MAX_SEQ_STR]
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-28 12:03:20 -04:00
Patrick Delaunay
b218f865e8 mtd: cfi_flash: use cfi_flash_num_flash_banks only when supported
When CONFIG_SYS_MAX_FLASH_BANKS_DETECT is activated,
CONFIG_SYS_MAX_FLASH_BANKS is replaced by cfi_flash_num_flash_banks,
but this variable is defined in drivers/mtd/cfi_flash.c, which is
compiled only when CONFIG_FLASH_CFI_DRIVER is activated, in U-Boot
or in SPL when CONFIG_SPL_MTD_SUPPORT is activated.

This patch deactivates this feature CONFIG_SYS_MAX_FLASH_BANKS_DETECT
when flash cfi driver is not activated to avoid compilation issue in
the next patch, when CONFIG_SYS_MAX_FLASH_BANKS is used in spi_nor_scan().

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-09-28 08:35:19 -04:00
Tom Rini
0b9bcf665c Prepare v2021.10-rc5
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-27 09:34:20 -04:00
Tom Rini
78c16a969f Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- turris_omnia: fix leaked mtd device (Marek)
- phy: marvell: cp110: Fix SATA invert polarity (Denis)
2021-09-27 07:41:03 -04:00
Denis Odintsov
ccee8ea1dd phy: marvell: cp110: Support SATA invert polarity
In commit b24bb99d cp110 configuration initially done in u-boot
was removed and delegated to atf firmware as smc call.
That commit didn't account for later introduced in d13b740c SATA invert polarity support.

This patch adds support of passing SATA invert polarity flags to atf
firmware during the smc call.

Signed-off-by: Denis Odintsov <shiva@mail.ru>
Cc: Baruch Siach <baruch@tkos.co.il>
Cc: Rabeeh Khoury <rabeeh@solid-run.com>
Cc: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-27 07:46:13 +02:00
Marek Behún
0ef476e68e arm: mvebu: turris_omnia: fix leaked mtd device
After getting MTD device via get_mtd_device_nm(), we need to put it with
put_mtd_device(), otherwise we get

  Removing MTD device #0 (mx25l6405d) with use count 1

before booting kernel.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Pali Rohár <pali@kernel.org>
Tested-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-27 07:41:45 +02:00
Tom Rini
76ad024683 Pull request for efi-2021-10-rc5
Documentation:
 
 * add /config bindings to HTML documentation
 
 UEFI
 
 * Fix number_of_algorithms field in TCG EFI Protocol
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Merge tag 'efi-2021-10-rc5' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2021-10-rc5

Documentation:

* add /config bindings to HTML documentation

UEFI

* Fix number_of_algorithms field in TCG EFI Protocol
2021-09-26 14:15:14 -04:00
Ruchika Gupta
346cee3ac5 efi_loader: Fix spec ID event creation
TCG EFI Protocol Specification defines the number_of_algorithms
field in spec ID event to be equal to the number of active
algorithms supported by the TPM device. In current implementation,
this field is populated with the count of all algorithms supported
by the TPM which leads to incorrect spec ID event creation.

Similarly, the algorithm array in spec ID event should be a variable
length array with length being equal to the number_of_algorithms field.
In current implementation this is defined as a fixed length array
which has been fixed.

Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
CC: Masahisa Kojima <masahisa.kojima@linaro.org>
CC: Ilias Apalodimas <ilias.apalodimas@linaro.org>
CC: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-09-25 12:31:08 +02:00
Simon Glass
269d2d14d2 doc: Add mention of the /config binding
The devicetree binding files are in their own directory and use a simple
text format. Add a link for the binding for the /config node, since it
is otherwise hard to find.

Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-09-25 12:30:54 +02:00
Tom Rini
8284d6f838 Merge branch '2021-09-24-assorted-minor-updates'
- Assorted bugfixes, MAINTAINER updates and dead code removal
2021-09-24 14:28:54 -04:00
Simon Guinot
19de51f7a5 arm: orion5x: edminiv2: change maintainer
Since Albert Aribaud is not maintaining anymore the LaCie Ethernet Disk
mini V2 board, then I am taking over.

Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-24 12:09:47 -04:00
Patrick Delaunay
b071431d52 mtd: remove SPEAr flash driver st_smi
Remove the driver st_smic.c used in SPEAr products and the associated
config CONFIG_ST_SMI; this driver is no more used in U-Boot after the
commit 570c3dcfc1 ("arm: Remove spear600 boards and the rest of SPEAr
support").

Fixes: 570c3dcfc1 ("arm: Remove spear600 boards and the rest of SPEAr support")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2021-09-24 12:09:47 -04:00
Martyn Welch
cff383caa3 Taking over responsibility for GE boards from Sebastian
I am taking over responsibility for the GE board from Sebastian Reichel.
Updating the MAINTAINERS files to reflect this.

Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
Acked-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2021-09-24 12:09:47 -04:00
Patrick Delaunay
6941ff7619 MAINTAINERS: remove SPEAR entry
As the lastest spear directories are removed, delete the associated entry
in the MAINTAINERS file:
- arch/arm/cpu/arm926ejs/spear/
- arch/arm/include/asm/arch-spear/

Fixes: 570c3dcfc1 ("arm: Remove spear600 boards and the rest of SPEAr support")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-09-24 12:09:46 -04:00
Heinrich Schuchardt
3bd0e2caa9 fs: avoid superfluous messages
Output like the following is quite irritating:

    => bootefi hello
    Scanning disk mmc2.blk...
    No valid Btrfs found
    Bad magic number for SquashFS image.
    ** Unrecognized filesystem type **
    Scanning disk mmc1.blk...
    No valid Btrfs found
    Bad magic number for SquashFS image.
    ** Unrecognized filesystem type **
    Scanning disk mmc0.blk...
    No valid Btrfs found
    Bad magic number for SquashFS image.
    ** Unrecognized filesystem type **

Albeit a whole disk may be formatted with a filesystem in most cases
a partition table is used and the whole disk (partition number 0) doesn't
contain a filesytem. Some partitions may only contain a blob. Not seeing a
filesytem on the whole disk or on any partition is only worth a debug
message.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-09-24 12:09:46 -04:00
Heinrich Schuchardt
9aab28b6f2 scripts/mailmapper: enable running with Python 3
Our mailmapper script required Python 2 which is no longer maintained.
A main difference when converting to Python 3 is that byte strings are not
character strings. So add conversion and skip over conversion errors.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-09-24 12:09:46 -04:00
T Karthik Reddy
8870daaa25 test/py: tpm2: Skip tpm pytest based on env variable
Tpm test cases relies on tpm device setup. Provide an environment
variable "env__tpm_device_test_skip = True" to skip the test case
if tpm device is not present.
Only needed will have to add variable to the py-test framework.
Test runs successfully even this variable is absent.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-09-24 12:09:46 -04:00
Tom Rini
d7ac865b98 Merge git://source.denx.de/u-boot-socfpga
Bugfixes for this one socfpga platform
2021-09-23 08:30:45 -04:00
Tom Rini
014166c561 Merge branch 'master' of git://source.denx.de/u-boot-usb
Late bunch of USB fixes (incl. the xhci usb 3.1 support)
2021-09-23 08:30:22 -04:00
Marek Vasut
532010da67 ddr: altera: use KBUILD_BASENAME instead of __FILE__
The KBUILD_BASENAME contains just the name of the compiled module,
in this case 'sequencer', rather than a full path to the compiled
file. Use it to prevent pulling the full path into the U-Boot binary,
which is useless and annoying.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2021-09-22 21:31:05 +02:00
Marek Vasut
b207cc92a2 arm: socfpga: vining: Let DWMAC configure PHY reset GPIO
The DM DWMAC driver is perfectly capable of configuring the ethernet
PHY reset GPIO, let the driver do it instead of doing it in the board
file.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2021-09-22 21:30:39 +02:00
Marek Vasut
cb3ed86cf1 arm: socfpga: vining: Enable DW I2C driver
The Designware I2C IP is used to communicate with I2C peripherals on
SoCFPGA, and required to access I2C EEPROM on this board. Enable it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2021-09-22 21:30:39 +02:00
Marek Vasut
c3880e6597 arm: socfpga: vining: Fix UDC controller phandle in DT
The USB peripheral controller is the DWC2 controller 1, not 0.
Update the phandle to fix UDC support on this board.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2021-09-22 21:30:39 +02:00
Marek Vasut
e21bbffa1d arm: socfpga: vining: Un-disable WDT in DT
The WDT on this system should be enabled, make it so.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2021-09-22 21:30:39 +02:00
Marek Vasut
4e106ef9ef arm: socfpga: vining: Set default SPI NOR mode and frequency
The SPI NOR bus mode is 0 on this system, update it accordingly.
Increase frequency to 40 MHz and enable SFDP parsing, since the
flashes on this system support that and it is a huge performance
improvement.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2021-09-22 21:30:39 +02:00
Marek Vasut
3cb04b895d arm: socfpga: vining: Set USB gadget manufacturer to Softing with capital S
This was configured in downstream, so it is likely that most of the
custom software used around the device depends on it. Make upstream
compatible.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2021-09-22 21:30:39 +02:00
Marek Vasut
513f7d1c5d arm: socfpga: vining: Increase environment size
Increase the environment size from 4k to 16k to prevent
environment from becoming full.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2021-09-22 21:30:39 +02:00
Marek Vasut
e984db0f9b arm: socfpga: vining: Drop meaningless comment
The comment is no longer meaningful due to DT conversion, drop it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2021-09-22 21:30:39 +02:00
Mark Kettenis
53eed9adfa usb: xhci-dwc3: Add support for USB 3.1 controllers
This adds support for the DWC_sub31 controllers such as those
found on Apple's M1 SoC.  This version of the controller
seems to work fine with the existing driver.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2021-09-22 21:29:56 +02:00
Matthias Schiffer
0f513c5975 usb: ehci-mx6: use phy_type from device tree
Allow using different PHY interfaces for multiple USB controllers. When no
value is set in DT, we fall back to CONFIG_MXC_USB_PORTSC for now to stay
compatible with current board configurations.

This also adds support for the HSIC mode of the i.MX7.

Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com>
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
2021-09-22 21:29:56 +02:00
Matthias Schiffer
8709228b5c usb: ehci-ci: remove redundant PORTSC flag definitions
These definitions are unused, all boards that define portsc flags use
the equivalent PORT_* definitions instead.

Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com>
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
2021-09-22 21:29:56 +02:00
Matthias Schiffer
f2a4c890e3 include/configs: replace MXC_EHCI_MODE_SERIAL with PORT_PTS_SERIAL
The MXC_EHCI_MODE_ definitions are redundant. Replace MXC_EHCI_MODE_SERIAL
with the equivalent PORT_PTS_SERIAL.

Only the zmx25 platform is affected.

Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com>
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
2021-09-22 21:29:56 +02:00
Matthias Schiffer
950cb1f25f usb: add support for ULPI/SERIAL/HSIC PHY modes
Import usb_phy_interface enum values and DT match strings from the Linux
kernel.

Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com>
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
2021-09-22 21:29:56 +02:00
Samuel Holland
672ee240d9 configs: Enable USB3 on Allwinner H6 boards
Pine H64 and Orange Pi 3 both provide a USB3 type A port.
Enable it in U-Boot.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-09-22 21:29:56 +02:00
Samuel Holland
91ce84a56b usb: xhci-dwc3: Add support for clocks/resets
Some platforms, like the Allwinner H6, do not have a separate glue layer
around the dwc3. Instead, they rely on the clocks/resets/phys referenced
from the dwc3 DT node itself. Add support for enabling the clocks/resets
referenced from the dwc3 DT node.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-09-22 21:29:56 +02:00
Samuel Holland
70a98caf19 usb: xhci-pci: Move reset logic out of XHCI core
Resetting an XHCI controller inside xhci_register undoes any register
setup performed by the platform driver. And at least on the Allwinner
H6, resetting the XHCI controller also resets the PHY, which prevents
the controller from working. That means the controller must be taken out
of reset before initializing the PHY, which must be done before calling
xhci_register.

The logic in the XHCI core was added to support the Raspberry Pi 4
(although this was not mentioned in the commit log!), which uses the
xhci-pci platform driver. Move the reset logic to the platform driver,
where it belongs, and where it cannot interfere with other platform
drivers.

This also fixes a failure to call reset_free if xhci_register failed.

Fixes: 0b80371b35 ("usb: xhci: Add reset controller support")
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-09-22 21:29:56 +02:00
Samuel Holland
7f899da901 phy: sun50i-usb3: Add a driver for the H6 USB3 PHY
This driver is needed for XHCI to work on the Allwinner H6 SoC. The
driver is copied from Linux v5.10.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-09-22 21:29:56 +02:00
Tom Rini
a49930f4c6 Merge https://source.denx.de/u-boot/custodians/u-boot-x86
- Small fixes to eMMC and SDHCI for Intel Edison
2021-09-22 11:43:12 -04:00
Andy Shevchenko
57e2c0a86f x86: tangier: acpi: Add GPIO card detection to SDHCI #2
On Intel Tangier the SDHCI #2 provides SD card connection.
Add GPIO card detection for it.

Fixes: 39665beed6 ("x86: tangier: Enable ACPI support for Intel Tangier")
BugLink: https://github.com/edison-fw/meta-intel-edison/issues/135
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
2021-09-22 21:50:35 +08:00
Andy Shevchenko
e45066f48f x86: edison: Mark eMMC non-removable
eMMC is non-removable on Intel Edison board. Fix the DTS accordingly.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-09-22 21:50:35 +08:00
Tom Rini
cfb573d22d - stm32mp15: fix the used partition name for U-Boot environement with SPL
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Merge tag 'u-boot-stm32-20210921' of https://source.denx.de/u-boot/custodians/u-boot-stm

- stm32mp15: fix the used partition name for U-Boot environement with SPL
2021-09-22 09:38:48 -04:00
Patrick Delaunay
cf39d0c29d arm: dts: stm32mp1: use ssbl partition name for U-Boot
Continue to use the "ssbl" name for GPT partition of secondary boot
stage = U-Boot for basic boot with SPL to avoid to disturb existing user.

The "fip" partition name is only used for TFA_BOOT with FIP, it is a TF-A
BL2 requirement; it the default configuration for STMicroelectronics
boards.

Fixes: b73e8bf453 ("arm: stm32mp: add defconfig for trusted boot with FIP")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-09-21 09:22:01 +02:00
Tom Rini
e3f5edf659 Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- wdt: dw: Fix passing NULL pointer to reset functions (Sean)
2021-09-20 08:45:26 -04:00
Sean Anderson
b31077feca wdt: dw: Fix passing NULL pointer to reset functions
reset_*_bulk expects a real pointer.

Fixes: 4f7abafe1c ("driver: watchdog: reset watchdog in designware_wdt_stop() function")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-20 07:39:29 +02:00
Tom Rini
3f571228a5 Revert the public-key-embedded-in-executable patches so this does not form
part of an official release before it is agreed.
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Merge tag 'dm-pull-18sep21' of https://source.denx.de/u-boot/custodians/u-boot-dm

Revert the public-key-embedded-in-executable patches so this does not form
part of an official release before it is agreed.
2021-09-19 10:38:20 -04:00
Simon Glass
47a25e81d3 Revert "efi_capsule: Move signature from DTB to .rodata"
This was unfortunately applied despite much discussion about it beiong
the wrong way to implement this feature.

Revert it before too many other things are built on top of it.

This reverts commit ddf67daac3.
Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-18 03:47:50 -06:00
Simon Glass
d428e81266 Revert "mkeficapsule: Remove dtb related options"
This reverts commit f86caab058.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-18 03:46:56 -06:00
Simon Glass
a7e4f905d2 Revert "doc: Update CapsuleUpdate READMEs"
This reverts commit 316ab801c0.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-18 03:46:56 -06:00
Tom Rini
d0b8c9a231 Merge branch '2021-09-17-TI-platform-updates'
- Assorted bugfixes for TI platforms
2021-09-17 18:51:57 -04:00